CN104465351B - A kind of method for improving metal silicide - Google Patents

A kind of method for improving metal silicide Download PDF

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CN104465351B
CN104465351B CN201410710161.XA CN201410710161A CN104465351B CN 104465351 B CN104465351 B CN 104465351B CN 201410710161 A CN201410710161 A CN 201410710161A CN 104465351 B CN104465351 B CN 104465351B
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layer
fluorine
metal
doped silica
substrate
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CN104465351A (en
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鲍宇
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The present invention relates to semiconductor device piece optimization field, more particularly to a kind of method that metal silicide improves, and after the grid of a silicon substrate is formed, deposits the silica (FSG) of one layer of fluorine doped, then deposited silicon nitride, and form side wall by dry etching.After device is formed, deposited silicon nitride, it is necessary to form the place of metal silicide, removes the silicon nitride of covering thereon as SAB masks by exposure imaging Etch selectivity.Deposited metal layer and protective layer silicon nitride, carry out double annealing and form nickel silicide.Fluorine in side wall increases the Oil repellent in base silicon, reduces the possibility that Ni piping and spiking occur by being spread in the follow-up basad silicon of annealing.

Description

A kind of method for improving metal silicide
Technical field
The present invention relates to semiconductor device piece optimization field, more particularly to a kind of method for improving metal silicide.
Background technology
In integrated circuit and silicon device technique, silicon oxidation is typically all carried out under 1000 DEG C or so of hot conditions, Under the conditions of this, the problems such as dopant redistribution, hot induced defects and warpage often occurs in silicon chip.Therefore, to integrated circuit device The further diminution of part size brings serious hindrance, in order to adapt to the needs of large scale integrated circuit, reduces these factors Influence, silicon chip need to use cryogenic conditions to aoxidize.But conventional low temperature oxidation technology, when temperature is less than or equal to 800 DEG C, oxygen It is too slow to change speed, it is impossible to apply.Therefore, electrochemistry magazine once reported a kind of sample plasma mingling fluorine and oxidation metlhod, with this side Method can improve the oxidation rate of silicon chip under cryogenic, and then it but introduces such as high-energy radiation damage defect, and oxide layer Quality can not be satisfactory.In addition, the remote plasma precleaning (NF of Applied Materials's invention3+NH3, remote Plasma pre-clean), while the natural oxidizing layer on S/D surfaces is being removed using remote plasma precleaning, energy Enough increase the Oil repellent in base silicon, compared to DHF wet clean, Ni can effectively improve using remote plasma precleaning Piping and spiking.
Chinese patent (CN 1033545A) describes a kind of fluorine doped, cryogenic silicon oxidation method, use fluid, fluorine-containing reagent for Fluorine doped source, carried by carrying gas, oxygen dilution, fluorine doped is realized using conventional thermal oxidation stove, 800 DEG C of low temperature or less than 800 DEG C Silicon aoxidizes.
Above-mentioned patent does not make referrals to the deposition fluorine-doped silica layer on semiconductor junction component, passes through annealing process The technical characteristic of the basad diffusion of fluorine in fluorine-doped silica layer.
The content of the invention
In view of the above-mentioned problems, the present invention relates to a kind of method for improving metal silicide, it is characterised in that including following step Suddenly:
Step S1, there is provided one is preset with the substrate that metal silicide prepares area, in forming grid structure on the substrate;
Step S2, deposition fluorine-doped silica layer cover the surface of the silicon substrate and grid structure exposure, prepare nitrogen SiClx layer covers the upper surface of the fluorine-doped silica layer;
Step S3, continue hot first annealing process, the fluorine in the fluorine-doped silica layer is diffused in the substrate;
Step S4, the part fluorine-doped silica layer and silicon nitride layer are removed, the metal silicide will be located at and prepared The upper surface of substrate and the grid structure in area is exposed, and retains the fluorine-doped silica layer on gate structure sidewall With silicon nitride layer as side wall;
Step S5, prepared in the exposed metal silicide and prepare metal composite layer on the substrate surface in area, and continued Second Technology for Heating Processing, metal silicide layer is formed to be prepared in the metal silicide in area
Above-mentioned method, it is characterised in that the substrate is silicon substrate.
Above-mentioned method, it is characterised in that the metal composite layer includes a metal level and on the metal level Nitrided metal layer.
Above-mentioned method, it is characterised in that the metal level is the wherein at least one selected from titanium, cobalt, nickel or platinum.
Above-mentioned method, it is characterised in that first heat treatment and the described second heat treatment are annealing process.
Above-mentioned method, it is characterised in that the silicon oxide layer of the fluorine doped and described is removed using the method for dry etching Silicon nitride layer forms the side wall.
Above-mentioned method, it is characterised in that the thickness of the silicon oxide layer of the fluorine doped is 20-100 angstroms.
Above-mentioned method, it is characterised in that the Oil repellent in the silicon oxide layer of the fluorine doped is less than 5%.
Above-mentioned method, it is characterised in that methods described also includes,
One layer of silicon oxide layer is first deposited, then is sequentially depositing the silicon oxide layer and silicon nitride layer of fluorine doped.
Above-mentioned method, it is characterised in that the Oil repellent in the silicon oxide layer of the fluorine doped is less than 10%.
In summary, by adopting the above-described technical solution, the method that a kind of metal silicide proposed by the present invention improves, After the grid of a silicon substrate is formed, the silica of one layer of fluorine doped, then deposited silicon nitride, and being formed by dry etching are deposited Side wall.Deposited metal layer and protective layer silicon nitride, carry out double annealing and form nickel-silicon compound.Fluorine in side wall passes through follow-up Anneal and spread in basad silicon, increase the Oil repellent in base silicon, reduce the possibility that Ni piping and spiking occur.
Brief description of the drawings
Fig. 1-Fig. 5 is the structural representation that the present invention forms metal silicide on semiconductor junction component.
Embodiment
In semiconductor technology, metal-oxide semiconductor, electric crystal are by three electrode institute structures such as grid, source electrode and drain electrode Into wherein MOS is the main body for forming grid structure.
The MOS of early stage is made up of three-layer-materials such as metal level, silica and silicon bases.But due to most of Metal it is poor for the adhesive ability of silica, so the polysilicon for having preferable adhesive ability for silica just carries Go out with substituted metal layer.
However, exist using polysilicon but the problem of resistance value is too high, even if polysilicon, through overdoping, its resistance value is also It is too high, and inapplicable substitution MOS metal level, metal silicide is then just needed on polysilicon.
In view of the above-mentioned problems, the present invention designs a kind of optimization method of metal silicide, one is deposited in base silicon The silicon oxide layer of layer fluorine doped, by being spread in the follow-up basad silicon of pyroprocess fluorine, increases base silicon as Fluorine source Oil repellent, so as to improve semiconductor structure device.
Described in detail with reference to preferred embodiment and accompanying drawing
Specific embodiment 1
The present invention relates to a kind of method for improving existing nickel silicide, including following steps:
As shown in figure 1, step S1, is preset with the silicon substrate 1 in metal silicide preparation area one and forms a grid structure, The grid structure includes a grid oxic horizon 2 and the grid 3 above the grid oxic horizon 2, grid 3 can with metal gate, It can be polysilicon gate, be selected according to the needs of practical devices;
As shown in Fig. 2 step S2, sinks in the side of the surface of remaining silicon substrate 1, the upper surface of grid 3 and grid structure One layer of fluorine-doped silica layer 4 of product, the thickness of the fluorine-doped silica layer 4 are preferably 20-100 angstroms, and the content of wherein fluorine is preferable 5% is less than, then deposits a silicon nitride layer 5 on the surface of the fluorine-doped silica layer 4;
Step S3, the first Technology for Heating Processing is carried out, the Technology for Heating Processing is an annealing process, by fluorine-doped silica layer Fluorine diffuse in silicon substrate;
As shown in figure 3, step S4, silicon nitride layer 5 and fluorine-doped silica layer 4 are removed to grid using the method for dry etching 3 upper surface and metal silicide prepare the surface of area's silicon substrate 1, and remaining silicon nitride layer 5 and fluorine-doped silica layer 4 are used as should The side wall of grid structure;
As shown in figure 4, step S5, a metal composite layer is deposited on the device formed after the above procedure, the metal composite Layer includes a metal level 6 and the nitrided metal layer 7 on metal level 6, i.e. the metal level 6 is covered in the upper surface of grid 3, side Wall surface and the surface of silicon substrate 1 of side wall both sides, and wherein at least the one of the material of the metal level 6 such as titanium, cobalt, nickel or platinum Kind, nitrided metal layer is preferably titanium nitride;
As shown in figure 5, step S6, continues the second Technology for Heating Processing processing procedure, preferably with a temperature on 800 DEG C of left sides Right annealing process, then remove nitrided metal layer 7 and metal level 6 so that the silicon substrate of side wall both sides forms metal silicide 8, and the part of metal level 6 for being maintained at side wall and gate surface has neither part nor lot in reaction, maintains the original state, formation has metal silication structure Semiconductor devices.
Specific embodiment 2
As shown in Figures 1 to 5, the present invention relates to a kind of method for improving existing nickel silicide, including following step Suddenly:
As shown in figure 1, step S1, is preset with the silicon substrate 1 in metal silicide preparation area one and forms a grid structure, The grid structure includes a grid oxic horizon 2 and the grid 3 above the grid oxic horizon 2, grid 3 can with metal gate, It can be polysilicon gate, be selected according to the needs of practical devices;
Step S2, one layer of oxidation is deposited in the side of the surface of remaining silicon substrate 1, the upper surface of grid 3 and grid structure Silicon layer (not shown);
As shown in Fig. 2 step S3, deposits one layer of fluorine-doped silica layer 4 in silica upper surface and forms silica composite bed, The thickness of the fluorine-doped silica layer 4 is preferably 20-100 angstroms, when forming the silica composite bed, wherein fluorine-doped silica layer The content of middle fluorine is preferably less than 10%, then deposits a silicon nitride layer 5 on the surface of the fluorine-doped silica layer 4;
Step S4, the first Technology for Heating Processing is carried out, the Technology for Heating Processing is an annealing process, by fluorine-doped silica layer Fluorine diffuse in silicon substrate;
As shown in figure 3, step S5, silicon nitride layer 5 and fluorine-doped silica layer 4 are removed to grid using the method for dry etching 3 upper surface and the surface of metal silicide preparation area's silicon substrate 1 form the side wall of the grid structure;
As shown in figure 4, step S6, a metal composite layer is deposited on the device formed after the above procedure, the metal composite Layer includes a metal level 6 and the nitrided metal layer 7 on metal level 6, i.e. the metal level 6 is covered in the upper surface of grid 3, side Wall surface and the surface of silicon substrate 1 of side wall both sides, and wherein at least the one of the material of the metal level 6 such as titanium, cobalt, nickel or platinum Kind, nitrided metal layer is preferably titanium nitride;
As shown in figure 5, step S7, continues the second Technology for Heating Processing processing procedure, preferably with a temperature on 800 DEG C of left sides Right annealing process, then remove nitrided metal layer 7 and metal level 6 so that the silicon substrate of side wall both sides forms metal silicide 8, and the part of metal level 6 for being maintained at side wall and gate surface has neither part nor lot in reaction, maintains the original state, formation has metal silication structure Semiconductor devices.
Specific embodiment 3
The present invention relates to a kind of method for improving existing nickel silicide, including following steps:
Step S1, it is preset with one on the silicon substrate in metal silicide preparation area and forms some grid structures, these grids Structure includes a grid oxic horizon and the grid above these grid oxic horizons, and grid can be metal gate, or Polysilicon gate, selected according to the needs of practical devices;
Step S2, one layer of fluorine doped oxygen is deposited in the side of the surface of remaining silicon substrate, gate upper surface and grid structure SiClx layer, the thickness of the fluorine-doped silica layer are preferably 20-100 angstroms, and the content of wherein fluorine is preferably less than 5%, then A silicon nitride layer is deposited on the surface of the fluorine-doped silica layer;
Step S3, the first Technology for Heating Processing is carried out, the Technology for Heating Processing is an annealing process, by fluorine-doped silica layer Fluorine diffuse in silicon substrate;
Step S4, silicon nitride layer and fluorine-doped silica layer are removed to the upper surface of grid and gold using the method for dry etching The surface of category silicide preparation area's silicon substrate forms the side wall of these grid structures;
Step S5, one layer of silicon nitride is deposited on the device formed after the above procedure, when needing to form gold in part of devices When belonging to silicide regions, selective exposure is etched away the silicon nitride layer of these device areas;
Step S6, a metal composite layer is deposited on the device formed after the above procedure, the metal composite layer includes a gold medal Category layer and the nitrided metal layer on metal level, the i.e. metal level 6 are covered in the upper surface of grid, side wall surface and side wall two The surface of silicon substrate 1 of side, and the wherein at least one of the material of the metal level such as titanium, cobalt, nickel or platinum, nitrided metal layer are preferred For titanium nitride;
Step S7, continue the second Technology for Heating Processing processing procedure, preferably with annealing system of the temperature at 800 DEG C or so Journey, then remove nitrided metal layer and metal level so that the silicon substrate of side wall both sides forms metal silicide, and is maintained at side wall Reaction is had neither part nor lot in the metal layer part of gate surface, is maintained the original state, forms the semiconductor devices with metal silication structure.
The method that a kind of metal silicide proposed by the present invention improves, after the grid of a silicon substrate is formed, deposit one layer The silica (FSG) of fluorine doped, then deposited silicon nitride, and side wall is formed by dry etching.After device is formed, deposited silicon nitride As SAB masks, it is necessary to form the place of metal silicide, remove the nitrogen of covering thereon by exposure imaging Etch selectivity SiClx.Deposited metal layer and protective layer silicon nitride, carry out double annealing and form nickel silicide.Fluorine in side wall is moved back by follow-up Spread in the basad silicon of fire, increase the Oil repellent in base silicon, reduce the possibility that Ni piping and spiking occur.
By explanation and accompanying drawing, the exemplary embodiments of the specific structure of embodiment are given, it is smart based on the present invention God, it can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended as Limitation.
For a person skilled in the art, after reading described above, various changes and modifications undoubtedly will be evident. Therefore, appended claims should regard whole variations and modifications of the true intention and scope that cover the present invention as.Weighing Any and all scope and content of equal value, are all considered as still belonging to the intent and scope of the invention in the range of sharp claim.

Claims (8)

  1. A kind of 1. method for improving metal silicide, it is characterised in that comprise the following steps:
    Step S1, there is provided one is preset with the substrate that metal silicide prepares area, in forming grid structure on the substrate;
    Step S2, deposition fluorine-doped silica layer cover the surface of the substrate and grid structure exposure, prepare silicon nitride layer Cover the upper surface of the fluorine-doped silica layer;
    Step S3, the first Technology for Heating Processing is carried out, the fluorine in the fluorine-doped silica layer is diffused in the substrate;
    Step S4, the part fluorine-doped silica layer and silicon nitride layer are removed, the metal silicide will be located at and prepared in area Substrate and the upper surface of the grid structure exposed, and retain fluorine-doped silica layer and nitrogen on gate structure sidewall SiClx layer is as side wall;
    Step S5, prepared in the exposed metal silicide and metal composite layer is prepared on the substrate surface in area, and continue second Technology for Heating Processing, metal silicide layer is formed to be prepared in the metal silicide in area;
    Methods described also includes, and first deposits one layer of silicon oxide layer, then be sequentially depositing fluorine-doped silica layer and silicon nitride layer;It is described to mix Oil repellent in fluorine silicon oxide layer is less than 10%.
  2. 2. according to the method for claim 1, it is characterised in that the substrate is silicon substrate.
  3. 3. according to the method for claim 1, it is characterised in that the metal composite layer includes a metal level and positioned at described Nitrided metal layer on metal level.
  4. 4. according to the method for claim 3, it is characterised in that the metal level be selected from titanium, cobalt, nickel or platinum wherein extremely Few one kind.
  5. 5. according to the method for claim 1, it is characterised in that first heat treatment and the described second heat treatment are to move back Fiery processing procedure.
  6. 6. according to the method for claim 1, it is characterised in that the fluorine-doped silica is removed using the method for dry etching Layer and the silicon nitride layer form the side wall.
  7. 7. according to the method for claim 1, it is characterised in that the thickness of the fluorine-doped silica layer is 20-100 angstroms.
  8. 8. according to the method for claim 1, it is characterised in that the Oil repellent in the fluorine-doped silica layer is less than 5%.
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CN111681961B (en) * 2020-07-24 2024-02-02 上海华虹宏力半导体制造有限公司 Method for manufacturing semiconductor device
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US6153485A (en) * 1998-11-09 2000-11-28 Chartered Semiconductor Manufacturing Ltd. Salicide formation on narrow poly lines by pulling back of spacer
CN1979786B (en) * 2005-11-29 2010-09-15 联华电子股份有限公司 Method for making strain silicon transistor
CN102832112A (en) * 2011-06-17 2012-12-19 中芯国际集成电路制造(上海)有限公司 Method for forming metal silicide
CN102856179B (en) * 2011-06-29 2015-09-02 中芯国际集成电路制造(上海)有限公司 The formation method of semiconductor device

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