CN104424379B - 验证部分良好的电压岛结构 - Google Patents
验证部分良好的电压岛结构 Download PDFInfo
- Publication number
- CN104424379B CN104424379B CN201410452348.4A CN201410452348A CN104424379B CN 104424379 B CN104424379 B CN 104424379B CN 201410452348 A CN201410452348 A CN 201410452348A CN 104424379 B CN104424379 B CN 104424379B
- Authority
- CN
- China
- Prior art keywords
- block
- logic
- logical block
- integrated circuit
- redundancy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00392—Modifications for increasing the reliability for protection by circuit redundancy
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2117/00—Details relating to the type or aim of the circuit design
- G06F2117/06—Spare resources, e.g. for permanent fault suppression
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/06—Power analysis or power optimisation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (20)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/019,957 US9172373B2 (en) | 2013-09-06 | 2013-09-06 | Verifying partial good voltage island structures |
US14/019,957 | 2013-09-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104424379A CN104424379A (zh) | 2015-03-18 |
CN104424379B true CN104424379B (zh) | 2017-08-18 |
Family
ID=52624999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410452348.4A Expired - Fee Related CN104424379B (zh) | 2013-09-06 | 2014-09-05 | 验证部分良好的电压岛结构 |
Country Status (2)
Country | Link |
---|---|
US (1) | US9172373B2 (zh) |
CN (1) | CN104424379B (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11010330B2 (en) * | 2018-03-07 | 2021-05-18 | Microsoft Technology Licensing, Llc | Integrated circuit operation adjustment using redundant elements |
US10955905B2 (en) * | 2018-04-11 | 2021-03-23 | North Sea Investment Company Ltd. | Apparatus for true power shedding via switchable electrical connections |
US11295053B2 (en) * | 2019-09-12 | 2022-04-05 | Arm Limited | Dielet design techniques |
CN112131822B (zh) * | 2020-09-28 | 2022-12-09 | 海光信息技术股份有限公司 | 一种cpu芯片及其设计方法 |
Citations (7)
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EP0929036A2 (en) * | 1998-01-09 | 1999-07-14 | Information Storage Devices, Inc. | Method and apparatus of column redundancy for non-volatile analog and multilevel memory integrated circuits |
US6255894B1 (en) * | 1996-10-03 | 2001-07-03 | Micron Technology, Inc. | Low current redundancy anti-fuse method and apparatus |
CN1307341A (zh) * | 2000-01-28 | 2001-08-08 | 三星电子株式会社 | 集成电路半导体器件及其内建存储器自修复电路和方法 |
CN1495799A (zh) * | 2002-09-12 | 2004-05-12 | ���ǵ�����ʽ���� | 在闪存装置中用于不同操作的专用冗余电路及其操作方法 |
CN1694252A (zh) * | 2003-12-18 | 2005-11-09 | 商辉达股份有限公司 | 耐缺陷冗余 |
CN1744230A (zh) * | 2004-08-30 | 2006-03-08 | 三星电子株式会社 | 具有支持多存储块的列冗余电路的半导体存储设备 |
CN101295980A (zh) * | 2007-04-23 | 2008-10-29 | 阿尔特拉公司 | 带有逻辑元件粒度的冗余的可编程逻辑器件 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5526514A (en) | 1994-06-21 | 1996-06-11 | Pradhan; Dhiraj | Method for circuit verification and multi-level circuit optimization based on structural implications |
US6631502B2 (en) * | 2002-01-16 | 2003-10-07 | International Business Machines Corporation | Method of analyzing integrated circuit power distribution in chips containing voltage islands |
US7103860B2 (en) | 2002-01-25 | 2006-09-05 | Logicvision, Inc. | Verification of embedded test structures in circuit designs |
US6779163B2 (en) * | 2002-09-25 | 2004-08-17 | International Business Machines Corporation | Voltage island design planning |
US6820240B2 (en) * | 2002-09-25 | 2004-11-16 | International Business Machines Corporation | Voltage island chip implementation |
EP3321769A1 (en) * | 2003-05-07 | 2018-05-16 | Conversant Intellectual Property Management Inc. | Managing power on integrated circuits using power islands |
US7131074B2 (en) * | 2003-07-08 | 2006-10-31 | International Business Machines Corporation | Nested voltage island architecture |
US20050081173A1 (en) | 2003-10-14 | 2005-04-14 | Olivier Peyran | IC design planning method and system |
US7111266B2 (en) | 2003-11-24 | 2006-09-19 | International Business Machines Corp. | Multiple voltage integrated circuit and design method therefor |
US7032191B2 (en) | 2004-02-27 | 2006-04-18 | Rapid Bridge Llc | Method and architecture for integrated circuit design and manufacture |
US7984398B1 (en) | 2004-07-19 | 2011-07-19 | Synopsys, Inc. | Automated multiple voltage/power state design process and chip description system |
JP2009507425A (ja) * | 2005-09-02 | 2009-02-19 | サイプレス セミコンダクター コーポレイション | ジッタを低減させて信号を多重化する回路、システム、方法 |
US7386828B1 (en) | 2006-02-23 | 2008-06-10 | Altera Corporation | SAT-based technology mapping framework |
US7546566B2 (en) | 2007-04-05 | 2009-06-09 | Synopsys, Inc. | Method and system for verification of multi-voltage circuit design |
US7661050B2 (en) * | 2007-05-04 | 2010-02-09 | International Business Machines Corporation | Method and system for formal verification of partial good self test fencing structures |
US8413088B1 (en) | 2007-06-07 | 2013-04-02 | Cadence Design Systems, Inc. | Verification plans to merging design verification metrics |
US7710800B2 (en) * | 2007-12-12 | 2010-05-04 | International Business Machines Corporation | Managing redundant memory in a voltage island |
US8086980B2 (en) | 2008-02-15 | 2011-12-27 | International Business Machines Corporation | Efficient power region checking of multi-supply voltage microprocessors |
US8015521B2 (en) | 2008-05-30 | 2011-09-06 | Synopsys, Inc. | Method and system for performing sequential equivalence checking on integrated circuit (IC) designs |
US8195857B2 (en) * | 2009-12-18 | 2012-06-05 | Infineon Technologies Ag | Coupling devices, system comprising a coupling device and method for use in a system comprising a coupling device |
US8392867B2 (en) | 2011-01-13 | 2013-03-05 | International Business Machines Corporation | System, method and program storage device for developing condensed netlists representative of groups of active devices in an integrated circuit and for modeling the performance of the integrated circuit based on the condensed netlists |
-
2013
- 2013-09-06 US US14/019,957 patent/US9172373B2/en active Active
-
2014
- 2014-09-05 CN CN201410452348.4A patent/CN104424379B/zh not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6255894B1 (en) * | 1996-10-03 | 2001-07-03 | Micron Technology, Inc. | Low current redundancy anti-fuse method and apparatus |
EP0929036A2 (en) * | 1998-01-09 | 1999-07-14 | Information Storage Devices, Inc. | Method and apparatus of column redundancy for non-volatile analog and multilevel memory integrated circuits |
CN1307341A (zh) * | 2000-01-28 | 2001-08-08 | 三星电子株式会社 | 集成电路半导体器件及其内建存储器自修复电路和方法 |
CN1495799A (zh) * | 2002-09-12 | 2004-05-12 | ���ǵ�����ʽ���� | 在闪存装置中用于不同操作的专用冗余电路及其操作方法 |
CN1694252A (zh) * | 2003-12-18 | 2005-11-09 | 商辉达股份有限公司 | 耐缺陷冗余 |
CN1744230A (zh) * | 2004-08-30 | 2006-03-08 | 三星电子株式会社 | 具有支持多存储块的列冗余电路的半导体存储设备 |
CN101295980A (zh) * | 2007-04-23 | 2008-10-29 | 阿尔特拉公司 | 带有逻辑元件粒度的冗余的可编程逻辑器件 |
Also Published As
Publication number | Publication date |
---|---|
US9172373B2 (en) | 2015-10-27 |
CN104424379A (zh) | 2015-03-18 |
US20150070048A1 (en) | 2015-03-12 |
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GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20171115 Address after: Grand Cayman, Cayman Islands Patentee after: GLOBALFOUNDRIES INC. Address before: American New York Patentee before: Core USA second LLC Effective date of registration: 20171115 Address after: American New York Patentee after: Core USA second LLC Address before: New York grams of Armand Patentee before: International Business Machines Corp. |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170818 Termination date: 20200905 |
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CF01 | Termination of patent right due to non-payment of annual fee |