CN104422865B - Wafer scale one-off programming OTP chip detecting methods and device - Google Patents
Wafer scale one-off programming OTP chip detecting methods and device Download PDFInfo
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Abstract
The present invention provides a kind of wafer scale one-off programming OTP chip detecting methods and device, and methods described includes：According to test program, one-off programming OTP chips itself are tested, the advance burning of test program is in the one-off programming read-only storage OTP ROM for users to use of the OTP chips；Ultraviolet erasing treatment is carried out to the OTP chips.Wafer scale OTP chip detecting methods and device that the present invention is provided, by the test program according to advance burning in OTP ROM for users to use, the OTP chips are tested, and the scheme of ultraviolet erasing treatment is carried out to the OTP chips, without embedding the OTP ROM for being exclusively used in depositing test program in OTP chips, so as to realize carrying out effective test to chip in the case where cost is limited.
Description
Technical field
The present invention relates to integrated circuit testing field, more particularly to a kind of wafer scale one-off programming OTP chip testing sides
Method and device.
Background technology
In existing integrated circuit testing scheme, in order to improve test coverage as much as possible, failure core is detected as early as possible as early as possible
Piece, it usually needs wafer probe is carried out to chip（Chip Probing, abbreviation CP）Test, i.e., entered before chip package to it
Capable test.One-off programming（One Time Programmable, abbreviation OTP）Chip, i.e. memory use one-off programming
Read-only storage（One Time Programmable Read Only Memory, abbreviation OTP ROM）Chip, its CP test
Including two parts, one is directed to the OTP ROM in OTP chips, the IP tests for pre-establishing, and two are directed to OTP chips
The functional test for carrying out.
Wherein, existing functional test scheme is to embed the OTP ROM for being exclusively used in depositing test program in the chips, and
By test program burning wherein, so as to realize carrying out functional test to it by controlling OTP chips to run the test program.The party
Situation when case can be realized using user chip substantially is simulated.But, storage test is exclusively used in the testing scheme
The area of the OTP ROM of program would generally account for more than the 20% of the chip gross area, and this will certainly cause the chip gross area and into
This increasing.In actual applications, because the production cost of most chips is limited, then said chip testing scheme cannot be applicable,
That is, existing chip testing scheme cannot carry out effective test under conditions of cost is limited to chip.
The content of the invention
The present invention provides a kind of wafer scale one-off programming OTP chip detecting methods and device, for solving existing core
Built-in testing scheme cannot carry out the problem of Validity Test under conditions of cost is limited to chip.
The first aspect of the invention is to provide a kind of wafer scale one-off programming OTP chip detecting methods, including：
According to test program, one-off programming OTP chips itself are tested, the advance burning of test program is in institute
In stating the one-off programming read-only storage OTP ROM for users to use of OTP chips；
After the completion of test, ultraviolet erasing treatment is carried out to the OTP chips, to recover the OTP for users to use
The one-off programming function of ROM.
Another aspect of the present invention is to provide a kind of wafer scale one-off programming OTP apparatus for testing chip, including：
First processing module, for according to test program, testing one-off programming OTP chips itself, the survey
The advance burning of examination program is in the one-off programming read-only storage OTP ROM for users to use of the OTP chips；
Erasing module, for test after the completion of, ultraviolet erasing treatment is carried out to the OTP chips, to recover the confession
The one-off programming function of the OTP ROM that user uses.
The present invention provide chip detecting method and device, by according to advance burning in disposable volume for users to use
Journey read-only storage（One Time Programmable Read Only Memory, abbreviation OTP ROM）In test program,
The OTP chips are tested, and the scheme of ultraviolet erasing treatment is carried out to the OTP chips, without interior in the chips
The embedding OTPROM for being exclusively used in depositing test program, so as to realize carrying out effective test to chip in the case where cost is limited.
Brief description of the drawings
Fig. 1 is a kind of schematic flow sheet of wafer scale OTP chip detecting methods that the embodiment of the present invention one is provided；
Fig. 2 is the schematic flow sheet of another wafer scale OTP chip detecting methods that the embodiment of the present invention two is provided；
Fig. 3 is a kind of structural representation of wafer scale OTP apparatus for testing chip that the embodiment of the present invention three is provided.
Specific embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described.
Fig. 1 is a kind of wafer scale one-off programming that the embodiment of the present invention one is provided（One Time Programmable,
Abbreviation OTP）The schematic flow sheet of chip detecting method, as shown in figure 1, methods described includes：
101st, according to test program, OTP chips are tested itself, the advance burning of test program is in the OTP
The one-off programming read-only storage for users to use of chip（One Time Programmable Read Only
Memory, abbreviation OTP ROM）In.
In actual applications, the OTP chips can be OTP micro-control units（Micro Controller Unit, letter
Claim MCU）.The test program can need what the test target realized was write in advance according to, and burning is in the OTP chips
OTP ROM in program.
Wherein, the test program can include many sub- test programs；Each described sub- test program correspondence at least
Item functional test, i.e., run each described sub- test program by controlling the OTP chips, and the OTP chips can be carried out
At least one functional test.Specifically, 101 can include：
Reset the OTP chips, obtains current selection mark；
If the selection mark is not one of default multiple marks, default by controlling the OTP chips to run
Initial sub- test program, functional test is carried out to the OTP chips, if the functional test passes through, sets the selection mark
Any mark in knowing for the multiple mark, and perform again it is described reset the OTP chips the step of；
Wherein, the initial sub- test program is any sub- test program in the multiple sub- test program, described many
Individual mark corresponds with other the sub- test programs in the multiple sub- test program in addition to the initial sub- test program；
If described identify the selection as one of the multiple mark, the selection mark is run by controlling the OTP chips
Know corresponding sub- test program, functional test is carried out to the OTP chips, if the functional test passes through, the choosing is set
Select and be designated the current corresponding mark of any sub- test program do not run by the OTP chips, and perform the reset again
The step of OTP chips, until the corresponding functional test of the multiple sub- test program is by test, then OTP cores
Piece is qualified, and otherwise, the OTP chips are unqualified.
Specifically, if any test does not pass through, the OTP chips are unqualified, common, if any test does not pass through,
Then directly terminate the test to the OTP chips.In actual applications, can by setting the current identification of marker register,
Realize being configured selection mark, then accordingly, after the selection that obtains first mark can be to open marker register, its with
The mark of machine or default setting.
Additionally, determining the specific method of the current sub- test program not run by the OTP chips can include various, example
Such as, the corresponding sub- test program of the selection mark is run by controlling the OTP chips described, the OTP chips is entered
After row functional test, mark is run to the sub- test program addition, then accordingly, do not carried the son survey for having run mark
Examination program is then the sub- test program not run by the OTP chips；Again for example, being transported by controlling the OTP chips described
The corresponding sub- test program of the row selection mark, is carried out after functional test to the OTP chips, deletes the son survey of the operation
The corresponding mark of examination program, the then currently stored corresponding sub- test program of mark is the son not run by the OTP chips
Test program.
In this embodiment, each sub- test program is run by setting selection mark control OTP chips, so as to described
OTP chips carry out functional test.The method can effectively improve the effect of chip testing compared to existing chip detecting method
Rate.
It should be noted that being surveyed to the OTP chips according to the test program of advance burning described in the present embodiment
Examination includes but is not limited to foregoing implementation method, and other embodiment will not be repeated here.
It is optional again, in any of the above-described implementation method, it is described functional test is carried out to the OTP chips before, also
Can include：
For corresponding functional test mark is added in the functional test.
It is then corresponding, it is described the functional test is carried out to the OTP chips after, can also include：
If the functional test does not pass through, output includes the chip of the corresponding functional test mark of the functional test not
Qualified message.
In actual applications, the output includes what is do not identified by the corresponding functional test of the functional test tested
The method of the unqualified message of chip can be to show that the corresponding functional test of the functional test is identified by display device, also may be used
Think and identified by the corresponding functional test of functional test described in the port mapping that exports the unqualified message of the chip.For example,
In advance for the corresponding functional test mark of each functional test sets one-to-one port, then do not conformed to according to the output chip
The port of lattice message, you can its corresponding functional test mark is obtained, so as to further determine not according to functional test mark
The functional test for passing through.
By present embodiment, if the OTP chips are unqualified, unsanctioned test correspondence can be included according to output
Functional test mark the unqualified message of chip, directly determine unsanctioned functional test, it is convenient that defect row is carried out to chip
Look into and analyze.
Additionally, in actual applications, in addition to carrying out functional test to OTP chips, can also be according to a certain functional test
Test result, performance parameter test corresponding with this functional test is further carried out to the OTP chips.
Then again optional, in any of the above-described implementation method, the sub- test program can correspond to a functional test, then
Further, any mark in the multiple mark, or the setting selection are identified the selection as described in the setting
It is designated after the current corresponding mark of any sub- test program do not run by the OTP chips, can also includes：
The corresponding test and excitation signal of the functional test is obtained, and according to the test and excitation signal to the OTP cores
Piece carries out performance parameter test；
It is described perform again it is described reset the OTP chips the step of, specifically include：
If the performance parameter test passes through, perform again it is described reset the OTP chips the step of.
Optionally, it is described performance parameter test is carried out to the OTP chips according to the test and excitation signal after, also wrap
Include：If the performance parameter test does not pass through, the unqualified message of pio chip.In actual applications, can be by test machine
The unqualified message of platform pio chip.
102nd, after the completion of testing, ultraviolet erasing treatment is carried out to the OTP chips, with recover it is described for users to use
The one-off programming function of OTP ROM.
Specifically, the specific method of ultraviolet erasing treatment will not be repeated here.
Additionally, in actual applications, before 101, IP tests are generally first carried out to the OTP chips.Specifically,
The first IP tests can be pre-established by IP providers, for example, it can include first time ultraviolet erasing UV1, first
Wafer probe（Chip Probing, abbreviation CP）Test（That is CP1, generally includes open-short circuit open short, OTP and looks into sky,
Data and the data of verification burning that burning is pre-configured with）, baking BAKE, the 2nd CP test（That is CP2, generally includes
Open short and the data of burning in CP test are verified again）With second ultraviolet erasing UV2.Its
In, the temperature and time of baking can preset.
Optionally, in practical application, after 102, can also include：The 2nd IP tests are carried out to the OTP chips.Together
Sample, the 2nd IP test can also be pre-established, for example, the 2nd IP tests can include open short and
OTP looks into sky.
The present embodiment provide chip detecting method, by according to advance burning in OTP ROM for users to use
Test program, is tested the OTP chips, and the scheme of ultraviolet erasing treatment is carried out to the OTP chips, without
The OTP ROM for being exclusively used in depositing test program are embedded in chip, so as to realize having to chip in the case where cost is limited
The test of effect.
Fig. 2 is the schematic flow sheet of another chip detecting method that the embodiment of the present invention two is provided, as shown in Fig. 2 institute
The method of stating includes：
201st, reset the OTP chips, obtains current selection mark；
202nd, it is one of default multiple marks to detect that the selection is identified whether, if it is not, 203 are then performed, if so, then
Perform 208；
203rd, initial sub- test program is run by controlling the OTP chips, functional test is carried out to the OTP chips；
204th, detect whether the functional test passes through, if so, then performing 205, otherwise, perform 214；
205th, the corresponding test and excitation signal of the functional test is obtained, and according to the test and excitation signal to described
OTP chips carry out performance parameter test；
206th, detect whether the performance parameter test passes through, if so, then performing 207, otherwise, perform 214；
207th, any mark identified the selection as in the multiple mark described in setting, and return to execution 201；
208th, the corresponding sub- test program of the selection mark is run by controlling the OTP chips, to the OTP chips
Carry out functional test；
209th, detect whether the functional test passes through, if so, then performing 210, otherwise perform 214；
210th, the corresponding test and excitation signal of the functional test is obtained, and according to the test and excitation signal to described
OTP chips carry out performance parameter test；
211st, detect whether the performance parameter test passes through, if so, then performing 212, otherwise, perform 214；
212nd, the current corresponding mark of any sub- test program not run by the OTP chips is identified the selection as described in setting
Know, and return to execution 201；
If the 213, the corresponding functional test of the multiple sub- test program is by test, the OTP chips are qualified；
214th, test, and the unqualified message of pio chip are terminated.
Wherein, OTP ROM for users to use of the advance burning of the multiple sub- test program in the OTP chips
In, the initial sub- test program is any sub- test program in the multiple sub- test program, the multiple mark and institute
Other the sub- test programs in many sub- test programs in addition to default initial sub- test program are stated to correspond.And this implementation
The specific method of the above steps in example can be found in the specific method of corresponding steps in embodiment one.
The present embodiment provide wafer scale OTP chip detecting methods, by according to advance burning in OTP for users to use
Test program in ROM, is tested the OTP chips, and the side of ultraviolet erasing treatment is carried out to the OTP chips
Case, without embedding the OTP ROM for being exclusively used in depositing test program in the chips, so as to be realized to core in the case where cost is limited
Piece is effectively tested.
Fig. 3 is a kind of structural representation of wafer scale OTP apparatus for testing chip that the embodiment of the present invention three is provided, such as Fig. 3
Shown, described device includes：First processing module 31 and erasing module 32；Wherein,
First processing module 31, for according to test program, itself testing OTP chips, the test program is pre-
First burning is in the OTP ROM for users to use of the OTP chips；
Erasing module 32, for test after the completion of, ultraviolet erasing treatment is carried out to the OTP chips, to recover described
The one-off programming function of OTP ROM for users to use.
Wherein, the test program can include many sub- test programs；Each described sub- test program correspondence at least
Item functional test, i.e., run each described sub- test program by controlling the OTP chips, and the OTP chips can be carried out
At least one functional test.
Specifically, processing module 31 can include：
Acquiring unit, for the OTP chips that reset, obtains current selection mark；
First processing units, it is described by control if not being one of default multiple marks for the selection mark
The default initial sub- test program of OTP chips operation, functional test is carried out to the OTP chips, if the functional test passes through,
Any mark identified the selection as in the multiple mark described in then setting, and the OTP chips that reset are performed again
Step；
Wherein, the initial sub- test program is any sub- test program in the multiple sub- test program, described many
Individual mark corresponds with other the sub- test programs in the multiple sub- test program in addition to the initial sub- test program；
Second processing unit, if identifying the selection as one of the multiple mark for described, by controlling the OTP cores
The corresponding sub- test program of the piece operation selection mark, carries out functional test, if the functional test is logical to the OTP chips
Cross, then the current corresponding mark of any sub- test program do not run by the OTP chips is identified the selection as described in setting, and again
The step of secondary execution reset OTP chips；
Judging unit, if for the corresponding functional test of the multiple sub- test program by test, judging described
OTP chips are qualified, otherwise, judge that the OTP chips are unqualified.
Optional again, in the above-described embodiment, described device can also include：
Mark module, for carrying out work(to the OTP chips in the first processing units or the second processing unit
It is that corresponding functional test mark is added in the functional test before testing；
Output module, for carrying out work(to the OTP chips in the first processing units or the second processing unit
After testing, if the functional test does not pass through, output includes the core of the corresponding functional test mark of the functional test
The unqualified message of piece.
By present embodiment, if the OTP chips are unqualified, unsanctioned test correspondence can be included according to output
Functional test mark the unqualified message of chip, directly determine unsanctioned functional test, it is convenient that defect row is carried out to chip
Look into and analyze.
Additionally, in actual applications, in addition to carrying out functional test to OTP chips, can also be according to the functional test
Test result, performance parameter test corresponding with the functional test is further carried out to the OTP chips.It is then again optional
, in any of the above-described implementation method, the sub- test program can correspond to a functional test, and described device can also be wrapped
Include：
Second processing module, in the multiple mark is identified the selection as described in first processing units setting
Any mark, or current any do not run by the OTP chips is identified the selection as described in second processing unit setting
After the corresponding mark of sub- test program, the corresponding test and excitation signal of the functional test is obtained, and swash according to the test
Encourage signal carries out performance parameter test to the OTP chips；
The Second processing module, if be additionally operable to the performance parameter test passing through, it indicates that the acquiring unit is again
The step of performing the reset OTP chips.
Further alternative, in the above-described embodiment, the output module is additionally operable in the Second processing module root
After performance parameter test being carried out to the OTP chips according to the test and excitation signal, if the performance parameter test does not pass through,
The then unqualified message of pio chip.
The present embodiment provide wafer scale OTP apparatus for testing chip, by according to advance burning in OTP for users to use
Test program in ROM, is tested the OTP chips, and the side of ultraviolet erasing treatment is carried out to the OTP chips
Case, without embedding the OTP ROM for being exclusively used in depositing test program in the chips, so as to be realized to core in the case where cost is limited
Piece is effectively tested.
It is apparent to those skilled in the art that, for convenience and simplicity of description, the device of foregoing description
Specific work process, may be referred to the corresponding process in preceding method embodiment, will not be repeated here.
Additionally, compared with such scheme, the other three kinds of chip detecting methods that presently, there are are respectively, test pattern, sweep
Retouch the pattern that chain pattern and test pattern and scan chain are combined.Wherein, the test pattern specifically, embed in the chips
It is exclusively used in the test module of test；By the pin in the test module（In wafer stage, the pin is contact probe
Solder joint pedestal）Receive the test program of tester table transmission；The chip is run the test program, the chip is carried out
Test.The scanning chain pattern specifically, embed design for Measurability in the chips（Design For Testability, referred to as
DFT）Module；The connectedness and input/output relation of all Digital Logic nodes in chip are swept by the DFT block
Retouch, the chip is tested.The pattern that the test pattern and scan chain are combined specifically, embed described in the chips
Test module and the DFT block, when the test for digital circuit is carried out, using the scanning chain pattern；Entering the hand-manipulating of needle
During to the test of analog circuit or Analog-digital circuit, using test pattern.The above substantially elaborates these three patterns
Scheme, its corresponding specific method of testing is no longer expanded on further herein.
It is described in wafer scale OTP chip detecting methods provided in an embodiment of the present invention compared to said chip testing scheme
OTP chips can be included but is not limited to：Digital circuit chip, analog circuit chip and Digital Analog Hybrid Circuits chip.Also, supplying
Program and control the OTP chips to run the test program in the OTP ROM that user uses, farthest analog subscriber is used
Situation during chip, improves accuracy, reliability and the test coverage of test.Also, relative to above-mentioned pattern, due to this
Scheme is not required to change test program in test process, therefore, it is possible to realize the high frequency limit test to chip, with true
Protect the redundancy of the performance indications when user uses.
Optionally, after 102, if desired tested again for some crucial chip functions, then can 102 it
Afterwards, the chip can again be tested by any chip detecting method in above-mentioned three kinds of chip detecting methods.Its
The concrete scheme tested again will not be repeated here.
One of ordinary skill in the art will appreciate that：Realizing all or part of step of above-mentioned each method embodiment can lead to
The related hardware of programmed instruction is crossed to complete.Foregoing program can be stored in a computer read/write memory medium.The journey
Sequence upon execution, performs the step of including above-mentioned each method embodiment；And foregoing storage medium includes：ROM, RAM, magnetic disc or
Person's CD etc. is various can be with the medium of store program codes.
Finally it should be noted that：Various embodiments above is merely illustrative of the technical solution of the present invention, rather than its limitations；To the greatest extent
Pipe has been described in detail with reference to foregoing embodiments to the present invention, it will be understood by those within the art that：Its according to
The technical scheme described in foregoing embodiments can so be modified, or which part or all technical characteristic are entered
Row equivalent；And these modifications or replacement, the essence of appropriate technical solution is departed from various embodiments of the present invention technology
The scope of scheme.
Claims (8)
1. a kind of wafer scale one-off programming OTP chip detecting methods, it is characterised in that including：
According to test program, one-off programming OTP chips itself are tested, the advance burning of test program is described
In the one-off programming read-only storage OTP ROM for users to use of OTP chips；
After the completion of test, ultraviolet erasing treatment is carried out to the OTP chips, to recover the OTP ROM for users to use
One-off programming function；
The test program includes multiple sub- test programs；Each described corresponding at least one functional test of sub- test program；Institute
State according to the test program, the OTP chips itself are tested, specifically include：
Reset the OTP chips, obtains current selection mark；
If the selection mark is not one of default multiple marks, default initial by controlling the OTP chips to run
Sub- test program, functional test is carried out to the OTP chips, if the functional test passes through, is identified the selection as described in setting
Any mark in the multiple mark, and perform again it is described reset the OTP chips the step of；
Wherein, the initial sub- test program is any sub- test program in the multiple sub- test program, the multiple mark
Know and corresponded with other the sub- test programs in the multiple sub- test program in addition to the initial sub- test program；
It is right by controlling the OTP chips to run the selection mark if described identify the selection as one of the multiple mark
The sub- test program answered, functional test is carried out to the OTP chips, if the functional test passes through, sets the selection mark
Know the corresponding mark of any sub- test program not run by the OTP chips currently, and perform again described in the reset
The step of OTP chips, until the corresponding functional test of the multiple sub- test program is by test, then the OTP chips conjunction
Lattice, otherwise, the OTP chips are unqualified.
2. method according to claim 1, it is characterised in that it is described functional test is carried out to the OTP chips before, also
Including：
For corresponding functional test mark is added in the functional test；
It is described carry out the functional test to the OTP chips after, also include：
If the functional test does not pass through, output includes that the chip of the corresponding functional test mark of the functional test is unqualified
Message.
3. method according to claim 1 and 2, it is characterised in that one functional test of the sub- test program correspondence；Institute
State and any mark identified the selection as in the multiple mark is set, or do not identified the selection as described in the setting currently not
After the corresponding mark of any sub- test program run by the OTP chips, also include：
The corresponding test and excitation signal of the functional test is obtained, and the OTP chips are entered according to the test and excitation signal
Row performance parameter test；
It is described perform again it is described reset the OTP chips the step of, specifically include：
If the performance parameter test passes through, perform again it is described reset the OTP chips the step of.
4. method according to claim 3, it is characterised in that it is described according to the test and excitation signal to the OTP cores
Piece is carried out after performance parameter test, is also included：
If the performance parameter test does not pass through, the unqualified message of pio chip.
5. a kind of wafer scale one-off programming OTP apparatus for testing chip, it is characterised in that including：
First processing module, for according to test program, testing one-off programming OTP chips itself, the test journey
The advance burning of sequence is in the one-off programming read-only storage OTP ROM for users to use of the OTP chips；
Erasing module, for test after the completion of, ultraviolet erasing treatment is carried out to the OTP chips, to recover the confession user
The one-off programming function of the OTP ROM for using；
The test program includes multiple sub- test programs；Each described corresponding at least one functional test of sub- test program；Institute
Stating first processing module includes：
Acquiring unit, for the OTP chips that reset, obtains current selection mark；
First processing units, if being not one of default multiple marks for the selection mark, by controlling the OTP cores
The default initial sub- test program of piece operation, functional test is carried out to the OTP chips, if the functional test passes through, is set
The step of putting any mark identified the selection as in the multiple mark, and perform the reset OTP chips again；
Wherein, the initial sub- test program is any sub- test program in the multiple sub- test program, the multiple mark
Know and corresponded with other the sub- test programs in the multiple sub- test program in addition to the initial sub- test program；
Second processing unit, if identifying the selection as one of the multiple mark for described, is transported by controlling the OTP chips
The corresponding sub- test program of the row selection mark, functional test is carried out to the OTP chips, if the functional test passes through,
The current corresponding mark of any sub- test program do not run by the OTP chips is identified the selection as described in then setting, and again
The step of performing the reset OTP chips；
Judging unit, if judging the OTP cores by test for the corresponding functional test of the multiple sub- test program
Piece is qualified, otherwise, judges that the OTP chips are unqualified.
6. device according to claim 5, it is characterised in that described device also includes：
Mark module, for carrying out function survey to the OTP chips in the first processing units or the second processing unit
It is that corresponding functional test mark is added in the functional test before examination；
Output module, for carrying out function survey to the OTP chips in the first processing units or the second processing unit
After examination, if the functional test does not pass through, output includes the chip of the corresponding functional test mark of the functional test not
Qualified message.
7. device according to claim 6, it is characterised in that one functional test of the sub- test program correspondence, it is described
Device also includes：
Second processing module, for any in the multiple mark is identified the selection as described in first processing units setting
Mark, or the current any sub- survey not run by the OTP chips is identified the selection as described in second processing unit setting
After the corresponding mark of examination program, the corresponding test and excitation signal of the functional test is obtained, and believe according to the test and excitation
Number performance parameter test is carried out to the OTP chips；
The Second processing module, if be additionally operable to the performance parameter test passing through, it indicates that the acquiring unit is performed again
The step of reset OTP chips.
8. device according to claim 7, it is characterised in that
The output module, is additionally operable to enter the OTP chips according to the test and excitation signal in the Second processing module
After row performance parameter test, if the performance parameter test does not pass through, the unqualified message of pio chip.
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| CN106681855B (en) * | 2015-11-10 | 2019-07-05 | 澜起科技股份有限公司 | One Time Programmable storage device and the method that data check is carried out to it |
| CN106546902B (en) * | 2016-10-13 | 2019-09-10 | 芯海科技（深圳）股份有限公司 | A kind of volume production test method of OTP type MCU in not reserved test interface |
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