CN104410482A - Synchronization system for realizing WCDMA (wideband code division multiple access) by using TDM (timing-division multiplexing) based on FPGA (field programmable gate array) platform - Google Patents

Synchronization system for realizing WCDMA (wideband code division multiple access) by using TDM (timing-division multiplexing) based on FPGA (field programmable gate array) platform Download PDF

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CN104410482A
CN104410482A CN201410750454.0A CN201410750454A CN104410482A CN 104410482 A CN104410482 A CN 104410482A CN 201410750454 A CN201410750454 A CN 201410750454A CN 104410482 A CN104410482 A CN 104410482A
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wcdma
tdm
fpga
pilot energy
synchronous point
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CN104410482B (en
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方绍
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HONGXU INFORMATION TECHNOLOGY Co Ltd WUHAN
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HONGXU INFORMATION TECHNOLOGY Co Ltd WUHAN
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Abstract

The invention discloses a synchronization system for realizing a WCDMA (wideband code division multiple access) by using TDM (timing-division multiplexing) based on an FPGA (field programmable gate array) platform, and relates to a digital signal disposing technology in the field of mobile communication. The system comprises an existing WCDMA objective terminal (00) and a WCDMA wireless base station(40); the system is provided with a TDM data symbol generator (10), a pilot frequency energy calculator (20), a synchronous point position comparator (30) and a downgoing community searcher (50), wherein the WCDMA objective terminal (00), the TDM data symbol generator (10), the pilot frequency energy calculator (20) and the synchronous point position comparator (30) are successively connected; the WCDMA wireless base station (40), the downgoing community searcher (50) and the pilot frequency energy calculator (20) are successively connected. The system disclosed by the invention has the advantages and benefits that (1) the level of resources utilization of the FPGA is high; (2) the cost of a FPGA chip is reduced; (3) the area of the FPGA chip is diminished.

Description

TDM is used to realize WCDMA synchro system based on FPGA platform
Technical field
The present invention relates to the Digital Signal Processing in moving communicating field, particularly relate to one and use TDM (time division multiplexing) to realize WCDMA(Wideband CDMA Technology based on FPGA (field programmable gate array) platform) synchro system.
Background technology
Along with WCDMA terminal is more and more universal, miniaturization and the cost degradation thereof of WCDMA communication system equipment become trend, because the manufacturing process of fpga chip constantly promotes, than traditional DSP(digital signal processor in power consumption area and cost thereof) there is very large advantage, thus have good application prospect at Modern High-Speed digital processing field FPGA.Owing to carrying out carrying out search arithmetic needs skew sliding window repeatedly in WCDMA wireless signal synchronizing process, often slide and once calculate descrambling in a sliding window, connect expansion after pilot energy value, the slip deviation post got the pilot energy value then obtained from repeatedly sliding corresponding to wherein maximum value is last synchronous point position; If adopt traditional FPGA implementation method, the position offseting how many times sliding window then needs the hardware resource copied in how many FPGA to go to carry out corresponding calculating, because deviant in reality may get 32 or 64, the hardware resource in 32 or 64 FPGA repeated then is needed to go to carry out pilot energy computing, thus traditional implementation is large especially to the consumed resource of FPGA, and then make the cost area of FPGA and power consumption thereof have very large expense, have a strong impact on the efficiency that FPGA carries out Digital Signal Processing.
It is visible that to go to realize WCDMA synchro system limitation by traditional FPGA method very large, having very large inferior position to above the resource consumption of FPGA, FPGA is made to be unfavorable for synchronously searching for or existing in computing the application scenarios of similar synchronous search, have a strong impact on the range of application of FPGA, needed to improve.
Summary of the invention
Just being of the improving eyesight of this overcomes and existingly to realize in the synchronous search procedure of WCDMA the king-sized problem of the hardware resource consumption of FPGA in FPGA platform, provides a kind ofly to use TDM to realize WCDMA synchro system based on FPGA platform.
Realizing the object of the invention technical scheme is:
3.84Msps according to the spreading rate of 3GPP standard WCDMA, the slip deviant supposing actual demand ascending pilot channel synchronous point precise search is 32, the FPGA platform that setting is selected is common CYCLONE3 type chip, speed class is C8, first the clock frequency of the CYCLONE3 chip of FPGA is raised to 32 × 3.84MHz=122.88MHz by the TDM method for designing adopted in the present invention, then the 32 times of clock sources using the mode of TDM to utilize FPGA unnecessary being spreading rate according to clock frequency reach and change the method for designing in space with the time, thus make 32 required hardware resources of slip skew required 32 FPGA pilot energy calculating be merged into only needs 1 required hardware resource of FPGA pilot energy calculating, and then greatly improve the resource utilization of FPGA.
Specifically, native system comprises existing WCDMA target terminal, WCDMA wireless base station;
Be provided with tdm data symbol maker, pilot energy calculator, synchronous point location comparison device and descending cell searcher;
WCDMA target terminal, tdm data symbol maker, pilot energy calculator are connected successively with synchronous point location comparison device;
WCDMA wireless base station, descending cell searcher are connected successively with pilot energy calculator;
Described pilot energy calculator comprises pilot tone summation module in descrambling module mutual successively, despreading module, pilot tone normalization module, time slot, Computing module-square module and 15 time slot mould summed square modules.
The present invention has following advantages and good effect:
1. FPGA resource utilance is high: the resource utilization of FPGA can be promoted more than 32 times by the search arithmetic of being carried out WCDMA uplink synchronous point by TDM method for designing, if fpga chip is better, it is more that resource utilization can promote;
2. fpga chip cost reduces: the cost of fpga chip is directly proportional with the resource in its sheet, and the resource that FPGA can be made to consume by introducing the method for designing of TDM significantly reduces, thus control chip cost effectively, the competitiveness of improving product;
3. the area of fpga chip diminishes: it is that the volume of fpga chip can diminish much that the resource that FPGA consumes reduces the most directly change, thus is conducive to the miniaturization of equipment.
Accompanying drawing explanation
Fig. 1 is the block diagram of native system;
Fig. 2 is the block diagram of tdm data symbol maker;
Fig. 3 is the signal timing diagram of tdm data symbol maker;
Fig. 4 is the workflow diagram of synchro system;
In figure:
00-WCDMA target terminal;
10-tdm data symbol maker;
11-address generator,
12-selector,
13-register, 13-1-the 1st register, 13-2-the 2nd register,
13-N-the N register, N is natural number ,≤64;
20-pilot energy calculator,
21-descrambling module,
22-despreading module,
23-pilot tone normalization module,
Pilot tone summation module in 24-time slot,
25-Computing module-square module,
26-15 time slot mould summed square modules;
30-synchronous point location comparison device;
40-WCDMA wireless base station;
50-descending cell searcher.
english to Chinese
1, FPGA:Field Programmable Gate Array, field programmable gate array;
2, WCDMA:Wideband Code Division Multiple Access, Wideband CDMA Technology;
3, TDM:Timing-Division Multiplexing, time division multiplexing.
Embodiment
Describe in detail below in conjunction with drawings and Examples.
One, system
1, overall
As Fig. 1, native system comprises existing WCDMA target terminal 00, WCDMA wireless base station 40;
Be provided with tdm data symbol maker 10, pilot energy calculator 20, synchronous point location comparison device 30 and descending cell searcher 50;
WCDMA target terminal 00, tdm data symbol maker 10, pilot energy calculator 20 are connected successively with synchronous point location comparison device 30;
WCDMA wireless base station 40, descending cell searcher 50 are connected successively with pilot energy calculator 20;
2, functional part
1) WCDMA target terminal 00
WCDMA target terminal 00 is the terminal of the WCDMA standard based on international 3GPP standard, and being needs to carry out the synchronous terminal of target ascending pilot channel.
2) tdm data symbol maker 10
Tdm data symbol maker 10 is realizing based on the FPGA hardware platform of CYCLONE3 series, mainly with the hardware circuit that the LEs (logical block) above FPGA and Registers (register) builds.
Specifically, as Fig. 2, tdm data symbol maker 10 is made up of address generator 11, selector 12 and Parasites Fauna 13;
Its annexation is: address generator 11 is connected with selector 12 and Parasites Fauna 13 respectively, and selector 12 is connected with Parasites Fauna 13.
Address generator 11 OPADD selects signal to selector 12, the input signal data_in being input to tdm data symbol maker 10 outputs to Parasites Fauna 13, 13-1 in Parasites Fauna 13, 13-2, the output port Q of 13-N is connected successively with input port D, 13-1 in Parasites Fauna 13, 13-2, the output port Q of 13-N outputs to the input port of selector 12, data_in_en is the 13-1 that the enable signal of data_in outputs in Parasites Fauna 13, 13-2, the enable input port of 13-N and address generator 11, data_out is the Output rusults of final tdm data symbol maker 10.
The design sequential chart of tdm data symbol maker 10 as shown in Figure 3, suppose that the offset numbers required for pilot energy computing is N=4, in order to the pattern of changing space with the time carries out the time division multiplexing that TDM mode removes to carry out hardware resource, clock rate is set as 4 times of baseband signalling speed, in figure, clk1 is the clock through 4 times of frequencys multiplication, data_in is base band data input, data_in_en is the enable signal of base band data input, because it is that a unit carries out that follow-up pilot energy calculates according to a frame, associated window skew how many times just needs how many pilot energy calculators 20 to carry out pilot energy calculating, from x0, get a frame calculate for the first time, second time is then got a frame and is calculated from x1, the like, if carry out FPGA by conventional method to realize, skew how many times just needs how many pilot energy calculators 20 to go to calculate, thus FPGA needs a lot of resource that repeats to go to carry out Digital Signal Processing, and the object of tdm data symbol maker 10 generates the data_out signal shown in Fig. 3, the final output format of data_out signal is as can be seen from Figure 3:
data_out: x3 x2 x1 x0 x4 x3 x2 x1 x5 x4 x3 x2 x6 x5 x4 x3 x7 x6 x5 x4
ch_index: 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0
Wherein ch_index is that data_out exports corresponding channel label, the output of channel label 0 is from left to right followed successively by x0, x1, x2, x3, x4 the like, the output of channel label 1 is from left to right followed successively by x1, x2, x3, x4, x5 the like, thus be the input data required for offset numbers correspondence by the data of the numbering correspondence of the data channel after tdm data symbol generator 10, and then the data after tdm data symbol generator can be input in pilot energy calculator 20 and carry out time division multiplexing.The structured flowchart of composition graphs 2, the base band data data_in being input to tdm data symbol maker 10 is input to 4 registers in follow-up register group 13 successively under the driving of the enable signal data_in_en of input, thus achieve the function of shift register, suppose that the input data of data_in are x0, x1, x2 ..., value Changing Pattern under the driving of input data_in and data_in_en of the output of 4 registers in Parasites Fauna is as follows:
Input number of times PRE13-1 exports PRE13-2 and exports PRE13-3 output PRE13-4 output
0 x0 0 0 0
1 x1 x0 0 0
2 x2 x1 x0 0
3 x3 x2 x1 x0
4 x4 x3 x2 x1
Can find out to obtain time-multiplexed data from the Changing Pattern of register above, only need in four beats after input data_in_en enable signal by address generator 11 produce to 13-1,13-2 ..., 13-N export address, thus result exported by selector 12, thus produce final time multiplexing signal output.
The major function of tdm data symbol maker 10 is that the base band data base band data of input being converted to TDM form exports, thus has utilization pilot energy calculator 20 below to carry out the resource multiplex of repeatedly pilot energy computing.
3) pilot energy calculator 20
Pilot energy calculator 20 is realizing based on the FPGA hardware platform of CYCLONE3 series, and LEs (logical block), the Registers (register) of main FPGA and M9K (memory) carry out the hardware circuit built.
The module embedded comprises pilot tone summation module 24 in descrambling module 21 mutual successively, despreading module 22, pilot tone normalization module 23, time slot, Computing module-square module 25 and 15 time slot mould summed square modules 26.
* descrambling module 21: the base band data of input is carried out descrambling by main realization, and the baseband signal that WCDMA terminal sends all is through the data after scrambling process, and descrambling module 21 carries out descrambling operation by the data after scrambling;
* despreading module 22: the pilot channel data in code division multiple access is extracted by main realization, the data of each sub-channels sent in WCDMA agreement are undertaken sending by the mode of code division multiple access, in order to the pilot channel data extracted wherein must carry out de-spreading operation;
* pilot tone normalization module 23: mainly the pilot data after despreading is normalized, normalized object is the pilot data making to receive is positive logarithmic data, thus is beneficial to pilot tone summation module 24 in follow-up time slot and carries out the cumulative of positive number;
* pilot tone summation module 24 in time slot: mainly the pilot data after the normalization in each for WCDMA time slot is carried out accumulating operation;
* Computing module-square module 25: the data after mainly pilot tone in each time slot being added carry out asking mould square;
* 15 time slot mould summed square modules 26: mainly 15 time slots are obtained ask mould summed square after result add up, thus obtain the energy value of final pilot energy computing.
The major function of pilot energy calculator 20 is the tdm data of input is carried out to the calculating of pilot energy, thus calculate pilot energy value corresponding to each deviation post, thus prepare for follow-up synchronous point location comparison device 30 goes to compare synchronous point deviation post.
4) synchronous point location comparison device 30
Synchronous point location comparison device 30 is used on the FPGA hardware platform based on CYCLONE3 series to realize, major function 32 slips is offset the pilot energy value result of calculation obtained compare thus obtain the deviant corresponding to maximum pilot energy value, and then obtain synchronous point position offset point, finally achieve the simultaneous operation of WCDMA.
5) WCDMA wireless base station 40
WCDMA wireless base station 00 is the general transmitting base station based on international 3GPP standard, and the standard of base station is WCDMA standard.
6) descending cell searcher 50
Descending cell searcher 50 mainly carries out Cell searching and synchronous to the downstream signal of base station, thus the synchronous point obtaining WCDMA position is roughly to pilot energy calculator 20.
3, the working mechanism of native system:
In WCDMA synchronizing process, inadequate by descending cell searcher 50 sync bit searched out roughly, can have in practical communication system that equipment room crystal oscillator is asynchronous, the factor such as the time delay of Signal transmissions and the time delay of signal transacting, thus pilot energy must be carried out by the mode of chip offset and calculate and obtain accurate synchronous point position.
When realize pilot energy calculating in WCDMA synchronizing process with FPGA time, use traditional F PGA method to realize synchronizing process sliding window skew how many times just to need to repeat how many hardware resources and go to carry out pilot energy calculating, thus bring very large challenge to FPGA resource utilance, the method that the present invention proposes is based on TDM (time division multiplexing) mode, first by the clock frequency frequency multiplication of FPGA to 3.84Msps × skew number of times, then the base band data 3.84Msps of input is carried out the generation of tdm data by tdm data symbol maker 10, thereafter the tdm data of generation is input to the calculating that pilot energy calculator 20 carries out the pilot energy of tdm data, thus only need single pilot energy calculator 20 consume FPGA hardware resource just can calculate the required N number of pilot energy calculator of N skew calculate needed for FPGA hardware resource, finally the result of the pilot energy calculator 20 through TDM process is exported to the maximum that synchronous point location comparison device 30 obtains final offset point, thus obtain the particular location of synchronous point.
Core of the present invention is exactly by the base band data of input being carried out reconfiguring to construct and being suitable for follow-up pilot energy calculator and carrying out the multiplexing tdm data form of TDM of data, thus make use of the time division multiplexing that idle clock sources carries out hardware, and then significantly save the hardware resource that FPGA carries out required for pilot energy calculating, improve the service efficiency of the hardware resource of FPGA.
Two, TDM is used to realize the workflow of WCDMA synchro system
As Fig. 4, the workflow that utilization TDM realizes WCDMA synchro system is as follows:
1. descending cell searcher 50 carries out the search and synchronous-201 of WCDMA community,
The cell information of equipment periphery and synchronous point positional information, the synchronous point positional information wherein obtained can infer the approximate location of uplink synchronous point position;
2. judge descending cell searcher 50 whether with WCDMA cell synchronous-202,
Be enter step 3., otherwise jump to step 1.;
3. receive upstream baseband data carry out tdm data generation to tdm data symbol maker 10 and find synchronous search skew initial point position-203,
Wherein the prediction equation of the synchronous point position that can calculate according to descending cell searcher 50, ascending pilot channel synchronous point position and 3GPP obtains, in practical communication system, but calculate that the synchronous point position obtained is inaccurate, need follow-up simultaneous operation;
4. TDM time division multiplexing mode is used to carry out pilot energy calculating-204 in pilot energy calculator,
Wherein pilot energy account form distinguishes the pilot energy of each deviant in time by channel number mode, thus achieve and realize repeated operation with single hardware cell;
5. the pilot energy obtained compares and obtains final offset point position-205 by synchronous point location comparison device, thus finally obtains accurate synchronous point position.

Claims (4)

1. use TDM to realize a WCDMA synchro system based on FPGA platform, comprise existing WCDMA target terminal (00), WCDMA wireless base station (40);
It is characterized in that:
Be provided with tdm data symbol maker (10), pilot energy calculator (20), synchronous point location comparison device (30) and descending cell searcher (50);
WCDMA target terminal (00), tdm data symbol maker (10), pilot energy calculator (20) are connected successively with synchronous point location comparison device (30);
WCDMA wireless base station (40), descending cell searcher (50) are connected successively with pilot energy calculator (20).
2. realize WCDMA synchro system by utilization TDM according to claim 1, it is characterized in that:
Described tdm data symbol maker (10) is made up of address generator (11), selector (12) and Parasites Fauna (13);
Address generator (11) is connected with selector (12) and Parasites Fauna (13) respectively, and selector (12) is connected with Parasites Fauna (13).
3. realize WCDMA synchro system by utilization TDM according to claim 1, it is characterized in that:
The module that described pilot energy calculator (20) embeds comprises pilot tone summation module (24) in descrambling module (21) mutual successively, despreading module (22), pilot tone normalization module (23), time slot, Computing module-square module (25) and 15 time slot mould summed square module (26).
4. realize the workflow of WCDMA synchro system by utilization TDM according to claim 1, it is characterized in that:
1. descending cell searcher (50) carries out the search of WCDMA community and synchronous (201),
The cell information of equipment periphery and synchronous point positional information, the synchronous point positional information wherein obtained can infer the approximate location of uplink synchronous point position;
2. judge descending cell searcher (50) whether with WCDMA cell synchronous (202),
Be enter step 3., otherwise jump to step 1.;
3. receive upstream baseband data carry out tdm data generation to tdm data symbol maker (10) and find synchronous search skew initial point position (203),
Wherein the prediction equation of the synchronous point position that can calculate according to descending cell searcher (50), ascending pilot channel synchronous point position and 3GPP obtains, in practical communication system, but calculate that the synchronous point position obtained is inaccurate, need follow-up simultaneous operation;
4. use TDM time division multiplexing mode in pilot energy calculator, carry out pilot energy calculating (204),
Wherein pilot energy account form distinguishes the pilot energy of each deviant in time by channel number mode, thus achieve and realize repeated operation with single hardware cell;
5. the pilot energy obtained compares and obtains final offset point position (205) by synchronous point location comparison device, thus finally obtains accurate synchronous point position.
CN201410750454.0A 2014-12-08 2014-12-08 WCDMA synchronization systems are realized with TDM based on FPGA platform Active CN104410482B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106357277A (en) * 2016-08-29 2017-01-25 武汉虹旭信息技术有限责任公司 Method to enhance WCDMA weak signal detection based on energy screening device for SDR platform
CN106788586A (en) * 2016-11-22 2017-05-31 武汉虹旭信息技术有限责任公司 TD SCDMA cell searching systems and its method based on FPGA

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101005304A (en) * 2006-01-16 2007-07-25 北京三星通信技术研究有限公司 Apparatus and method for searching cell in radio communication system
US20110292858A1 (en) * 2008-10-24 2011-12-01 Alan Edward Jones Broadcasting communication in a wireless communication system
CN102292952A (en) * 2008-11-27 2011-12-21 Ip无线有限公司 Communication system, communication units, and method for employing a pilot transmission scheme

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101005304A (en) * 2006-01-16 2007-07-25 北京三星通信技术研究有限公司 Apparatus and method for searching cell in radio communication system
US20110292858A1 (en) * 2008-10-24 2011-12-01 Alan Edward Jones Broadcasting communication in a wireless communication system
CN102292952A (en) * 2008-11-27 2011-12-21 Ip无线有限公司 Communication system, communication units, and method for employing a pilot transmission scheme

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106357277A (en) * 2016-08-29 2017-01-25 武汉虹旭信息技术有限责任公司 Method to enhance WCDMA weak signal detection based on energy screening device for SDR platform
CN106357277B (en) * 2016-08-29 2018-08-31 武汉虹旭信息技术有限责任公司 Device is selected to enhance WCDMA infant laser signal detection methods with energy brush based on SDR platforms
CN106788586A (en) * 2016-11-22 2017-05-31 武汉虹旭信息技术有限责任公司 TD SCDMA cell searching systems and its method based on FPGA
CN106788586B (en) * 2016-11-22 2018-10-30 武汉虹旭信息技术有限责任公司 A kind of small region search method of the cell searching system based on FPGA platform TD-SCDMA

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