CN104409509A - Thin film transistor - Google Patents
Thin film transistor Download PDFInfo
- Publication number
- CN104409509A CN104409509A CN201410558127.5A CN201410558127A CN104409509A CN 104409509 A CN104409509 A CN 104409509A CN 201410558127 A CN201410558127 A CN 201410558127A CN 104409509 A CN104409509 A CN 104409509A
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- China
- Prior art keywords
- edge
- film transistor
- segment
- raceway groove
- limit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000010409 thin film Substances 0.000 title claims abstract description 34
- 238000002834 transmittance Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000003292 diminished effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Chemical & Material Sciences (AREA)
- Thin Film Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses a thin film transistor which comprises a grid electrode, a source electrode and a drain electrode, wherein the source electrode and the drain electrode are parallelly arranged above the grid electrode; the source electrode comprises a first edge; the drain electrode comprises a second edge; the first edge is opposite to the second edge; a channel is formed between the first edge and the second edge; the first edge and the second edge are nonlinear; the dimension of the channel in extension directions of the first edge and the second edge is the width of the channel; and in a width direction of the channel, the channel is gradually contracted and narrowed from the middle to the two ends. The thin film transistor can allow the light transmittance of each part of the channel of the thin film transistor to be consistent, and the quality of the thin film transistor is improved.
Description
Technical field
The present invention relates to the thin-film transistor element in liquid-crystal apparatus.
Background technology
In current large size TFT-LCD, the source electrode of thin-film transistor is parallel just right design with drain electrode, thin-film transistor comprises grid (not shown), source electrode 20 and drain electrode 40, refer to Fig. 1, the top of grid is located in source electrode 20 and drain electrode 40 side by side, and source electrode 20 and drain electrode 40 edges respect to one another are parallel to each other, and that is form the raceway groove 60 of straight shape between source electrode 20 and drain electrode 40.Have raceway groove 60 between source electrode 20 and drain electrode 40 for pellicle structure, source electrode 20 and drain electrode 40 regions are all completely lighttight, and raceway groove 60 place is semi-transparent, and raceway groove 60 comprises channel width W and channel length L.Only be shining into from the both sides of raceway groove, because raceway groove two ends light-receiving area is greater than centre, after exposure, the photoresistance at two ends is caused to be exposed to the sun out, form arcuation, refer to Fig. 2, now the channel width W of raceway groove 60 has diminished, have impact on the charge rate of thin-film transistor, time serious, raceway groove 60 can be punched, and namely channel width W is 0, material is thus formed open circuit, thin-film transistor is scrapped.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of thin-film transistor, in exposure process, can improve the situation that channel width diminishes, and ensures the charge rate of thin-film transistor, improves its quality.
To achieve these goals, embodiment of the present invention provides following technical scheme:
The present invention has supplied a kind of thin-film transistor, comprise grid, source electrode and drain electrode, described source electrode and described drain electrode are disposed in parallel in the top of described grid, described source electrode comprises the first limit, described drain electrode comprises Second Edge, described first limit and described Second Edge are oppositely arranged, raceway groove is formed between described first limit and described Second Edge, described first limit and described Second Edge are all in non-linear shape, the direction of the extension along described first limit and described Second Edge of described raceway groove is of a size of the width of described raceway groove, on the Width of described raceway groove, described raceway groove is narrowed to two ends gradually closing contracting by centre.
Wherein, described first limit comprise connect successively first paragraph, second segment and the 3rd section, described first paragraph and the described 3rd section of both sides being symmetricly set on described second segment, described first paragraph comprises the link that is connected to described second segment and the free end away from described second segment, described first paragraph from described link to described free end gradually near described Second Edge.
Wherein, described Second Edge is identical with the shape on described first limit.
Wherein, described second segment is linearly.
Wherein, described first paragraph and described 3rd section all linearly, and angle between described first paragraph and described second segment and the angle between described 3rd section and described second segment are obtuse angle.
Wherein, described first paragraph and described 3rd section all curved, and all in rounding off between described first paragraph and described second segment and between described 3rd section and described second segment.
Wherein, the channel length of the mid portion of described raceway groove is 4.5um, and the channel length at the two ends of described raceway groove is greater than 2.5um and is less than 4.5um.
The present invention is by making an amendment source electrode with the relative limit of drain electrode, and namely described first limit and described Second Edge are all in non-linear shape, makes like this on the Width of described raceway groove, and described raceway groove is narrowed to two ends gradually closing contracting by centre.In the process of exposure, it is suitable with the light energy that centre position accepts that light energy that the design narrowed makes the raceway groove two ends place of thin-film transistor accept is shunk at the two ends of raceway groove, namely each several part light transmittance of thin film transistor channel can be made consistent, improve the quality of thin-film transistor.
Accompanying drawing explanation
In order to be illustrated more clearly in technical scheme of the present invention, be briefly described to the accompanying drawing used required in execution mode below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained as these accompanying drawings.
Fig. 1 is the source electrode of thin-film transistor of the prior art and the schematic diagram of drain electrode.
Fig. 2 is the situation schematic diagram after exposure of the thin-film transistor of the prior art shown in Fig. 1.
Fig. 3 is the schematic diagram of the thin-film transistor that one embodiment of the present invention provides.
Fig. 4 is another schematic diagram of the thin-film transistor that one embodiment of the present invention provides.
Embodiment
Below in conjunction with the accompanying drawing in embodiment of the present invention, the technical scheme in embodiment of the present invention is clearly and completely described.
Refer to Fig. 3 and Fig. 4, the present invention has supplied a kind of thin-film transistor 100, and comprise grid 10, source electrode 30 and drain electrode 50, described source electrode 30 and described drain electrode 50 are disposed in parallel in the top of described grid 10.In the present embodiment, grid 10 is arranged on a substrate (not shown).Substrate is glass substrate, and it also can be made up of other materials, and can be a flexible base plate or a non-flexible base plate.The material of grid 10 such as comprises molybdenum (Mo) or aluminium (Al), and its material also can be other metals or metallic compound or multiple layer combination.
Described source electrode 30 comprises the first limit 32, described drain electrode 50 comprises Second Edge 52, described first limit 32 is oppositely arranged with described Second Edge 52, raceway groove 70 is formed between described first limit 32 and described Second Edge 52, described first limit 32 and described Second Edge 52 are all in non-linear shape, the direction of the extension along described first limit 32 and described Second Edge 52 of described raceway groove 70 is of a size of the width of described raceway groove 70, namely the size of W is labeled as in Fig. 3, on the Width of described raceway groove 70, described raceway groove 70 is narrowed to two ends gradually closing contracting by centre.
The present invention is by making an amendment the relative limit (i.e. the first limit 32 and Second Edge 52) of source electrode 30 with drain electrode 50, namely described first limit 32 and described Second Edge 52 are all in non-linear shape, make like this on the Width of described raceway groove 70, described raceway groove 70 is narrowed to two ends gradually closing contracting by centre.In the process of exposure, it is suitable with the light energy that centre position accepts that light energy that the design narrowed makes the raceway groove 70 two ends place of thin-film transistor accept is shunk at the two ends of raceway groove 70, namely each several part light transmittance of thin film transistor channel 70 can be made consistent, improve the quality of thin-film transistor.
Described first limit 32 and the design of described Second Edge 52 all in non-linear shape, in concrete execution mode, first limit 32 and Second Edge 52 can be designed to be made up of many line segments, also can the first limit 32 and Second Edge 52 be designed curved, or the first limit 32 and Second Edge 52 can be designed to be made up of straightway and curved line.The present invention does not limit the concrete shape of the first limit 32 and Second Edge 52, as long as described first limit 32 can be met with described Second Edge 52 all in non-linear shape, and described raceway groove 70 is narrowed to two ends gradually closing contracting by centre, can realize making each several part printing opacity of thin film transistor channel 70 to fill unanimously, improve the quality of thin-film transistor.
Specifically, as shown in Figure 4, described first limit 32 comprise connect successively first paragraph 322, second segment 324 and the 3rd section 326, described first paragraph 322 and described 3rd section of 326 both sides being symmetricly set on described second segment 324, described first paragraph 322 comprises the link that is connected to described second segment 324 and the free end away from described second segment 324, described first paragraph 322 from described link to described free end gradually near described Second Edge 52.That is, in the position of described free end, the distance between the first limit 32 and Second Edge 52 is minimum.
In present embodiment, described Second Edge 52 is identical with the shape on described first limit 32.Described Second Edge 52 and described first limit 32 are symmetrically distributed in the both sides of raceway groove 70.
In present embodiment, described second segment 324 is linearly.
In a kind of execution mode, described first paragraph 322 and described 3rd section 326 all linearly, and angle between described first paragraph 322 and described second segment 324 and described 3rd section of angle between 326 and described second segment 324 are obtuse angle.
In another kind of execution mode, described first paragraph 322 and described 3rd section 326 all curved, and between described first paragraph 322 and described second segment 324 and described 3rd section between 326 and described second segment 324 all in rounding off.
Specifically, raceway groove 70 length of the mid portion of described raceway groove 70 is 4.5um, and raceway groove 70 length at the two ends of described raceway groove 70 is greater than 2.5um and is less than 4.5um.
The above is the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications are also considered as protection scope of the present invention.
Claims (7)
1. a thin-film transistor, comprise grid, source electrode and drain electrode, described source electrode and described drain electrode are disposed in parallel in the top of described grid, described source electrode comprises the first limit, described drain electrode comprises Second Edge, described first limit and described Second Edge are oppositely arranged, raceway groove is formed between described first limit and described Second Edge, it is characterized in that, described first limit and described Second Edge are all in non-linear shape, the direction of the extension along described first limit and described Second Edge of described raceway groove is of a size of the width of described raceway groove, on the Width of described raceway groove, described raceway groove is narrowed to two ends gradually closing contracting by centre.
2. thin-film transistor as claimed in claim 1, it is characterized in that, described first limit comprise connect successively first paragraph, second segment and the 3rd section, described first paragraph and the described 3rd section of both sides being symmetricly set on described second segment, described first paragraph comprises the link that is connected to described second segment and the free end away from described second segment, described first paragraph from described link to described free end gradually near described Second Edge.
3. thin-film transistor as claimed in claim 2, it is characterized in that, described Second Edge is identical with the shape on described first limit.
4. thin-film transistor as claimed in claim 3, it is characterized in that, described second segment is linearly.
5. thin-film transistor as claimed in claim 3, is characterized in that, described first paragraph and described 3rd section all linearly, and angle between described first paragraph and described second segment and the angle between described 3rd section and described second segment are obtuse angle.
6. thin-film transistor as claimed in claim 3, is characterized in that, described first paragraph and described 3rd section all curved, and all in rounding off between described first paragraph and described second segment and between described 3rd section and described second segment.
7. the thin-film transistor as described in claim 1-6 any one, is characterized in that, the channel length of the mid portion of described raceway groove is 4.5um, and the channel length at the two ends of described raceway groove is greater than 2.5um and is less than 4.5um.
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410558127.5A CN104409509A (en) | 2014-10-20 | 2014-10-20 | Thin film transistor |
KR1020177011412A KR101962554B1 (en) | 2014-10-20 | 2014-10-24 | Thin film transistor |
GB1904917.0A GB2569718B (en) | 2014-10-20 | 2014-10-24 | Thin film transistor |
JP2017506742A JP6383486B2 (en) | 2014-10-20 | 2014-10-24 | Thin film transistor |
US14/411,065 US9588392B2 (en) | 2014-10-20 | 2014-10-24 | Thin-film transistor |
GB1702975.2A GB2543999B (en) | 2014-10-20 | 2014-10-24 | Thin film transistor |
PCT/CN2014/089425 WO2016061808A1 (en) | 2014-10-20 | 2014-10-24 | Thin film transistor |
RU2017113550A RU2672979C2 (en) | 2014-10-20 | 2014-10-24 | Thin-film transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410558127.5A CN104409509A (en) | 2014-10-20 | 2014-10-20 | Thin film transistor |
Publications (1)
Publication Number | Publication Date |
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CN104409509A true CN104409509A (en) | 2015-03-11 |
Family
ID=52647124
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201410558127.5A Pending CN104409509A (en) | 2014-10-20 | 2014-10-20 | Thin film transistor |
Country Status (7)
Country | Link |
---|---|
US (1) | US9588392B2 (en) |
JP (1) | JP6383486B2 (en) |
KR (1) | KR101962554B1 (en) |
CN (1) | CN104409509A (en) |
GB (2) | GB2569718B (en) |
RU (1) | RU2672979C2 (en) |
WO (1) | WO2016061808A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019119456A1 (en) * | 2017-12-23 | 2019-06-27 | 深圳市柔宇科技有限公司 | Thin film transistor, array substrate and display screen |
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US5612565A (en) * | 1993-12-08 | 1997-03-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having channel boundary with uneven shape |
JPH10270699A (en) * | 1997-03-26 | 1998-10-09 | Seiko Epson Corp | Thin-film transistor and liquid crystal display and cmos circuit using thin-film transistor thereof |
CN1584718A (en) * | 2003-08-21 | 2005-02-23 | Nec液晶技术株式会社 | LCD device including a TFT for reducing leakage current |
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JP2002203970A (en) | 2000-12-28 | 2002-07-19 | Matsushita Electric Ind Co Ltd | Thin film transistor and liquid crystal display using it |
JP4628040B2 (en) * | 2004-08-20 | 2011-02-09 | 株式会社半導体エネルギー研究所 | Manufacturing method of display device provided with semiconductor element |
TWI330406B (en) * | 2006-12-29 | 2010-09-11 | Au Optronics Corp | A method for manufacturing a thin film transistor |
US8349671B2 (en) * | 2007-09-03 | 2013-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Methods for manufacturing thin film transistor and display device |
JP2009130229A (en) * | 2007-11-27 | 2009-06-11 | Semiconductor Energy Lab Co Ltd | Method of manufacturing semiconductor device |
US7910929B2 (en) | 2007-12-18 | 2011-03-22 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP5496500B2 (en) * | 2007-12-18 | 2014-05-21 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP5542364B2 (en) * | 2008-04-25 | 2014-07-09 | 株式会社半導体エネルギー研究所 | Method for manufacturing thin film transistor |
US7982247B2 (en) | 2008-08-19 | 2011-07-19 | Freescale Semiconductor, Inc. | Transistor with gain variation compensation |
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- 2014-10-24 GB GB1904917.0A patent/GB2569718B/en not_active Expired - Fee Related
- 2014-10-24 KR KR1020177011412A patent/KR101962554B1/en active IP Right Grant
- 2014-10-24 GB GB1702975.2A patent/GB2543999B/en not_active Expired - Fee Related
- 2014-10-24 RU RU2017113550A patent/RU2672979C2/en active
- 2014-10-24 JP JP2017506742A patent/JP6383486B2/en active Active
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WO2019119456A1 (en) * | 2017-12-23 | 2019-06-27 | 深圳市柔宇科技有限公司 | Thin film transistor, array substrate and display screen |
CN111433917A (en) * | 2017-12-23 | 2020-07-17 | 深圳市柔宇科技有限公司 | Thin film transistor, array substrate and display screen |
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GB201702975D0 (en) | 2017-04-12 |
KR20170063843A (en) | 2017-06-08 |
GB2543999A (en) | 2017-05-03 |
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GB2543999B (en) | 2019-12-11 |
US9588392B2 (en) | 2017-03-07 |
GB2569718B (en) | 2019-12-11 |
JP2017524259A (en) | 2017-08-24 |
KR101962554B1 (en) | 2019-07-17 |
JP6383486B2 (en) | 2018-08-29 |
WO2016061808A1 (en) | 2016-04-28 |
GB2569718A9 (en) | 2019-07-03 |
GB201904917D0 (en) | 2019-05-22 |
RU2017113550A (en) | 2018-10-19 |
RU2672979C2 (en) | 2018-11-21 |
RU2017113550A3 (en) | 2018-10-19 |
GB2569718A (en) | 2019-06-26 |
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