CN104409097B - A kind of utilization power detecting realizes the Low-power-consumptiocontrol control method of non-volatile asynchronous loogical circuit - Google Patents
A kind of utilization power detecting realizes the Low-power-consumptiocontrol control method of non-volatile asynchronous loogical circuit Download PDFInfo
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- CN104409097B CN104409097B CN201410529867.6A CN201410529867A CN104409097B CN 104409097 B CN104409097 B CN 104409097B CN 201410529867 A CN201410529867 A CN 201410529867A CN 104409097 B CN104409097 B CN 104409097B
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Abstract
A kind of utilization power detecting realizes the Low-power-consumptiocontrol control method of non-volatile asynchronous loogical circuit, and this method has three big steps:Step one:Obtain Vdd monitoring signals;Need design one to monitor in real time in circuit and handle the module of Vdd fluctuations, the effect of the module is that the pressure drop that logic computing unit is switched to caused Vdd is recorded, and to amplitude and frequency sensitive, corresponding response can be made to the change of Vdd fluctuating ranges and frequency, control the decision-making of computing module closing/startup to provide foundation to change using Vdd;Step 2:Using the Vdd monitoring signals obtained in step one, the working condition whether computing module takes corresponding operation to carry out adaptive circuit is determined;Step 3:Feedback to Vdd is operated by computing module, Mobile state adjustment is entered to voltage threshold, to obtain optimal voltage threshold value.The quiescent dissipation of circuit is greatly reduced by feeding back closing/startup to control computing unit in real time in the present invention.
Description
Technical field
Asynchronous logic electricity of the present invention based on non-volatile device (such as MTJ, memristor or phase transition storage)
Road, the characteristic of different responses is carried out using asynchronous circuit, using the means of feedback control, it is proposed that one to different task circuit
The Low-power-consumptiocontrol control method that non-volatile asynchronous loogical circuit is realized using power detecting is planted, it is a kind of non-volatile using device
Property characteristic dynamically reduce the control method of power consumption in adjustment asynchronous circuit working cell.Belong to non-volatile low consumption circuit design
Field.
Background technology
With the high speed development of integrated circuit, transistor integrated level increases sharply, and circuit complexity constantly increases, and synchronously sets
Limitation and defect of the meter technology in design, manufacture and application are increasingly highlighted.Asynchronous circuit design method is used as new design
Method and the supplement to synchronous design method, the study hotspot as system-on-chip designs.Compared with synchronization system, asynchronous system
Because dynamic power consumption can be greatly reduced in no synchronised clock, and there is stronger robustness to the process deviation of integrated circuit,
This is significant for the integrated circuit based on deep-submicron processing technology.
Semiconductor device such as MTJ, memristor and phase transition storage etc. are except low energy consumption, also with non-easy
The good characteristic such as mistake and radioresistance.Their applications in integrated circuits cause design non-volatile logic circuit turns into can
Energy.
Compared with traditional synchronous circuit, there is the advantage of following several respects using the asynchronous circuit of non-volatile logic:
1. asynchronous circuit uses modularized design, perform calculating task and triggered independent of clock signal, pass through each intermodule
Communication transmit completion signal.Compared with synchronous circuit signal time discretization, the signal time of asynchronous circuit is continuous, signal
Can at any time effectively, once signal can effectively be sent out immediately, without waiting the specific edging trigger of clock signal as synchronous circuit.
The speed ability of asynchronous design is better than Synchronization Design in theory.
2. low-power consumption.The propulsion that is acted in asynchronous circuit and transmit not against timeticks, but by computing module it
Between handshake interaction carry out.Whether handshake is sent out is determined by the whether effective of data, the mode of this data-driven
So that circuit will not be operated unnecessarily, dynamic power consumption is significantly reduced.
3. it is non-volatile.Due to employing the device of the spin properties based on electronics in circuit, data are in computing module
Storage the extra energy need not be expended to maintain, quiescent dissipation on the one hand can be greatly reduced, on the other hand can realize and be
The quick startup of system.
Compared with ripe synchronous design method, asynchronous design methodologies also have the problem of some are specific.In asynchronous circuit
In, because signal effective time is not discretized, the working condition at the circuit that required careful consideration during design each moment, to how
The metastable state occurred in process circuit will take in.In order to realize the design object of low consumption circuit, computing module pass is provided
The boundary condition for closing/starting turns into the particular problem faced in design.In order to solve this problem, the present invention utilizes power supply
Voltage Vdd real-time monitoring signals, using the method for negative feedback control, to provide the optimal voltage of computing module closing/startup
Threshold value, it is to avoid cause the metastable state of circuit, while realizing the design object of low-power consumption.
The content of the invention
1st, goal of the invention:It is an object of the invention to provide one kind non-volatile asynchronous loogical circuit is realized using power detecting
Low-power-consumptiocontrol control method, it be use a kind of new non-volatile asynchronous circuit, based on Vdd voltage monitoring, pass through feedback
To control closing/startup of computing unit in real time, the quiescent dissipation of circuit is greatly reduced.
2nd, technical scheme:In integrated circuit, supply voltage Vdd can produce fluctuation with the different of the working condition of circuit,
When circuit is in underload working condition, the amplitude and frequency of this fluctuation can all reduce, on the contrary then the amplitude and frequency that fluctuate
Rate can increase.Due in asynchronous circuit, circuit, can be independent of clock, and again because employing with non-by data-driven
The device of volatibility, maintains data without power supply.So being turned off in computing unit idle, opened again when task arrives
It is dynamic, it can very significantly reduce the quiescent dissipation of circuit.But when circuit is in high load capacity working condition, if continually closing
Close/start computing unit, the metastable state of circuit is caused, bigger energy consumption can be caused on the contrary.
Vdd-tracking is a kind of real-time observation circuit supply voltage Vdd technology, by the technology, can obtain change
The Vdd signals of change, this signal can as decision circuitry working condition important evidence.
A critical condition can be found, when Vdd frequency and amplitude are more than the critical condition, it is believed that circuit is in height
Load operating conditions, if closing idle computing unit, are likely to result in circuit metastable state.And be somebody's turn to do when Vdd frequency and amplitude are less than
During critical condition, close idle condition computing unit and cause the metastable probability of circuit to greatly reduce, then the critical condition
The foundation that can be closed as computing module of judgement.Therefore, the key of problem is:Provide the side of asynchronous computing unit closing
Boundary's condition, it is to avoid cause continually switch oscillating, boundary condition is provided in the form of voltage threshold.
In actual applications, because the task that circuit is performed changes, the live load of circuit also changes therewith, therefore
The voltage threshold provided by Vdd signals can change because of the difference of circuit load:Voltage threshold is provided by Vdd signals, and electric
Pressure threshold value determines the operation that computing module is taken, and the working condition of computing module can influence Vdd fluctuation in turn.So logical
Introducing feedback control is crossed, optimal voltage threshold can be found, the target of circuit static power consumption optimum is realized.
In summary, a kind of utilization power detecting of the invention realizes the low power consumption control side of non-volatile asynchronous loogical circuit
Method, this method is comprised the following steps that:
Step one:Obtain Vdd monitoring signals.As shown in Figure 1, design one is needed to monitor and locate in real time in circuit
The module of Vdd fluctuations is managed, the effect of the module is that the pressure drop that logic computing unit is switched to caused Vdd is recorded, and
To amplitude and frequency sensitive, corresponding response can be made to the change of Vdd fluctuating ranges and frequency, for using Vdd change come
The decision-making of computing module closing/startup is controlled to provide foundation.
Step 2:As shown in Figure 1, using the Vdd monitoring signals obtained in step one, determine whether computing module is taken
Corresponding operation carrys out the working condition of adaptive circuit.When Vdd fluctuation range is in threshold value, circuit working state is considered as
Low load condition, now idle computing module will enter closed mode, and when needing to start the module, cooperate with unit
(module of data interaction will be carried out with the module) is responsible for sending activation signal, starts the computing module closed and enters work
Pattern.As shown in Figure 1, each computing unit enters before closed mode, it is necessary to store data in non-volatile device.
When computing unit is activated again, data are read from non-volatile device, thus can start immediately without again from
Data are loaded in external memory storage.
Step 3:As shown in Figure 2, the feedback to Vdd is operated by computing module, Mobile state tune is entered to voltage threshold
It is whole, to obtain optimal voltage threshold value.The fluctuation strong correlation of adjustment and Vdd frequencies to threshold value, when frequency fluctuation change is big, threshold value
It should turn down to avoid the switch repeatedly of computing module.Conversely, then threshold value is tuned up, it is to avoid frequently computing module mode of operation is cut
Change.
3rd, advantage and effect:The characteristics of asynchronous loogical circuit that the present invention is constituted according to non-volatile device, supervised using Vdd
Survey signal and feedback control carried out to circuit counting unit, realize the idle module of underload system completely close, heavy loaded system it is empty
Not busy module selective is closed, and non-volatile computing module can keep the data before module closing.In guarantee circuit function and not
Reduce on the basis of the stability of a system, considerably reduce the quiescent dissipation of circuit.
Brief description of the drawings
Fig. 1 is control principle, wherein each logic module voltage change of power supply signal detection circuit monitoring, and determining which
A little circuit modules enter resting state.
Fig. 2 is feedback control flow figure.
Fig. 3 is step block diagram of the present invention
Embodiment:
See Fig. 3, a kind of utilization power detecting of the invention realizes the Low-power-consumptiocontrol control method of non-volatile asynchronous loogical circuit,
This method is comprised the following steps that:
Step one:Obtain Vdd monitoring signals.As shown in Figure 1, design one is needed to monitor and locate in real time in circuit
The module of Vdd fluctuations is managed, the effect of the module is that the pressure drop that logic computing unit is switched to caused Vdd is recorded, and
To amplitude and frequency sensitive, corresponding response can be made to the change of Vdd fluctuating ranges and frequency, for using Vdd change come
The decision-making of computing module closing/startup is controlled to provide foundation.
Step 2:As shown in Figure 1, using the Vdd monitoring signals obtained in step one, determine whether computing module is taken
Corresponding operation carrys out the working condition of adaptive circuit.When Vdd fluctuation range is in threshold value, circuit working state is considered as
Low load condition, now idle computing module will enter closed mode, and when needing to start the module, cooperate with unit
(module of data interaction will be carried out with the module) is responsible for sending activation signal, starts the computing module closed and enters work
Pattern.As shown in Figure 1, each computing unit enters before closed mode, it is necessary to store data in non-volatile device.
When computing unit is activated again, data are read from non-volatile device, thus can start immediately without again from
Data are loaded in external memory storage.
Step 3:As shown in Figure 2, the feedback to Vdd is operated by computing module, Mobile state tune is entered to voltage threshold
It is whole, to obtain optimal voltage threshold value.The fluctuation strong correlation of adjustment and Vdd frequencies to threshold value, when frequency fluctuation change is big, threshold value
It should turn down to avoid the switch repeatedly of computing module.Conversely, then threshold value is tuned up, it is to avoid frequently computing module mode of operation is cut
Change.
Claims (1)
1. a kind of utilization power detecting realizes the Low-power-consumptiocontrol control method of non-volatile asynchronous loogical circuit, it is characterised in that:Should
Method is comprised the following steps that:
Step one:Obtain Vdd monitoring signals;Need design one to monitor in real time in circuit and handle the module of Vdd fluctuations, the mould
The effect of block is that the pressure drop that logic computing unit is switched to caused Vdd is recorded, and to amplitude and frequency sensitive, can
Corresponding response is made in change to Vdd fluctuating ranges and frequency, and computing module closing/startup is controlled to change using Vdd
Decision-making provide foundation;
Step 2:Using the Vdd monitoring signals obtained in step one, determine whether computing module takes corresponding operation to adapt to
The working condition of circuit;When Vdd fluctuation range is in threshold value, circuit working state is considered as low load condition, now
Idle computing module will enter closed mode, and when needing to start the module, data interaction will be carried out with the module
Module be responsible for send activation signal, start close computing module enter mode of operation;Each calculating of the computing module
Unit enters before closed mode, it is necessary to store data in non-volatile device;When computing unit is activated again, number
Read, thus start immediately without loading data from external memory storage again according to from non-volatile device;
Step 3:Feedback to Vdd is operated by computing module, Mobile state adjustment is entered to voltage threshold, to obtain optimal voltage
Threshold value;The fluctuation strong correlation of adjustment and Vdd frequencies to threshold value, when frequency fluctuation change is big, threshold value should be turned down to avoid calculating
The switch repeatedly of module;Conversely, then threshold value is tuned up, it is to avoid frequently computing module mode of operation switches;
The non-volatile device is MTJ, memristor or phase transition storage.
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CN101910975A (en) * | 2008-01-07 | 2010-12-08 | 苹果公司 | The forced idle of data handling system |
CN102298440A (en) * | 2010-06-23 | 2011-12-28 | 英特尔公司 | Memory power management via dynamic memory operation states |
CN103426453A (en) * | 2012-05-25 | 2013-12-04 | 华为技术有限公司 | Dynamic voltage frequency scaling method and system |
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CN101910975A (en) * | 2008-01-07 | 2010-12-08 | 苹果公司 | The forced idle of data handling system |
CN102298440A (en) * | 2010-06-23 | 2011-12-28 | 英特尔公司 | Memory power management via dynamic memory operation states |
CN103426453A (en) * | 2012-05-25 | 2013-12-04 | 华为技术有限公司 | Dynamic voltage frequency scaling method and system |
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