CN104407456A - Array substrate and display device - Google Patents
Array substrate and display device Download PDFInfo
- Publication number
- CN104407456A CN104407456A CN201410795752.1A CN201410795752A CN104407456A CN 104407456 A CN104407456 A CN 104407456A CN 201410795752 A CN201410795752 A CN 201410795752A CN 104407456 A CN104407456 A CN 104407456A
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- Prior art keywords
- test
- base palte
- array base
- measurement circuit
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses an array substrate and a display device, belongs to the technical of display and solves the technical problem that the existing technology can easily cause static electricity damage to test lines. The array substrate comprises a display area and a test area, wherein a group of test lines and at least two groups of test terminals are arranged in the test area; each test terminal in each group of test terminals is correspondingly connected with the corresponding test line in the group of test lines; one of the test lines is the common electrode line and is used for testing of public metal lines and common electrodes. The invention can be applied to display devices such as liquid crystal display televisions, liquid crystal displays, mobile phones and tablet personal computers.
Description
Technical field
The present invention relates to display technique field, specifically, relate to a kind of array base palte and display device.
Background technology
Along with the development of display technique, liquid crystal display has become display device the most common.
The centre of liquid crystal display is viewing area, and the periphery of viewing area is provided with test zone.Be provided with some calibrating terminals and p-wire in the test, on calibrating terminal, whether grafting probe can exist bad by testing liquid crystal display.
Different calibrating terminals is respectively used to elements different in testing liquid crystal display, and each current calibrating terminal comprises the public metal wire on danger signal line, green line, blue signal line, odd-numbered scan lines, even-line interlace line, array base palte, the public electrode etc. on color membrane substrates for the element tested.Wherein, the equal correspondence of each element is provided with a calibrating terminal, and the equal correspondence of each calibrating terminal is provided with a p-wire.Because the p-wire in test zone is more, so also can connect up in a lot of local mode of intersection cross-line that adopts, and be easy to occur Electro-static Driven Comb (Electro-Static Discharge at intersection cross-line place, be called for short ESD), damage by static electricity is caused to p-wire, causes the generation of the undesirable conditions such as broken string, short circuit.
Summary of the invention
The object of the present invention is to provide a kind of array base palte and display device, to solve prior art easily causes damage by static electricity technical matters to p-wire.
The invention provides a kind of array base palte, comprise viewing area and test zone,
One group of measurement circuit and at least two group calibrating terminals are provided with in described test zone;
Often organize each calibrating terminal in described calibrating terminal, be connected respectively each bar p-wire in described measurement circuit;
Wherein a p-wire is public electrode wire, for the test of public metal wire and the test of public electrode.
Further, danger signal line, green line, blue signal line, odd-numbered scan lines and even-line interlace line is also comprised in described measurement circuit.
Preferably, described at least two group calibrating terminals comprise at least one group pattern calibrating terminal and at least one group substrate calibrating terminal.
Further, the quantity of described array test terminal and described tester substrate terminal is two groups.
Preferably, described measurement circuit takes the shape of the letter U, and described viewing area is enclosed in the measurement circuit of U-shaped.
Preferably, two group pattern calibrating terminals are connected to the both sides of the measurement circuit of U-shaped, and two group substrate calibrating terminals are connected to the both sides of the measurement circuit of U-shaped.
Further, this array base palte also comprises one group of connecting lead wire, and described measurement circuit is connected to described viewing area by described connecting lead wire.
Preferably, described connecting lead wire is connected to the middle part of the measurement circuit of U-shaped.
The present invention also provides a kind of display device, comprises color membrane substrates and above-mentioned array base palte.
Present invention offers following beneficial effect: in array base palte provided by the invention, public electrode wire both may be used for the test of the public metal wire on array base palte, can also the test of public electrode on color membrane substrates, because this reducing the number of p-wire, simplify the line construction of test zone.In the wiring of test zone, because the minimizing of p-wire number, so decrease the use of intersection cross-line, thus reduce p-wire by the risk of damage by static electricity.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from instructions, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in instructions, claims and accompanying drawing and obtain.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, accompanying drawing required in describing is done simple introduction below to embodiment:
Fig. 1 is the schematic diagram of the array base palte that the embodiment of the present invention one provides;
Fig. 2 is array base palte that the embodiment of the present invention one provides oscillogram when testing;
Fig. 3 is the schematic diagram of the array base palte that the embodiment of the present invention two provides.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, to the present invention, how application technology means solve technical matters whereby, and the implementation procedure reaching technique effect can fully understand and implement according to this.It should be noted that, only otherwise form conflict, each embodiment in the present invention and each feature in each embodiment can be combined with each other, and the technical scheme formed is all within protection scope of the present invention.
embodiment one:
The embodiment of the present invention provides a kind of array base palte, and comprise viewing area 100 and test zone 200, wherein test zone 200 is positioned at the periphery of viewing area 100.
One group of measurement circuit 10 and at least two group calibrating terminals are provided with, comprising at least one group pattern (Array) calibrating terminal 20 and at least one group substrate (Cell) calibrating terminal 30 in test zone 200.In the present embodiment, the quantity of array test terminal 20 and tester substrate terminal 30 is two groups.Often organize each calibrating terminal in calibrating terminal, be connected respectively each bar p-wire in measurement circuit.
In the present embodiment, a p-wire in measurement circuit 10 is public electrode wire, for the test of public metal wire and the test of public electrode.This public electrode wire is connected with the public electrode line terminals 21 in array test terminal 20, is also connected with the public electrode line terminals 31 in tester substrate terminal 30.
In measurement circuit 10 except public electrode wire, also comprise danger signal line, green line, blue signal line, odd-numbered scan lines and even-line interlace line, totally six p-wires.Danger signal line, green line, blue signal line, odd-numbered scan lines and even-line interlace line are connected with even-line interlace line terminals 22 with the danger signal line terminals 26 in array test terminal 20, green line terminals 25, blue signal line terminals 24, odd scan line terminals 23 respectively, are also connected with even-line interlace line terminals 32 with the danger signal line terminals 36 in tester substrate terminal 30, green line terminals 35, blue signal line terminals 34, odd scan line terminals 33 respectively.
As a preferred version, in the present embodiment, measurement circuit 10 takes the shape of the letter U, and viewing area 100 is enclosed in the measurement circuit 10 of U-shaped.Two group pattern calibrating terminals 20 are connected to the both sides of the measurement circuit 10 of U-shaped, and two group substrate calibrating terminals 30 are also connected to the both sides of the measurement circuit 10 of U-shaped, thus the wiring in optimal inspection region, reduce the area shared by test zone.
Further, this array base palte is also provided with one group of connecting lead wire 40, measurement circuit 10 is connected to viewing area 100 by connecting lead wire 40, and connecting lead wire 40 is connected to the middle part of the measurement circuit of U-shaped, for test signal being inputed to each element in viewing area 100.
The display device that the array base palte provided by the embodiment of the present invention is made, when testing, probe is plugged on each array test terminal 20 or tester substrate terminal 30, and each element inputed to by the electric signal (as shown in Figure 2) on probe by measurement circuit 10 and connecting lead wire 40 in viewing area 100, thus realize the test to display device.
In the array base palte that the embodiment of the present invention provides, public electrode wire in measurement circuit 10 both may be used for the test of the public metal wire on array base palte, can also the test of public electrode on color membrane substrates, therefore six p-wires can be only set, decrease the number of p-wire, simplify the line construction of test zone.In the wiring of test zone 200, because the minimizing of p-wire number, so decrease the use of intersection cross-line, thus reduce p-wire by the risk of damage by static electricity.
In addition, due to the minimizing of p-wire number, the quantity of array test terminal 20 and tester substrate terminal 30 also consequently reduces, and therefore used in testing number of probes also reduces thereupon.Because the probe used in test is expendable article, so reduce the usage quantity of probe, the testing cost of display device significantly can be reduced.
embodiment two:
As shown in Figure 3, the array base palte that the embodiment of the present invention provides is substantially identical with embodiment one, and this array base palte comprises viewing area 100 and test zone 200, and wherein test zone 200 is positioned at the periphery of viewing area 100.
Difference between the present embodiment and embodiment one is, in the present embodiment, is only provided with group pattern calibrating terminal 20 and a group substrate calibrating terminal 30 in the left side of measurement circuit 10.Measurement circuit 10 comprises danger signal line, green line, blue signal line, odd-numbered scan lines, even-line interlace line and public electrode wire be totally six p-wires, respectively with the danger signal line terminals 26 in array test terminal 20, green line terminals 25, blue signal line terminals 24, odd scan line terminals 23, even-line interlace line terminals 22 is connected with public electrode line terminals 21, also respectively with the danger signal line terminals 36 in tester substrate terminal 30, green line terminals 35, blue signal line terminals 34, odd scan line terminals 33, even-line interlace line terminals 32 is connected with public electrode line terminals 31.
Compared with embodiment one, this embodiment reduces the quantity of calibrating terminal, to reduce the cabling of test zone 200 further, thus further simplify the line construction of test zone.In addition, also further reduce the use of intersection cross-line in the present embodiment, thus reduce further p-wire by the risk of damage by static electricity.
embodiment three:
The embodiment of the present invention provides a kind of display device, is specifically as follows LCD TV, liquid crystal display, mobile phone, panel computer etc.This display device comprises the array base palte that color membrane substrates and above-described embodiment one or embodiment two provide.
The display device that the embodiment of the present invention provides, has identical technical characteristic with the array base palte that above-described embodiment provides, so also can solve identical technical matters, reaches identical technique effect.
Although embodiment disclosed in this invention is as above, the embodiment that described content just adopts for the ease of understanding the present invention, and be not used to limit the present invention.Technician in any the technical field of the invention; under the prerequisite not departing from spirit and scope disclosed in this invention; any amendment and change can be done what implement in form and in details; but scope of patent protection of the present invention, the scope that still must define with appending claims is as the criterion.
Claims (10)
1. an array base palte, comprises viewing area and test zone,
One group of measurement circuit and at least two group calibrating terminals are provided with in described test zone;
Often organize each calibrating terminal in described calibrating terminal, be connected respectively each bar p-wire in described measurement circuit;
Wherein a p-wire is public electrode wire, for the test of public metal wire and the test of public electrode.
2. array base palte as claimed in claim 1, is characterized in that, also comprise danger signal line, green line, blue signal line, odd-numbered scan lines and even-line interlace line in described measurement circuit.
3. array base palte as claimed in claim 1, it is characterized in that, described at least two group calibrating terminals comprise at least one group pattern calibrating terminal and at least one group substrate calibrating terminal.
4. array base palte as claimed in claim 3, it is characterized in that, the quantity of described array test terminal and described tester substrate terminal is two groups.
5. array base palte as claimed in claim 4, it is characterized in that, described measurement circuit takes the shape of the letter U, and described viewing area is enclosed in the measurement circuit of U-shaped.
6. array base palte as claimed in claim 5, it is characterized in that, two group pattern calibrating terminals are connected to the both sides of the measurement circuit of U-shaped.
7. array base palte as claimed in claim 5, it is characterized in that, two group substrate calibrating terminals are connected to the both sides of the measurement circuit of U-shaped.
8. array base palte as claimed in claim 5, it is characterized in that, also comprise one group of connecting lead wire, described measurement circuit is connected to described viewing area by described connecting lead wire.
9. array base palte as claimed in claim 8, it is characterized in that, described connecting lead wire is connected to the middle part of the measurement circuit of U-shaped.
10. a display device, comprises color membrane substrates and the array base palte as described in any one of claim 1 to 9.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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CN201410795752.1A CN104407456A (en) | 2014-12-18 | 2014-12-18 | Array substrate and display device |
PCT/CN2015/071073 WO2016095314A1 (en) | 2014-12-18 | 2015-01-20 | Array substrate and display device |
Applications Claiming Priority (1)
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CN201410795752.1A CN104407456A (en) | 2014-12-18 | 2014-12-18 | Array substrate and display device |
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CN201410795752.1A Pending CN104407456A (en) | 2014-12-18 | 2014-12-18 | Array substrate and display device |
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WO (1) | WO2016095314A1 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN105607316A (en) * | 2016-03-22 | 2016-05-25 | 京东方科技集团股份有限公司 | Array substrate mother board and display panel mother board |
CN108681168A (en) * | 2018-06-27 | 2018-10-19 | 深圳市华星光电半导体显示技术有限公司 | A kind of array substrate, display panel and display equipment |
CN108732835A (en) * | 2018-05-29 | 2018-11-02 | 深圳市华星光电技术有限公司 | The light alignment method of array substrate, liquid crystal display panel and liquid crystal display panel |
CN108983461A (en) * | 2018-08-22 | 2018-12-11 | 惠科股份有限公司 | array substrate and liquid crystal module |
CN109491166A (en) * | 2018-12-28 | 2019-03-19 | 深圳市华星光电半导体显示技术有限公司 | Array substrate |
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US20100045639A1 (en) * | 2005-07-19 | 2010-02-25 | Jin Jeon | Liquid crystal display panel and testing and manufacturing methods thereof |
CN101963709A (en) * | 2009-07-21 | 2011-02-02 | 乐金显示有限公司 | Chip on glass type LCD device and detection method of the same |
CN202472178U (en) * | 2012-03-16 | 2012-10-03 | 北京京东方光电科技有限公司 | Test circuit |
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
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CN105607316A (en) * | 2016-03-22 | 2016-05-25 | 京东方科技集团股份有限公司 | Array substrate mother board and display panel mother board |
CN105607316B (en) * | 2016-03-22 | 2018-12-18 | 京东方科技集团股份有限公司 | A kind of array substrate motherboard and display panel motherboard |
CN108732835A (en) * | 2018-05-29 | 2018-11-02 | 深圳市华星光电技术有限公司 | The light alignment method of array substrate, liquid crystal display panel and liquid crystal display panel |
CN108681168A (en) * | 2018-06-27 | 2018-10-19 | 深圳市华星光电半导体显示技术有限公司 | A kind of array substrate, display panel and display equipment |
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CN108681168B (en) * | 2018-06-27 | 2020-12-25 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, display panel and display device |
CN108983461A (en) * | 2018-08-22 | 2018-12-11 | 惠科股份有限公司 | array substrate and liquid crystal module |
CN108983461B (en) * | 2018-08-22 | 2021-04-27 | 惠科股份有限公司 | Array substrate and liquid crystal module |
CN109491166A (en) * | 2018-12-28 | 2019-03-19 | 深圳市华星光电半导体显示技术有限公司 | Array substrate |
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WO2016095314A1 (en) | 2016-06-23 |
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Application publication date: 20150311 |