CN104393858B - A kind of compensating for frequency response data Real-time Generation based on static RAM - Google Patents
A kind of compensating for frequency response data Real-time Generation based on static RAM Download PDFInfo
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- CN104393858B CN104393858B CN201410554368.2A CN201410554368A CN104393858B CN 104393858 B CN104393858 B CN 104393858B CN 201410554368 A CN201410554368 A CN 201410554368A CN 104393858 B CN104393858 B CN 104393858B
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Abstract
The present invention proposes a kind of compensating for frequency response data Real-time Generation based on static RAM, the static RAM based on storage compensating for frequency response data, FPGA and auxiliary circuit for real-time searching compensating for frequency response data, comprises the following steps：After instrument electrifying startup, the compensating for frequency response data in full frequency band, full power range are downloaded in static RAM；When whole machine state changes, pass through the comparison program inside FPGA, frequency and preset power according to corresponding to current arbitrary sequence state, the index address of corresponding compensating for frequency response data is drawn in real time, and start reading sequential, the corresponding offset data in the address is sent in corresponding DAC interface circuits.The compensating for frequency response data of the present invention can be produced in real time, can meet the demand controlled when the switching of broadband signal generator fast state, the continuous state switching of especially hundred nanosecond orders compensating for frequency response.
Description
Technical field
The present invention relates to technical field of measurement and test, more particularly to a kind of compensating for frequency response data based on static RAM are generated in real time
Method.
Background technology
In broadband signal generator, for frequency response in the higher power flatness of acquirement, base band band and IQ modulation accuracies
Index, is generally required for carrying out the compensating for frequency response of wide-band.It is combined to traditional based on lock in the signal generator of system, frequency
Compensation is rung typically by whole machine control software according to the calibration data of compensating for frequency response, current carrier frequency, current carrier power
Etc. parameter, the corresponding compensating for frequency response data of current state are calculated.For requiring the faster modem signal generators of switch speed
For, because whole machine state switching time is below Millisecond, even up to microsecond or hundred nanosecond orders, the above method is so
It can not be completed in the short time.
In technical field of measurement and test, due to circuit components non-linear, microwave component broadband frequency response characteristic and
The reasons such as temperature drift, broadband signal generator usually there will be the inconsistent phenomenon of frequency response in working frequency range.With working frequency
The difference of span, power bracket etc., its frequency response is generally present under several dB fluctuating, extreme case, after some time it is possible to reach more than 10dB.
For high-precision broadband signal generator, the higher the better for its frequency response index, and preferable frequency response data are zero.But due to electricity
The factors such as the economy that the stability on road, repeatable and whole machine function are realized, the frequency response data of actual test instrument can not
It can accomplish infinitely small.It is different according to whole machine working frequency range, after its frequency response index is calibrated, can reach ± 0.3dB~± 2dB with
It is interior, it just can meet the demand of most of test applications.
Consider from economy and the convenience realized, existing compensating for frequency response typically uses data storage+Software Create
Mode produce the corresponding compensating for frequency response data of current state.Then, then by whole machine control software the offset data is sent
Into compensation DAC, under the control of whole machine Synchronization Control sequential, the compensating for frequency response of current state is completed.The totality of this scheme
Theory diagram as shown in figure 1, stored in compensating for frequency response data file be generate in calibration process with overall frequency, power phase
The whole machine compensating for frequency response data closed；Whole machine status data is the current whole machine of sign of current whole machine output signal frequency and power etc.
The data acquisition system of state；Compensating for frequency response control software is the application program being operated on broadband signal generator master controller, when
When the whole machine state of broadband signal generator changes, the control software takes out frequency in current whole machine state, power first
Deng status data, according to the status data, the corresponding offset data of current state is calculated, the data are then passed through into I/O channel
Set in compensating for frequency response DAC；Under the control of whole machine control sequential, current offset data is converted to benefit by compensating for frequency response DAC
Repay driving voltage control signal；The control signal drives compensating for frequency response circuit, so as to realize the benefit to current state frequency response error
Repay and correct.
It is existing that the method for offset data is calculated based on control software since it is desired that software lookup data, software calculate number
According to the process such as, software transmission data and compensation data delay, cause whole process speed slow, do not apply to switch speed compared with
Fast modem signal generators.
The content of the invention
In order to solve the existing slow-footed problem of method that offset data is calculated based on control software, the present invention is proposed
A kind of compensating for frequency response data Real-time Generation based on static RAM, by using this method, it is not necessary to which control software is participated in,
Compensating for frequency response data are directly gone out by the lookup to RAM data and interpolation calculation, instrument switch speed is greatly improved.
The technical proposal of the invention is realized in this way：
A kind of compensating for frequency response data Real-time Generation based on static RAM, the static state based on storage compensating for frequency response data
RAM, FPGA and auxiliary circuit for real-time searching compensating for frequency response data, comprise the following steps：
After instrument electrifying startup, the compensating for frequency response data in full frequency band, full power range are downloaded in static RAM；
When whole machine state changes, by the comparison program inside FPGA, according to current arbitrary sequence state, institute is right
The frequency and preset power answered, draw the index address of corresponding compensating for frequency response data in real time, and start reading sequential, by this
The corresponding offset data in address is sent in corresponding DAC interface circuits.
Alternatively, the frequency control word and power control word of the FPGA receiving instrument, according in compensation data storage
Frequency resolution and power resolution, are blocked downwards to the frequency control word and power control word received；
Using the frequency control word after blocking as high address, power control word after blocking is as low order address, then
The high address and status address are combined again, as RAM reading address, reading offset data is designated as C1 from RAM；
Plus 1 to address, it is C2 that offset data is read from RAM；
To block again rear frequency control word plus 1 and power control word combination as RAM read address, the receive data from RAM
According to being designated as C3；Add 1 to address again, data are read from RAM and are designated as C4；
Respective frequencies and the offset data of power are generated by data fit procedure again.
Alternatively, the data fit procedure is：
C12 is the offset data for blocking rear frequency and Power Control, and computing formula is as follows：
C34 adds 1 and the offset data of Power Control for interception frequency, and computing formula is as follows：
C is respective frequencies control word and the offset data of power control word, and computing formula is as follows：
Due to F1=F0+1, P1=P0+1, institute's above formula can be reduced to：
C=C1+ (C2-C1) * (P-Po)+(C3-C1) * (F-F0)+
((C4+C1)-(C2+C3))*(F-F0)*(P-P0) (4)
P0 blocked for P after data, F0 blocked for F after data, the part that P-P0 casts out after being blocked for P, F-F0 be F cut
Have no progeny the data given up.
The beneficial effects of the invention are as follows：
(1) compensating for frequency response data can be produced in real time, disclosure satisfy that the switching of broadband signal generator fast state, especially hundred
The demand controlled during the continuous state switching of nanosecond order compensating for frequency response；
(2) it is applied in broadband signal generator, frequency response index when instrument state switches at a high speed can be greatly improved, so that
Improve the test speed and test quality when continuous multimode is tested.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the existing theory diagram based on data file+control software mode frequency response compensation method；
Fig. 2 is the theory diagram of the compensating for frequency response data Real-time Generation based on static RAM of the present invention；
Fig. 3 is the data fitted figure of the compensating for frequency response data Real-time Generation based on static RAM of the present invention；
Fig. 4 is the FPGA internal control block diagrams of the compensating for frequency response data Real-time Generation based on static RAM of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
The present invention proposes a kind of high speed frequency variation signal compensating for frequency response data Real-time Generation based on static RAM, should
Static RAM, FPGA for real-time searching compensating for frequency response data and related auxiliary electricity of the method based on storage compensating for frequency response data
Road.
The general principle of compensating for frequency response data Real-time Generation of the present invention is：
After instrument electrifying startup, the compensating for frequency response data in full frequency band, full power range are downloaded in static RAM；When
When whole machine state changes, by the comparison program inside FPGA, frequency according to corresponding to current arbitrary sequence state and
Preset power, draws the index address of corresponding compensating for frequency response data in real time, and starts reading sequential, and the address is corresponding
Offset data is sent in corresponding DAC interface circuits, so as to realize whole machine full frequency band, arbitrary sequence is jumped in total power presetting range
Compensating for frequency response data in the case of turning are generated in real time.
The compensating for frequency response data Real-time Generation of the present invention is described in detail below in conjunction with the accompanying drawings.
As shown in Fig. 2 the frequency control word and power control word of FPGA receiving instrument, according to the frequency in compensation data storage
Rate resolution ratio and power resolution, are blocked downwards to the frequency control word and power control word received, then will be blocked
Frequency control word and power control word afterwards is combined, wherein the frequency control word after blocking is as high address, after blocking
Power control word as low order address, as RAM reading address, from RAM reading offset data is designated as C1, to address plus
1, it is C2 that offset data is read from RAM；To block again rear frequency control word plus 1 and power control word combination read as RAM
Address, reading data are designated as C3 from RAM, then add 1 to address, and data are read from RAM and are designated as C4.It was fitted again by data
The offset data of Cheng Shengcheng respective frequencies and power.
As shown in figure 3, data fit procedure is as follows：
Transverse axis is frequency, and unit is the frequency resolution in offset data, and vertical pivot is power, and unit is the work(of offset data
Rate resolution ratio.C1 is the offset data read from RAM after being blocked to frequency control word and power control word, and C2 is to blocking
Frequency is the data for adding 1 to cut frequency and blocking in the RAM of power, C4 with blocking the data in the RAM that rear power plus 1, C3
To add 1 to cut frequency and blocking the data in the RAM that power plus 1.C12 is the compensation number for blocking rear frequency and Power Control
According to computing formula is as follows：
C34 adds 1 and the offset data of Power Control for interception frequency, and computing formula is as follows：
C is respective frequencies control word and the offset data of power control word, and computing formula is as follows：
Because F1=F0+1, P1=P0+1, institute's above formula can be reduced to：
C=C1+ (C2-C1) * (P-Po)+(C3-C1) * (F-F0)+
((C4+C1)-(C2+C3))*(F-F0)*(P-P0) (4)
Realization principle of the formula (4) inside FPGA as shown in figure 4, because P0 blocked for P after data, after F0 blocks for F
Data, so the part that P-P0 casts out after being blocked for P, the data that F-F0 gives up after being blocked for F.
The method of the present invention works as instrument by the way that whole machine full frequency band, full power range compensating for frequency response data are put into static RAM
During state change, FPGA control devices are automatic raw in real time by the link such as blocking, comparing and be fitted according to current instrument state
Into the corresponding compensating for frequency response data of current state.
Prior art compensating for frequency response data are non real-time generation, and the compensating for frequency response data of the present invention can be produced in real time
It is raw, during therefore, it is possible to meet the switching of broadband signal generator fast state, the continuous state switching of especially hundred nanosecond orders pair
The demand of compensating for frequency response control.
Compensating for frequency response data Real-time Generation based on static RAM and FPGA proposed by the invention is applied to broadband letter
In number generator, can greatly improve instrument state at a high speed switching when frequency response index so that when improving continuous multimode test
Test speed and test quality.
Presently preferred embodiments of the present invention is the foregoing is only, is not intended to limit the invention, all essences in the present invention
God is with principle, and any modifications, equivalent substitutions and improvements made etc. should be included within the scope of the present invention.
Claims (2)
1. a kind of compensating for frequency response data Real-time Generation based on static RAM, it is characterised in that based on storage compensating for frequency response number
According to static RAM, FPGA and auxiliary circuit for real-time searching compensating for frequency response data, comprise the following steps：
After instrument electrifying startup, the compensating for frequency response data in full frequency band, full power range are downloaded in static RAM；
When whole machine state changes, by the comparison program inside FPGA, according to corresponding to current arbitrary sequence state
Frequency and preset power, draw the index address of corresponding compensating for frequency response data in real time, and start reading sequential, by the address
Corresponding offset data is sent in corresponding DAC interface circuits；
The frequency control word and power control word of the FPGA receiving instrument, according to compensation data storage in frequency resolution and
Power resolution, is blocked downwards to the frequency control word and power control word received；
Then the frequency control word after blocking and power control word are combined, wherein the frequency control word after blocking is used as height
Bit address, the power control word after blocking is as low order address, as RAM reading address, and offset data note is read from RAM
For C1；Plus 1 to address, it is C2 that offset data is read from RAM；
To block again rear frequency control word plus 1 and power control word combination as RAM read address, from RAM read data note
For C3；Add 1 to address again, data are read from RAM and are designated as C4；
Respective frequencies and the offset data of power are generated by data fit procedure again.
2. the compensating for frequency response data Real-time Generation as claimed in claim 1 based on static RAM, it is characterised in that described
Data fit procedure is：
C12 is the offset data for blocking rear frequency and Power Control, and computing formula is as follows：
C34 adds 1 and the offset data of Power Control for interception frequency, and computing formula is as follows：
C is respective frequencies control word and the offset data of power control word, and computing formula is as follows：
Due to F1=F0+1, P1=P0+1, institute's above formula can be reduced to：
C=C1+ (C2-C1) * (P-Po)+(C3-C1) * (F-F0)+
((C4+C1)-(C2+C3))*(F-F0)*(P-P0) (4)
P0 blocked for P after data, F0 blocked for F after data, the part that P-P0 casts out after being blocked for P, after F-F0 blocks for F
The data given up.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN201666935U (en) * | 2009-07-16 | 2010-12-08 | 福建省普华电子科技有限公司 | Winding deformation tester using analyzing method of frequency response method |
| CN102508045A (en) * | 2010-12-20 | 2012-06-20 | 中国电子科技集团公司第四十一研究所 | Method for accurately measuring narrow pulse modulation parameter |
| CN103647520A (en) * | 2013-11-13 | 2014-03-19 | 中国电子科技集团公司第四十一研究所 | Frequency agile signal frequency response compensation method based on electrically controlled attenuator |
| CN103645378A (en) * | 2013-12-13 | 2014-03-19 | 中国电子科技集团公司第四十一研究所 | High-speed seamless capture pulse power statistics measuring method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20020131522A1 (en) * | 2001-03-14 | 2002-09-19 | Tilman Felgentreff | Method and apparatus for the digital predistortion linearization, frequency response compensation linearization and feedforward linearization of a transmit signal |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201666935U (en) * | 2009-07-16 | 2010-12-08 | 福建省普华电子科技有限公司 | Winding deformation tester using analyzing method of frequency response method |
| CN102508045A (en) * | 2010-12-20 | 2012-06-20 | 中国电子科技集团公司第四十一研究所 | Method for accurately measuring narrow pulse modulation parameter |
| CN103647520A (en) * | 2013-11-13 | 2014-03-19 | 中国电子科技集团公司第四十一研究所 | Frequency agile signal frequency response compensation method based on electrically controlled attenuator |
| CN103645378A (en) * | 2013-12-13 | 2014-03-19 | 中国电子科技集团公司第四十一研究所 | High-speed seamless capture pulse power statistics measuring method |
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