CN104392911B - Boron diffusion method of high-voltage thyristor chips - Google Patents
Boron diffusion method of high-voltage thyristor chips Download PDFInfo
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- CN104392911B CN104392911B CN201410604940.1A CN201410604940A CN104392911B CN 104392911 B CN104392911 B CN 104392911B CN 201410604940 A CN201410604940 A CN 201410604940A CN 104392911 B CN104392911 B CN 104392911B
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- boron
- thyristor chip
- pressure thyristor
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- oxide layer
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 title claims abstract description 63
- 229910052796 boron Inorganic materials 0.000 title claims abstract description 63
- 238000009792 diffusion process Methods 0.000 title claims abstract description 54
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 14
- 239000011574 phosphorus Substances 0.000 claims abstract description 14
- 230000003647 oxidation Effects 0.000 claims abstract description 13
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 13
- 238000001259 photo etching Methods 0.000 claims abstract description 8
- 240000007594 Oryza sativa Species 0.000 claims 1
- 235000007164 Oryza sativa Nutrition 0.000 claims 1
- 235000009566 rice Nutrition 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 15
- 238000012360 testing method Methods 0.000 description 10
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66363—Thyristors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thyristors (AREA)
Abstract
The invention discloses a boron diffusion method of high-voltage thyristor chips. The method comprises the following steps that (1) multiple high-voltage thyristor chips are equidistantly arranged in an oxidation furnace with a spacing distance of 2-3mm, and an oxidation layer of which thickness is greater than 1.5 microns is respectively generated on the anode surface and the cathode surface of each chip after 2-10 hours of oxidation under 1200-1300 DEG C and then taken out; (2) photo-etching is performed on each chip so as to remove the oxidation layer of the anode surface of the chip and the oxidation layer of the surface of a short circuit point and retain the oxidation layer of the surface of an N+ phosphorus diffusion region phosphorus diffusion layer; (3) and the chips processed after the step (2) are equidistantly arranged in a boron diffusion furnace with the spacing distance of 0.5-1mm, a boron source of which thickness is 0.8-1.5 microns is coated on the anode surface of each chip, and boron diffusion is performed for 1-4 hours under 1200-1300 DEG C and then the chips are taken out. Voltage drop is reduced, opening speed is enhanced, current rise rate and voltage build-up rate are enhanced, leak current is reduced and the number of chips of single diffusion is increased.
Description
Technical field
The present invention relates to a kind of method of boron diffusion, more particularly, to a kind of Boron diffusion method of high-pressure thyristor chip.
Background technology
At present, direction of the thyristor chip just towards higher voltage, the superelevation of more high current control power is developed, this certainty
It is required that thyristor chip has thicker thickness, higher resistivity and bigger diameter.But the thickness of thyristor chip, electricity
The increase of resistance rate will cause thyristor chip to produce bigger on-state voltage drop (VTM), i.e., thyristor chip operationally because itself
The energy loss generated heat and produce is bigger；Simultaneously thyristor chip is opened speed and can be reduced, that is, open energy loss increase, and
The current-rising-rate (di/dt) of thyristor chip also can be reduced.Thyristor chip is divided into anode surface and cathode plane, general anode surface
It is made up of anode (p-type), cathode plane is made up of negative electrode (N+ types), gate pole (p-type) and short dot (p-type), and wherein short dot is uniform
It is spaced apart in cathode plane, negative electrode (N+ types) is that negative electrode is located on N+ phosphorus diffusion region, and anode (p-type) is that anode is located on P.
In order to solve thickness, resistivity and the diameter of above-mentioned increase thyristor chip high-pressure thyristor chip is met to height
Voltage, the demand of high current and the contradiction brought, typically adopt with the following method：(1) by improving N+ phosphorus diffusion region on cathode plane
Expand the concentration and junction depth of phosphorous layer and open speed and current-rising-rate reducing the on-state voltage drop of chip, raising, but this mode
The voltage build-up rate (dv/dt) of high-pressure thyristor chip can be caused to be reduced, and leakage current rises, i.e. the voltage of high-pressure thyristor chip
Blocking ability is deteriorated；(2) boron source is applied on the anode surface of high-pressure thyristor chip by the way of boron diffusion in anode surface,
The P+ for only a floor height doping content being spread to anode surface expands boron layer, and doping content reaches 1 × 1020cm-3, but this only helps
The on-state voltage drop of high-pressure thyristor chip is reduced, is but helpless to improve the voltage build-up rate of high-pressure thyristor chip, reduced high pressure
The leakage current of thyristor chip.Additionally, during boron spreads, the boron source meeting being coated on the anode surface of high-pressure thyristor chip
Diffuse on the cathode plane of neighbouring high-pressure thyristor chip, cause the concentration that phosphorous layer is expanded in N+ phosphorus diffusion region on cathode plane to be compensated and
Reduce, and boron is diffusion time longer, degree of compensation is more serious.At 1250 DEG C, even if boron is less than 0.5 hour diffusion time, N+
The concentration for expanding phosphorous layer also can be by 2 × 1020cm-3It is reduced to 1 × 1020cm-3；And when boron diffusion time was less than 0.5 hour, boron expands
Scattered junction depth can be less than 10 microns, be limited so to the improvement result of on-state voltage drop.It is neighbouring high when boron spreads to reduce
Interfering for piezocrystal brake tube chip chamber, then need suitably to widen the spacing (example between each high-pressure thyristor chip in diffusion
Such as：Chip for 3 inches, at least the spacing between each high-pressure thyristor chip is widened to 3mm just can substantially eliminate it is dry
Disturb), and the number of chips of single diffusion so can be then reduced, reduce production efficiency.
The content of the invention
The technical problem to be solved is to provide a kind of Boron diffusion method of high-pressure thyristor chip, and the method was both
The on-state voltage drop of high-pressure thyristor chip can be reduced, it is improved and is opened speed and current-rising-rate, high-pressure thyristor can be lifted again
The voltage build-up rate of chip simultaneously reduces leakage current, while the quantity of the high-pressure thyristor chip of single diffusion can be increased, improves
Production efficiency.
The present invention solve the technical scheme that adopted of above-mentioned technical problem for：A kind of boron diffused sheet of high-pressure thyristor chip
Method, comprises the following steps：1. multiple high-pressure thyristor chips are equidistantly placed in oxidation furnace by spacing for 2～3mm,
Aoxidize at 1200～1300 DEG C and generate one layer respectively on the anode surface and cathode plane that cause within 2～10 hours each high-pressure thyristor chip
Thickness takes out after the oxide layer more than 1.5 microns；2. photoetching is carried out to high-pressure thyristor chip, high-pressure thyristor core is removed in photoetching
The oxide layer on short dot surface in oxide layer and cathode plane on the anode surface of piece, retains N+ phosphorus diffusion region surface on cathode plane
Oxide layer；3. the high-pressure thyristor chip after portion of oxide layer will be removed to be equidistantly placed in expansion boron stove for 0.5～1mm by spacing
It is interior, and the boron source that thickness is 0.8～1.5 micron is coated on the anode surface of each high-pressure thyristor chip, at 1200～1300 DEG C
Under carry out boron spread 1～4 hour after take out.
Described step 1. in multiple high-pressure thyristor chips are equidistantly placed in oxidation furnace by spacing for 3mm,
Aoxidize 5 hours so that generating a layer thickness respectively on the anode surface and cathode plane of each high-pressure thyristor chip at 1250 DEG C and be more than
Take out after 1.5 microns of oxide layer.
Step 3. in will remove the high-pressure thyristor chip after portion of oxide layer and be equidistantly placed in expansion for 0.8mm by spacing
In boron stove, and the boron source that thickness is 1 micron is coated on the anode surface of each high-pressure thyristor chip, boron expansion is carried out at 1250 DEG C
Take out after dissipating 4 hours.
Compared with prior art, it is an advantage of the current invention that：(1) high-pressure thyristor chip is expanding boron diffusion process in boron stove
In, the oxide layer that N+ phosphorus diffusion region surface retains on cathode plane can prevent the boron source on neighbouring high-pressure thyristor chip from expanding N+ phosphorus
Scattered area expands the interference of phosphorous layer, and the interception is 5 hours, so as to expand phosphorus in relatively long interior holding N+ phosphorus diffusion region
The concentration of layer is constant；(2) N+ phosphorus diffusion region expands the oxide layer on phosphorous layer surface and eliminates boron source and be harmful to expanding phosphorous layer on cathode plane
Disturb, therefore the time of boron diffusion can be promoted to 1～4 hour, and then enable the junction depth that boron spreads to be promoted to 25 microns, this
Sample can further enhance conductivity modulation effect when high-pressure thyristor chip is turned on, and reduce its on-state voltage drop, lift high piezocrystal
Brake tube chip opens speed and current-rising-rate, so as to reducing self-energy loss during high-pressure thyristor chip operation, carrying
High-energy conversion efficiency；(3) short dot surface does not have the stop of oxide layer, therefore the high-pressure thyristor core in spreading on cathode plane
Piece spacing is less and the lengthening of boron diffusion time both contributes to for the interference diffusion concentration of short dot to be promoted to p+ types by p-type, i.e.,
All carried out boron diffusion equivalent to the negative and positive two sides of high-pressure thyristor chip, and the p-type doping content of short dot can by 3 ×
1017cm-3It is promoted to 1 × 1020cm-3, this advantageously reduces the resistance of short dot, short-circuit effect is lifted, so as to lift high piezocrystal lock
The voltage build-up rate of die simultaneously reduces leakage current, and the voltage build-up rate of high-pressure thyristor chip can by general 1000～
1500V/ μ s are promoted to 2000～3000V/ μ s；(4) compared to traditional boron diffusion way, expand in the inventive method implementation process
The spacing between high-pressure thyristor chip in dissipating can shorten to 0.5～1mm, therefore the high-pressure thyristor of single diffusion by 3mm
Number of chips increases, and is conducive to improve production efficiency.
Description of the drawings
Fig. 1 is the floor map of embodiment mesohigh thyristor chip cathode plane；
Fig. 2 is the sectional view of Section A-A in Fig. 1；
Fig. 3 aoxidizes respectively the state diagram obtained after oxide layer for the anode surface and cathode plane of high-pressure thyristor chip；
Fig. 4 for photoetching fall high-pressure thyristor chip anode surface and cathode plane short dot surface on state after oxide layer
Figure；
Fig. 5 is the design sketch spread after four high-pressure thyristor chips being spaced at equal intervals apply boron source on anode surface.
Specific embodiment
The present invention is described in further detail below in conjunction with accompanying drawing embodiment.
As shown in Fig. 1～5, thyristor chip is divided into anode surface and cathode plane, and general anode surface is made up of anode (p-type) 1,
Cathode plane is made up of negative electrode 2 (N+ types), gate pole (p-type) and short dot 4 (p-type), and the wherein uniform intervals of short dot 4 are distributed in negative electrode
Face, negative electrode (N+ types) 2 is that negative electrode 2 is located on N+ phosphorus diffusion region 3, and anode (p-type) 1 is that anode 1 is located on P.A kind of high piezocrystal lock
The Boron diffusion method of die, comprises the following steps：1. by multiple high-pressure thyristor chips by spacing for 3mm be equidistantly placed in
In oxidation furnace (not shown), the anode surface and negative electrode of each high-pressure thyristor chip is caused after aoxidizing 5 hours at 1250 DEG C
Generate respectively on face and taken out after the oxide layer 5 that a layer thickness is 1.5 microns；2. photoetching, photoetching are carried out to high-pressure thyristor chip
Remove the oxide layer 5 on the surface of short dot 4 on oxide layer 5 and the cathode plane on the anode surface of high-pressure thyristor chip, retain cloudy
The oxide layer 5 on phosphorous layer surface is expanded in N+ phosphorus diffusion region 3 on pole-face；3. will remove the high-pressure thyristor chip after portion of oxide layer 5 by
Spacing is equidistantly placed in oxidation furnace (not shown) for 0.8mm, and is applied on the anode surface of each high-pressure thyristor chip
Upper thickness is 1 micron of boron source 6, carries out being taken out after boron spreads 4 hours at 1250 DEG C.
The high-pressure thyristor chip after the diffusion of above-mentioned Boron diffusion method boron of learning from else's experience carries out the measure of relevant parameter, and and Jing
The high-pressure thyristor chip crossed after existing Boron diffusion method boron diffusion is contrasted, and comparing result is as follows：
(1) boron expansion is carried out to the high-pressure thyristor chip of 404011 batches KP1300A-6500V using the present embodiment method
Dissipate, the high-pressure thyristor chip after 6 diffusions of random choose carries out service time, peak voltage drop, voltage build-up rate, positive leakage current
And the test of the relevant parameter such as anti-leakage current, wherein the corresponding test condition of each parameter is as follows：The condition determination of service time：Just
It is 2200V to voltage, gate trigger current peak value of pulse is 2A, and the trigger pulse rise time is 0.5 μ s；The measure of peak voltage drop
Condition：Junction temperature is 125 DEG C, and peak point current is 1500A；The condition determination of voltage build-up rate:Junction temperature is 125 DEG C, and voltage is opened from zero
Initial line rises to 3750V；The measure of forward leakage current and reverse leakage current:Junction temperature is 125 DEG C, backward voltage, forward voltage
It is 6500V.Test result is as shown in table 1：
Table 1：To carrying out testing the relevant parameter for obtaining using the high-pressure thyristor chip after the diffusion of the present embodiment method boron
(2) adopt and the method pair that boron diffusion is only carried out to anode surface is mentioned in prior art, i.e. background technology method (2)
The high-pressure thyristor chip of 402005 batches KP1300A-6500V carries out boron diffusion, because boron diffusion has one in existing method
Series of defect, therefore best condition, i.e. diffusion temperature are under the condition selection existing method of boron diffusion in this test
1250 DEG C, diffusion time is 0.5 hour, and the diffusion spacing of each high-pressure thyristor chip is 3mm, and boron source thickness is 1 micron, at random
Selecting the high-pressure thyristor chip after 6 diffusions carries out service time, peak voltage drop, voltage build-up rate, forward leakage current and anti-
To the test of the relevant parameters such as leakage current, the test condition of each relevant parameter is identical with (1), and test result is as shown in table 2：
Table 2：To carrying out testing the relevant parameter for obtaining using the high-pressure thyristor chip after the diffusion of existing method boron
Above-mentioned test result is contrasted it is found that the high-pressure thyristor for carrying out being obtained after boron diffusion using the present embodiment method
The service time of chip is short, that is, open speed soon, and on-state voltage drop is little, and voltage build-up rate is improved largely, and junction temperature leakage current
It is less.
In other concrete practical operations, step 1. in can by multiple high-pressure thyristor chips by spacing be 2～3mm it is equidistant
From being positioned in oxidation furnace, aoxidize at 1200～1300 DEG C the anode surface that causes each high-pressure thyristor chip for 2～10 hours and
Generate respectively on cathode plane and taken out after oxide layer of a layer thickness more than 1.5 microns.
Step 3. in will remove the high-pressure thyristor chip after portion of oxide layer and be equidistantly placed for 0.5～1mm by spacing
In expansion boron stove, and the boron source that thickness is 0.8～1.5 micron is coated on the anode surface of each high-pressure thyristor chip, 1200
Carry out being taken out after boron spreads 1～4 hour at～1300 DEG C.
Claims (2)
1. a kind of Boron diffusion method of high-pressure thyristor chip, it is characterised in that comprise the following steps：1. by multiple high piezocrystal locks
Die is equidistantly placed in oxidation furnace by spacing for 2～3mm, is aoxidized at 1200～1300 DEG C 2～10 hours and is caused respectively
Generate respectively on the anode surface and cathode plane of high-pressure thyristor chip and taken out after oxide layer of a layer thickness more than 1.5 microns；②
Carry out photoetching to high-pressure thyristor chip, it is short in the oxide layer and cathode plane that photoetching is removed on the anode surface of high-pressure thyristor chip
The oxide layer on waypoint surface, retains the oxide layer on N+ phosphorus diffusion region surface on cathode plane；3. the height after portion of oxide layer will be removed
Pressure thyristor chip is equidistantly placed in expansion boron stove, and in the anode surface of each high-pressure thyristor chip by spacing for 0.5～1mm
On coat the boron source that thickness is 0.8～1.5 micron, carry out at 1200～1300 DEG C boron spread 1～4 hour after take out；
Described step 1. in multiple high-pressure thyristor chips are equidistantly placed in oxidation furnace by spacing for 3mm, 1250
Aoxidize at DEG C and generate a layer thickness on the anode surface and cathode plane that cause within 5 hours each high-pressure thyristor chip respectively more than 1.5 micro-
Take out after the oxide layer of rice.
2. a kind of Boron diffusion method of high-pressure thyristor chip according to claim 1, it is characterised in that described step
3. the high-pressure thyristor chip after portion of oxide layer will be removed in be equidistantly placed in expansion boron stove for 0.8mm by spacing, and
The boron source that thickness is 1 micron is coated on the anode surface of each high-pressure thyristor chip, carries out being taken after boron spreads 4 hours at 1250 DEG C
Go out.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410604940.1A CN104392911B (en) | 2014-10-31 | 2014-10-31 | Boron diffusion method of high-voltage thyristor chips |
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| CN201410604940.1A CN104392911B (en) | 2014-10-31 | 2014-10-31 | Boron diffusion method of high-voltage thyristor chips |
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| CN104392911B true CN104392911B (en) | 2017-04-12 |
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| CN107180866B (en) * | 2017-06-15 | 2023-06-02 | 西安派瑞功率半导体变流技术股份有限公司 | Gate of thyristor branch full-distributed N+ amplifier |
| CN110896098B (en) * | 2019-11-15 | 2021-07-27 | 华中科技大学 | Reverse switch transistor based on silicon carbide base and preparation method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4937644A (en) * | 1979-11-16 | 1990-06-26 | General Electric Company | Asymmetrical field controlled thyristor |
| US6025610A (en) * | 1997-01-23 | 2000-02-15 | Nec Corporation | Solid relay and method of producing the same |
| US6180965B1 (en) * | 1996-09-17 | 2001-01-30 | Ngk Insulators, Ltd. | Semiconductor device having a static induction in a recessed portion |
| CN103700591A (en) * | 2013-12-26 | 2014-04-02 | 鞍山市华辰电力器件有限公司 | Method for manufacturing high-voltage large-power thyristor by adopting sintering process |
-
2014
- 2014-10-31 CN CN201410604940.1A patent/CN104392911B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4937644A (en) * | 1979-11-16 | 1990-06-26 | General Electric Company | Asymmetrical field controlled thyristor |
| US6180965B1 (en) * | 1996-09-17 | 2001-01-30 | Ngk Insulators, Ltd. | Semiconductor device having a static induction in a recessed portion |
| US6025610A (en) * | 1997-01-23 | 2000-02-15 | Nec Corporation | Solid relay and method of producing the same |
| CN103700591A (en) * | 2013-12-26 | 2014-04-02 | 鞍山市华辰电力器件有限公司 | Method for manufacturing high-voltage large-power thyristor by adopting sintering process |
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