CN104362139B - Diffusion impervious layer, semiconductor devices and its manufacture method of copper-connection - Google Patents
Diffusion impervious layer, semiconductor devices and its manufacture method of copper-connection Download PDFInfo
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- CN104362139B CN104362139B CN201410487739.XA CN201410487739A CN104362139B CN 104362139 B CN104362139 B CN 104362139B CN 201410487739 A CN201410487739 A CN 201410487739A CN 104362139 B CN104362139 B CN 104362139B
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Abstract
The invention discloses a kind of diffusion impervious layer of copper-connection, semiconductor devices and its manufacture method, pass through three step deposition of tantalum or tantalum nitride membrane, tantalum tantalum or tantalum tantalum nitride tantalum structure are formed in contact hole bottom, forms tantalum nitride tantalum structure in side wall, at contact hole bottom and lower metal adhesion it is stronger, underlying copper line and diffusion barrier ply stress can effectively be reduced, the ability of resistance to stress migration and electromigration is improved, greatly improves the reliability of integrated circuit；There is more preferable mechanical strength in contact hole side-walls, deficiency of the ultralow dielectric medium in mechanical strength can be made up well, improve product quality and life-span.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, more particularly to a kind of diffusion impervious layer of copper-connection, semiconductor device
Part and its manufacture method.
Background technology
With the continuous improvement of integrated circuit integrated level, as intraconnections material, its performance has been difficult to meet to integrate very well Al
The requirement of circuit.Cu compared with Al there is low resistivity and high deelectric transferred ability to obtain widely should in deep sub-micron technique
With.However, Cu is the arch-criminal for causing component failure again, it is a heavy metal species that this, which is primarily due to Cu, in the feelings of high temperature and added electric field
Under condition, can quickly it be spread in semi-conductor silicon chip and silica, the problem of causing in terms of device reliability.So in Cu
Between wiring layer and buffer layer, it is necessary to plus the diffusion barrier material for preventing that Cu from spreading, such as TaN, TiSiN, Ta etc.
To realize the purpose for preventing that Cu from spreading.
Meanwhile with the raising of chip integration, interconnecting line becomes thinner, narrower, thinner, therefore electric current therein is close
Spend increasing.Under higher current density effect, the metallic atom in interconnecting line will enter along electron motion direction
Row migration, this phenomenon is exactly electromigration (EM).Electromigration can make the interconnecting line in IC produce in the course of the work open circuit or
Short circuit, it is a kind of important mechanisms for causing ic failure.So plus diffusion between Cu wiring layers and buffer layer
Barrier material can also prevent Cu that electromigration occurs, with can improving Cu and buffer layer in addition adhesiveness.
Disclosed patent or document had many to the diffusion impervious layer between Cu wiring layers and buffer layer in the past
Open and report, such as the U.S. Patent application of Publication No. 2004/0152301 and 2004/0152330 and 2005/0023686
By adding diffusion impervious layer such as Ta and TaN, metal nitride and WSiN materials between Cu wiring layers and buffer layer
To prevent Cu to be diffused to buffer layer, but for the undisclosed Prevention method of diffusions of the Cu into metal Al.In deep Asia
In micron process, the extraction metal gasket made on top layer Cu wiring layers still uses Al, because Cu can be carried out into Al bed courses
Diffusion, the larger CuAl of the generation resistivity that reacts2, it is therefore necessary to draw between top layer Cu wiring layers and metal Al bed courses
Enter barrier layer.
Ta is a kind of very attractive Cu diffusion impervious layer, and Ta nitride such as TaN is a kind of Cu and F ion
Effective barrier layer, just it is being widely used in Cu interconnection processes at present.But in usual technique, the TaN structures of formation
Than more loose, prevent that the ability that Cu spreads is weaker.
Traditional copper interconnection structure is as shown in figure 1, be included in the low dielectric coefficient medium layer formed on underlying copper line 100
101, formed with interconnection contact hole in low dielectric coefficient medium layer 101, the bottom wall and side wall for covering the through-hole interconnection are formed
There is anti-copper diffusion barrier layer 103, formed with copper-connection contact hole on the anti-copper diffusion barrier 103 in the through-hole interconnection
102.As described above, copper interconnection structure is used in integrated circuits, it is necessary to prevent that copper is normal in low dielectric using diffusion impervious layer
Diffusion in number dielectric layer 101 between interface, and the adhesion of levels copper cash is improved, to improve deelectric transferred and stress migration
Ability, improve the reliable life of levels interconnection.
With dimensions of semiconductor devices continuous diminution and low mechanical strength ultralow dielectric material application so that
Diffusion impervious layer plays more and more crucial effect, therefore in modern copper-connection integrated circuit, diffusion impervious layer and Zhou Biancai
The adhesion and adhesion of material are also more and more important.
However, the diffusion impervious layer applied at present is mostly single layer of tantalum thin-film material or tantalum nitride-tantalum bilayer film material, but
In reliability testing, it is particularly easy to the interface in such as Fig. 1 between diffusion impervious layer 103 and underlying copper line 100 and asks
Topic, have a strong impact on quality and the life-span of product, especially electric migration performance and stress migration performance.
The content of the invention
In order to realize the goal of the invention of the present invention, the present invention provides a kind of diffusion impervious layer of copper-connection, semiconductor devices
And its manufacture method, for improving the adhesiveness of diffusion impervious layer and underlying copper line and adhesion, and improve the anti-electricity of copper-connection and move
The reliability performance such as shifting and resistance to stress migration.
The diffusion impervious layer of copper-connection provided by the invention, the copper for contact hole are integrated in application, and the contact hole is formed
In low dielectric coefficient medium layer, the low dielectric coefficient medium layer is located on underlying copper line layer, the bottom of the contact hole and
Side wall includes formed with diffusion impervious layer, the diffusion impervious layer：
First tantalum layer, it is covered in the bottom of the contact hole；
Tantalum nitride layer, it is covered in the side wall of the contact hole；And
Second tantalum layer, it is covered on first tantalum layer and tantalum nitride layer.
Further, tantalum nitride layer is also covered between the first tantalum layer and the second tantalum layer on the contact hole bottom, is formed
The sandwich laminated structure of tantalum-tantalum nitride-tantalum of contact hole bottom.
Further, first tantalum layer, the second tantalum layer and tantalum nitride layer are deposited by PVD, MOCVD or ALD method, thickness
Respectively 0.5nm-200nm.
The present invention also provides a kind of copper-connection semiconductor devices with above-mentioned diffusion impervious layer, and it includes underlying copper line
The contact hole formed in low dielectric coefficient medium layer and low dielectric coefficient medium layer on layer, copper wire layer, the contact hole
Bottom and side wall include formed with diffusion impervious layer, the diffusion impervious layer：
First tantalum layer, it is covered in the bottom of the contact hole；
Tantalum nitride layer, it is covered in the side wall of the contact hole；And
Second tantalum layer, it is covered on first tantalum layer and tantalum nitride layer.
The present invention also provides a kind of manufacture method for above-mentioned diffusion impervious layer, in copper-connection semiconductor devices,
The semiconductor devices is including in the low dielectric coefficient medium layer and low dielectric coefficient medium layer on underlying copper line layer, copper wire layer
The contact hole of formation, the manufacture method of the diffusion impervious layer comprise the following steps：
Step S01, in the tantalum layer of contact hole bottom deposit first；
Step S02, in the contact hole side wall and bottom deposit tantalum nitride layer；
Step S03, in the contact hole side wall and the tantalum layer of bottom deposit second.
Further, step S02 also includes the tantalum nitride layer for removing the partly or entirely contact hole bottom deposit.
Further, step S01, which is included on the semiconductor devices, deposits tantalum films, and is banged by etching or ion physical
Hit the tantalum films for removing the contact hole side wall.
Further, first tantalum layer, the second tantalum layer and tantalum nitride layer are deposited by PVD, MOCVD or ALD method, thickness
Respectively 0.5nm-200nm.
Further, the manufacture method also includes step S04, and deposited copper seed layer and copper are filled out on the semiconductor devices
Layer is filled, step S05, the unnecessary copper and diffusion impervious layer of the semiconductor device surface is removed by CMP.
Further, the copper seed layer is deposited by PVD or ALD methods, and its thickness is 0.5nm-1000nm；The copper is filled
Layer is electroplated by ECP methods, and its thickness is 200nm-3000nm.
Diffusion impervious layer, semiconductor devices and its manufacture method of the copper-connection of the present invention, pass through three step deposition of tantalum or nitrogen
Change tantalum films, be respectively formed two layers in contact hole bottom and side wall or three-layer sandwich structure, relative to other existing diffusion barriers
The combination of layer material, the structure as covered one layer of tantalum films on tantalum nitride membrane, composite diffusion barrier layer of the invention and lower floor
The adhesion of metal is stronger, can effectively reduce underlying copper line and diffusion barrier ply stress, improves resistance to stress migration and electromigration
Ability, greatly improve the reliability of integrated circuit；Relative to individual layer tantalum films, composite diffusion barrier layer of the invention has more
Good mechanical strength, deficiency of the ultralow dielectric medium in mechanical strength can be made up well, improve product quality and life-span.Specifically
Ground：
Resistivity relative to tantalum nitride is 1.28 × 10-2Ohm meter, and the resistivity of tantalum is much lower, is specially
1.7528 ×10-8Ohm meter.Substitute tantalum nitride membrane with tantalum films in the bottom of contact hole, stop effect keeping original
The resistance of whole contact hole can be effectively reduced while fruit；
The tantalum films of same thickness, tantalum nitride membrane have higher mechanical strength and resistance, come for the side wall of contact hole
Say, tantalum nitride of the invention-tantalum composite diffusion barrier layer is higher than individual layer tantalum films mechanical strength, so as to make up low dielectric medium and
Deficiency of the ultralow dielectric medium in mechanical strength；
For the bottom of contact hole, the use tantalum-tantalum nitride-tantalum three-layer sandwich composite diffusion resistance of the present invention preferably
Barrier compared to other dual layer nitride tantalum-tantalum diffusion impervious layers for, it is more preferable with the adhesiveness of underlying copper line, between copper-tantalum interface
Stress is also smaller, so as to largely improve the migration of the resistance to stress of copper-connection and deelectric transferred ability.
Brief description of the drawings
For that can become apparent from understanding purpose, feature and advantage of the present invention, the preferable reality below with reference to accompanying drawing to the present invention
Example is applied to be described in detail, wherein：
Fig. 1 is traditional copper interconnection structure schematic diagram；
Fig. 2 is the diffusion barrier structure schematic diagram of first embodiment of the invention；
Fig. 3 is the diffusion barrier structure schematic diagram of second embodiment of the invention；
Fig. 4 A-4G are each step schematic diagrams of manufacture method of the diffusion impervious layer of second embodiment of the invention.
Embodiment
First embodiment
Referring to Fig. 2, the diffusion impervious layer of the copper-connection in the present embodiment is used in the integrated application of copper of contact hole, this reality
Applying the semiconductor devices of a diffusion impervious layer includes the low dielectric coefficient medium layer 11 on underlying copper line layer 10, copper wire layer 10
And the contact hole 18 formed in low dielectric coefficient medium layer 11, the diffusion impervious layer of the present embodiment specifically include following structure：
First tantalum layer 12, the bottom of contact hole 18 is covered in, that is, directly overlayed on the surface of copper wire layer 10 exposed；
Tantalum nitride layer 13, is covered in the side wall of contact hole 18, does not contact the copper wire layer 10 of lower floor；And
Second tantalum layer 14, it is covered on the first tantalum layer 12 and tantalum nitride layer 13, the growth base for follow-up copper seed layer
Matter layer.
The present embodiment in contact hole bottom by forming tantalum-tantalum, side wall forms tantalum nitride-tantalum double-layer structure so that diffusion
Barrier layer bottom and lower floor copper adhesiveness is good, adhesion is strong, can effectively reduce underlying copper line and diffusion barrier ply stress,
The ability of resistance to stress migration and electromigration is improved, greatly improves the reliability of integrated circuit, while can effectively reduce and entirely connect
The resistance of contact hole；Then there is more preferable mechanical strength in side-walls, ultralow dielectric medium can be made up well in mechanical strength
Deficiency, improve product quality and life-span.
The manufacture method of the present embodiment diffusion impervious layer specifically includes following steps：
Step S01, in the first tantalum layer of bottom deposit 12 of contact hole 18；
Step S02, in the side wall deposition tantalum nitride layer 13 of contact hole 18；
Step S03, in the side wall of contact hole 18 and the second tantalum layer of bottom deposit 14.
Wherein, 13 layers of the first tantalum layer 12, the second tantalum layer 14 and tantalum nitride can be deposited by PVD, MOCVD or ALD method, thick
Degree is respectively 0.5nm-200nm.
In this manufacture method, step S01 is included on this semiconductor devices one layer of tantalum films of deposition, and by etching or from
Muon physics bombardment removes the tantalum films of the side wall of contact hole 18, to form the first tantalum layer 12 for being deposited on the bottom of contact hole 18.Step
S02 is included in one layer of tantalum nitride membrane of deposition on this semiconductor devices, and removes contact hole by etching or ion physical bombardment
The tantalum nitride membrane of 18 bottoms, retain wall films, to form the tantalum nitride layer 13 for being deposited on the side wall of contact hole 18.Step S03
Including depositing one layer of tantalum films on the semiconductor device, with formed be deposited on the first tantalum layer of bottom 12 of contact hole 18 and
The second tantalum layer 14 on the side wall tantalum nitride layer 13 of contact hole 18.
After this manufacture method, can further deposited copper seed layer and copper packed layer, to complete the integrated of copper contact.
Second embodiment
Referring to Fig. 3, the diffusion impervious layer of the copper-connection in the present embodiment is used in the integrated application of copper of contact hole, this reality
Applying the semiconductor devices of a diffusion impervious layer includes the low dielectric coefficient medium layer 21 on underlying copper line layer 20, copper wire layer 20
And the contact hole 28 formed in low dielectric coefficient medium layer 21, the diffusion impervious layer of the present embodiment specifically include following structure：
First tantalum layer 22, the bottom of contact hole 28 is covered in, that is, directly overlayed on the surface of copper wire layer 20 exposed；
Tantalum nitride layer 23, it is covered on the side wall of contact hole 28 and the first tantalum layer 22 of the bottom of contact hole 28, does not connect
Touch down the copper wire layer 20 of layer；And
Second tantalum layer 24, it is covered on the tantalum nitride layer 23 of the side wall of contact hole 28 and bottom, for follow-up copper seed layer
Growth substrate layer.
The present embodiment in contact hole bottom by forming tantalum-tantalum nitride-tantalum three-layer sandwich stepped construction, side wall forms nitridation
Tantalum-tantalum double-layer structure so that diffusion impervious layer bottom and lower floor copper adhesiveness is more preferable, adhesion is stronger, can effectively subtract
Few underlying copper line and diffusion barrier ply stress, the ability of resistance to stress migration and electromigration is improved, greatly improve integrated circuit can
By property, while it can effectively reduce the resistance of whole contact hole；Then there is more preferable mechanical strength in side-walls, can well more
Deficiency of the ultralow dielectric medium in mechanical strength is mended, improves product quality and life-span.
Wherein, three layers of tantalum-tantalum nitride-tantalum are formed compared to first embodiment of the invention, the present embodiment contact hole bottom
Structure, more preferable with the adhesiveness of underlying copper line, stress is smaller between copper-tantalum interface, so as to largely improve copper-connection
Resistance to stress migrates and deelectric transferred ability.Meanwhile the tantalum nitride layer for retaining the bottom of contact hole 28 also implies that and compares first embodiment
A step of step removes contact hole bottom nitride tantalum films is saved, technique is simpler, and cost is lower.
Please continue to refer to Fig. 4 A-4G, the manufacture method of the present embodiment diffusion impervious layer specifically includes following steps：
Step S01, as shown in Figure 4 A, there is provided semiconductor device, it includes underlying copper line layer 20, on copper wire layer 20
Low dielectric coefficient medium layer 21, by etching, contact hole 28 is opened on low dielectric coefficient medium layer 21, and remove through over cleaning
Impurity and residual on device, expose underlying copper line layer 20；
Step S02, as shown in Figure 4 B, one layer of tantalum films are deposited on device, and go by etching or ion physical bombardment
Except the tantalum films of the side wall of contact hole 28, one layer of first tantalum layer 22 for being deposited on the bottom of contact hole 28 is formed, the first tantalum layer 22 is complete
It is covered on the copper wire layer 20 exposed；
Step S03, as shown in Figure 4 C, deposits one layer of tantalum nitride membrane on device, and the side of contact hole 28 is deposited on to be formed
Tantalum nitride layer 23 on wall and the first tantalum layer of bottom 22；
Step S04, as shown in Figure 4 D, deposits one layer of tantalum films on device, and the side wall nitrogen of contact hole 28 is deposited on to be formed
Change the second tantalum layer 24 on tantalum layer 23 and bottom nitride tantalum layer 23.
The step of the above four completes the making of copper-connection diffusion impervious layer, wherein, the first tantalum layer 22, the second tantalum layer 24 and tantalum nitride
23 layers can be deposited by the methods of PVD, MOCVD or ALD, and thickness can be respectively 0.5nm-200nm.
In order to further complete the integrated of copper contact, this manufacture method also includes the step of deposited copper seed layer and copper packed layer
Suddenly, specifically：
Step S05, as shown in Fig. 4 E, continue to deposit one layer of copper seed layer on this semiconductor devices that step S04 is formed
25；
Step S06, as shown in Fig. 4 F, one layer of copper packed layer 26 is electroplated on copper seed layer 25；
Step S07, as shown in Fig. 4 G, it is unnecessary that this semiconductor device surface is removed by chemomechanical copper grinding (CMP)
Copper and diffusion impervious layer, complete the integrated of copper contact.
Wherein, copper seed layer 25 can be deposited by PVD or ALD methods, and its thickness can be 0.5nm-1000nm；Copper is filled out
Filling layer 26 can be electroplated by ECP methods, and its thickness can be 200nm-3000nm.
Claims (10)
1. a kind of diffusion impervious layer of copper-connection, the copper for contact hole is integrated in application, and it is normal that the contact hole is formed at low dielectric
In number dielectric layers, the low dielectric coefficient medium layer is located on underlying copper line layer, the bottom of the contact hole and side wall formed with
Diffusion impervious layer, it is characterised in that the diffusion impervious layer includes：
First tantalum layer, it is covered in the bottom of the contact hole；
Tantalum nitride layer, it is covered in the side wall of the contact hole；And
Second tantalum layer, it is covered on first tantalum layer and tantalum nitride layer.
2. the diffusion impervious layer of copper-connection according to claim 1, it is characterised in that：The first tantalum on the contact hole bottom
Tantalum nitride layer is also covered between layer and the second tantalum layer, forms the sandwich laminated structure of tantalum-tantalum nitride-tantalum of contact hole bottom.
3. a kind of semiconductor devices of copper-connection, it include underlying copper line layer, the low dielectric coefficient medium layer on copper wire layer with
And the contact hole formed in low dielectric coefficient medium layer, the bottom of the contact hole and side wall are formed with diffusion impervious layer, its feature
It is, the diffusion impervious layer includes：
First tantalum layer, it is covered in the bottom of the contact hole；
Tantalum nitride layer, it is covered in the side wall of the contact hole；And
Second tantalum layer, it is covered on first tantalum layer and tantalum nitride layer.
4. the semiconductor devices of copper-connection according to claim 3, it is characterised in that：The first tantalum on the contact hole bottom
Tantalum nitride layer is also covered between layer and the second tantalum layer, forms the sandwich laminated structure of tantalum-tantalum nitride-tantalum of contact hole bottom.
5. a kind of manufacture method of the diffusion impervious layer of claim 1 or 2, the diffusion impervious layer are used for copper-connection semiconductor device
In part, the semiconductor devices is situated between including the low dielectric coefficient medium layer on underlying copper line layer, copper wire layer and low-k
The contact hole formed in matter layer, it is characterised in that the manufacture method of the diffusion impervious layer comprises the following steps：
Step S01, in the tantalum layer of contact hole bottom deposit first；
Step S02, in the contact hole side wall and bottom deposit tantalum nitride layer；
Step S03, in the contact hole side wall and the tantalum layer of bottom deposit second.
6. the manufacture method of diffusion impervious layer according to claim 5, it is characterised in that：Step S02 also includes removal portion
Point or all the contact hole bottom deposit tantalum nitride layer.
7. the manufacture method of diffusion impervious layer according to claim 6, it is characterised in that：Step S01, which is included in this, partly to be led
Tantalum films are deposited on body device, and the tantalum films of the contact hole side wall are removed by etching or ion physical bombardment.
8. the manufacture method of diffusion impervious layer according to claim 5, it is characterised in that：First tantalum layer, the second tantalum layer
Deposited with tantalum nitride layer by PVD, MOCVD or ALD method, thickness is respectively 0.5nm-200nm.
9. the manufacture method of diffusion impervious layer according to claim 8, it is characterised in that：The manufacture method also includes step
S04, deposited copper seed layer and copper packed layer on the semiconductor devices, step S05, the semiconductor devices is removed by CMP
The copper and diffusion impervious layer of excess surface.
10. the manufacture method of diffusion impervious layer according to claim 9, it is characterised in that：The copper seed layer by PVD or
ALD methods deposit, and its thickness is 0.5nm-1000nm；The copper packed layer is electroplated by ECP methods, and its thickness is 200nm-
3000nm。
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| CN111105990B (en) * | 2018-10-29 | 2023-06-23 | 株洲中车时代半导体有限公司 | Thin film structure suitable for copper metallized semiconductor device and preparation method thereof |
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| CN1426097A (en) * | 2001-12-12 | 2003-06-25 | 联华电子股份有限公司 | Graded barrier of metal line copper back end |
| CN1521827A (en) * | 2003-01-30 | 2004-08-18 | 矽统科技股份有限公司 | Process for forming barrier layer in mosaic structure |
| US7071564B1 (en) * | 2004-03-04 | 2006-07-04 | Advanced Micro Devices, Inc. | Composite tantalum capped inlaid copper with reduced electromigration and reduced stress migration |
| CN1947236A (en) * | 2002-12-11 | 2007-04-11 | 国际商业机器公司 | A method for depositing a metal layer on a semiconductor interconnect structure |
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2014
- 2014-09-23 CN CN201410487739.XA patent/CN104362139B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1426097A (en) * | 2001-12-12 | 2003-06-25 | 联华电子股份有限公司 | Graded barrier of metal line copper back end |
| CN1947236A (en) * | 2002-12-11 | 2007-04-11 | 国际商业机器公司 | A method for depositing a metal layer on a semiconductor interconnect structure |
| CN1521827A (en) * | 2003-01-30 | 2004-08-18 | 矽统科技股份有限公司 | Process for forming barrier layer in mosaic structure |
| US7071564B1 (en) * | 2004-03-04 | 2006-07-04 | Advanced Micro Devices, Inc. | Composite tantalum capped inlaid copper with reduced electromigration and reduced stress migration |
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