CN104348692A - Synchronous concurrent inter-board communication method of data acquiring and control equipment based on Ethernet - Google Patents
Synchronous concurrent inter-board communication method of data acquiring and control equipment based on Ethernet Download PDFInfo
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- CN104348692A CN104348692A CN201310328552.0A CN201310328552A CN104348692A CN 104348692 A CN104348692 A CN 104348692A CN 201310328552 A CN201310328552 A CN 201310328552A CN 104348692 A CN104348692 A CN 104348692A
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Abstract
The invention adopts the Ethernet to form a star-type Ethernet using master control units as a core between the master control units and an acquiring unit of data acquiring and control equipment, wherein the master control units periodically send an acquiring instruction Ethernet message to the acquiring unit simultaneously, the acquiring unit synchronizes local clocks after receiving the instruction message so as to synchronously acquire and return the acquired data to the mater control units through the Ethernet message, thereby realizing the clock synchronization and master-slave mode synchronous acquiring of the master control units and the acquiring unit.
Description
Technical field
Belong to data communication technology field and technical field of industrial control.
Technical background
Need between the main control unit of data acquisition and control equipment and collecting unit to be contacted by the high-speed communication bus of backboard, usually use certain technology of physical layer, such as serdes or local bus etc.This method adopts Ethernet to realize intercell communication, open good, facilitates interconnected between plate and Standardization instrument; Cost performance is high, can reduce equipment cost.
Summary of the invention
The data acquisition and control equipment of Industry Control, usually by main control unit, AD (analog quantity is to digital quantity) converting unit, DO (output switch parameter) unit with DI (On-off signal) unit forms and sensor unit forms, completes the output function of switch amount, the synchronous acquisition of analog quantity, the calculating of collection capacity, control algolithm process and action command.The above-mentioned component units of this kind equipment uses certain bus to communicate by backboard usually.The present invention uses Ethernet to realize concurrent synchronous acquisition between unit.
The present invention use from main control unit to other unit star-like ethernet communication mode, each collecting unit (AD, DI, DO) uses independent ethernet channel to master control.Ethernet physical layer can be any FDX Ethernet technology meeting IEEE802.3 standard, such as 100baseT, 1000baseT, 1000FX etc.The Information encapsulation needing to communicate is transmitted by above-mentioned Ethernet with collecting unit by main control unit in Ethernet message.As shown in Figure 1.
The present invention adopts the master-slave mode from main control unit to collecting unit to gather controlling mechanism and master-salve clock synchronization mechanism realizes synchronous data sampling.
Clock synchronous utilizes main control unit to transmit the chain-circuit time delay principle of fixing and main control unit to collecting unit Ethernet periodically to send message to collecting unit and realize the mechanism that collecting unit carries out time service.The maximum timing length of local clock of all unit adopts collection period T, when master clock was 0 moment, main control unit sends acquisition instructions message to all collecting units simultaneously, if the time delay to the ethernet link of certain collecting unit is t, this collecting unit local clock time when receiving this acquisition message is τ, then the error of local clock and master clock is (τ-t).Revise this error, just can realize the synchronous of this collecting unit local clock and master clock.
The chain-circuit time delay measuring Ethernet can adopt special ethernet test instrument, also can use dynamic measurement method.Dynamic measurement method: main control unit sends special latency measurement message to collecting unit, collecting unit is received this message and is returned this message immediately, and the time difference t1 received and send is placed in this message, main control unit receives the message returned, calculate the time difference t2 sending and receive, then the half of (t2-t1) is exactly the time delay changing ethernet link.Here be all as the criterion with first bit receiving message computing time.
Master-slave mode periodically gathers controlling mechanism: only have when collecting unit receives the acquisition instructions message of master control, collecting unit just responds collection back message; Control action information (D O) and management information that main control unit issues can be carried in acquisition instructions message; Gather in back message and carry image data (A D or D I information) and this collecting unit running state information.After collecting unit receives acquisition instructions message, adopt its local clock, in the moment (this moment should be set in all collecting units all receive acquisition instructions message after) of setting, carry out synchronous A D or the collection of D I datum, and enter to gather back message send back to main control unit by gathering the data encapsulation come.The data of collection are taken out, are consigned to control algolithm and data analysis, computing unit in the moment of setting after receiving the collection back message that all collecting units respond by main control unit from message.
Accompanying drawing explanation
Fig. 1 main control unit forms star-like Ethernet to each collecting unit
Fig. 2 main control unit realizes explanation
Embodiment
Adopt 100baseT ethernet technology, between main control unit to 8 collecting units, form 8 road Ethernets by apparatus back board.
Main control unit uses FPGA add 8 mouthfuls of Ethernets and support that the PHY chip of 100baseT realizes technology of the present invention.FPGA completes Ethernet mac layer function and clock, time synchronized and cycle gather calling function; PHY chip is connected by MII interface with FPGA, mainly realizes 100baseT physical layer function, and is connected to backboard by every road Ethernet 2 pairs of differential signals of 100baseT technology.
Backboard provides the 100baseT differential signal line (2 pairs, every road differential lines) of the 8 road Ethernets meeting IEEE802.3 standard-required, connects main control unit respectively to 8 collecting units.
By a FPGA (or CPLD) and a single port, each collecting unit supports that the PHY chip of 100baseT realizes technology of the present invention.FPGA realizes ethernet mac layer function and clock, time synchronized and cycle acquisition function; PHY chip is connected with FPGA by standard MII (media independent interface) interface, is mainly completed and mainly realize 100baseT physical layer function, and is connected to backboard with crossing 100baseT differential signal.As shown in Figure 2.
The FPGA of main control unit and collecting unit utilizes local crystal oscillator to drive a counter as clock.Be T for collection period, the maximum age time of clock is also arranged to T.Utilize the ethernet link transmission time t (in order to simple implementation, this implementation method do not adopt dynamic link latency measurement way) of main control unit to collecting unit passing through ethernet test instrument measurement in advance.Main control unit is by cycle T when clock time is 0, and Timing Synchronization sends to each collecting unit and gathers calling message; When collecting unit receives this message, the local clock moment is τ, and by calculating the error that (τ-t) obtains with local clock and master clock, this error of correction local clock, realizes the synchronous of local clock and master clock; If simultaneously measurement and control unit have received the collection calling message of master control, just carry out the collection of AD or D I datum by the synchronous acquisition moment that local clock is setting, and the data of collection are put into the position that collection back message specifies and send to main control unit.The data of collection are taken out, are consigned to control algolithm and data analysis, computing unit in the moment of setting after receiving the collection back message that all collecting units respond by main control unit from message.
Claims (5)
1. the present invention adopts ethernet communication between main control unit and collecting unit in data acquisition and control equipment, achieves time synchronized and periodic synchronous data acquisition function between all unit.
2. Ethernet physical structure described in claim 1 is take main control unit as the star topology of core to each collecting unit, and each collecting unit has independently FDX Ethernet link to main control unit.Main control unit can be sent with each collecting unit by such Ethernet simultaneously and receive Ethernet message.
3. claim carries out based on periodically sending message between main control unit and each collecting unit the principle that the ethernet link propagation delay time described in main control unit to method during collecting unit pair and 2 fixes, and realizes the mechanism of the time synchronized of all collecting units and main control unit.
4. claim master-slave mode periodically gathers controlling mechanism: only have when collecting unit receives the acquisition instructions message of master control, collecting unit just responds collection back message; Control action information (D O) and management information that main control unit issues can be carried in acquisition instructions message; Gather in back message and carry image data (A D or D I information) and this collecting unit running state information.After collecting unit receives acquisition instructions message, adopt its local clock, in the moment (this moment should be set in all collecting units all receive acquisition instructions message after) of setting, carry out synchronous A D or the collection of D I datum, and the data encapsulation of collection is entered to gather back message send back to main control unit.
5. realize the mechanism of kinetic measurement ethernet link propagation delay time in the Ethernet described by claim 2: main control unit sends special latency measurement message to collecting unit, collecting unit is received this message and is returned this message immediately, and the time difference t1 received and send is placed in this message, main control unit receives the message returned, calculate the time difference t2 sending and receive, then the half of (t2-t1) is exactly the time delay changing ethernet link.Here the time calculated all is as the criterion with first the bit moment receiving message.
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| CN201310328552.0A CN104348692A (en) | 2013-07-23 | 2013-07-23 | Synchronous concurrent inter-board communication method of data acquiring and control equipment based on Ethernet |
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| CN201310328552.0A CN104348692A (en) | 2013-07-23 | 2013-07-23 | Synchronous concurrent inter-board communication method of data acquiring and control equipment based on Ethernet |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106210708A (en) * | 2015-04-30 | 2016-12-07 | 杭州海康威视数字技术股份有限公司 | The detection method of a kind of picture delay and system |
| CN111163513A (en) * | 2018-10-22 | 2020-05-15 | 中国移动通信有限公司研究院 | Method for measuring, reporting and calculating synchronous error between base stations and network node |
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2013
- 2013-07-23 CN CN201310328552.0A patent/CN104348692A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106210708A (en) * | 2015-04-30 | 2016-12-07 | 杭州海康威视数字技术股份有限公司 | The detection method of a kind of picture delay and system |
| CN106210708B (en) * | 2015-04-30 | 2019-02-01 | 杭州海康威视数字技术股份有限公司 | A kind of detection method and system of picture delay |
| CN111163513A (en) * | 2018-10-22 | 2020-05-15 | 中国移动通信有限公司研究院 | Method for measuring, reporting and calculating synchronous error between base stations and network node |
| CN111163513B (en) * | 2018-10-22 | 2022-03-29 | 中国移动通信有限公司研究院 | Method for measuring, reporting and calculating synchronous error between base stations and network node |
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Application publication date: 20150211 |