CN104348608B - Locomotive 6A its exterior bayonet calibration methods - Google Patents
Locomotive 6A its exterior bayonet calibration methods Download PDFInfo
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- CN104348608B CN104348608B CN201410739398.0A CN201410739398A CN104348608B CN 104348608 B CN104348608 B CN 104348608B CN 201410739398 A CN201410739398 A CN 201410739398A CN 104348608 B CN104348608 B CN 104348608B
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Abstract
A kind of locomotive 6A its exteriors bayonet calibration method after TAX information and microcomputer cabinet information are received in the clamping of locomotive 6A system boards, does following processing:(1)After judging the temporal information in TAX information, temporal information is filled into " microcomputer cabinet data frame " or the temporal information in " replying microcomputer cabinet data frame " is arranged to invalid;(2)It, will after receiving microcomputer cabinet data frame(1)In " reply microcomputer cabinet data frame " be sent to microcomputer cabinet.Beneficial effects of the present invention:Using PHASE-LOCKED LOOP PLL TECHNIQUE, the synchronised clock at reply from TAX information, so that it is guaranteed that 6A systems and the time synchronization of TAX casees, foundation for security has been established for the safe operation of locomotive.
Description
Technical field
The present invention relates to a kind of locomotive 6A its exteriors bayonet calibration methods.
Background technology
The high reliability of locomotive operation is always the important goal that user and supplier pursue, and reliability design is to improve production
The key link of product reliability, reliability test are to verify the important means of system reliability design.Locomotive vehicle-mounted security protection
System (abbreviation 6A systems) the security protection equipment intrinsic as locomotive, reliability are particularly important.
During locomotive operation, if ensureing the time of 6A systems and TAX casees(Electric line electron concentration commuting case)One
It causes, is a vital ring.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of locomotive 6A its exteriors bayonet calibration method, existing to solve
The problem of with the presence of technology.
In order to solve the above technical problems, the present invention uses following technical scheme:
TAX information and microcomputer cabinet information are received in a kind of locomotive 6A its exteriors bayonet calibration method, the clamping of locomotive 6A system boards
Afterwards, following processing is done:
(1)After judging the temporal information in TAX information, by temporal information be filled into " microcomputer cabinet data frame " or
Temporal information in " replying microcomputer cabinet data frame " is arranged to invalid;
(2)It, will after receiving microcomputer cabinet data frame(1)In " reply microcomputer cabinet data frame " be sent to microcomputer cabinet.
After the locomotive 6A system boards clamping receives TAX information and microcomputer cabinet information, the temporal information in TAX information is judged
Whether effectively, if effectively, just taking out and being filled into " replying microcomputer cabinet data frame " by information, if invalid, " will just reply
It is invalid that temporal information in microcomputer cabinet data frame " is set to.
Locomotive 6A systems board recovers synchronised clock using PHASE-LOCKED LOOP PLL TECHNIQUE from TAX information.
When locomotive 6A systems board external card mouth realizes that synchronous serial interface communicates by 485 differential paths all the way with external equipment
When, using the method for PHASE-LOCKED LOOP PLL TECHNIQUE recovered clock signal includes,
When receiving the data on differential line using HDLC protocol, after locomotive 6A system boards receive 0x7E data, generate
Clock signal in the event of data jump, then after correcting synchronised clock using phaselocked loop, receives 0x7E data.
Beneficial effects of the present invention:Utilize PHASE-LOCKED LOOP PLL TECHNIQUE, the synchronised clock at reply from TAX information, so that it is guaranteed that 6A
System and the time synchronization of TAX casees have established foundation for security for the safe operation of locomotive.
Description of the drawings
Fig. 1 receives TAX data flowcharts for the clamping of locomotive 6A system boards.
Flow chart when Fig. 2 receives microcomputer cabinet information school for the clamping of locomotive 6A system boards.
Fig. 3 is lock Phase Receiver flow chart.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and detailed description.
As shown in Figure 1 and Figure 2, after bayonet receives TAX information and microcomputer cabinet information outside 6AEXT boards, calibration method point
For following two step:(1)After TAX information is received, after judging the validity of temporal information therein, temporal information is filled out
It is charged to " microcomputer cabinet data frame " or the temporal information in " replying microcomputer cabinet data frame " is arranged to invalid.(2)Receive " microcomputer
It, will after cabinet data frame "(1)In ready " reply microcomputer cabinet data frame " be sent to microcomputer cabinet.
Wherein, it is above-mentioned(1)In, after the clamping of locomotive 6A system boards receives TAX information and microcomputer cabinet information, judge that TAX believes
Whether the temporal information in breath is effective, if effectively, just information being taken out and is filled into " replying microcomputer cabinet data frame ", if
Invalid, it is invalid to be just set to the temporal information in " replying microcomputer cabinet data frame ".
Locomotive 6A systems board recovers synchronised clock using PHASE-LOCKED LOOP PLL TECHNIQUE from the information of TAX.When locomotive 6A systems
When bayonet realizes that synchronous serial interface communicates by 485 differential paths all the way with external equipment outside board, PHASE-LOCKED LOOP PLL TECHNIQUE is used
The method of recovered clock signal includes, and when receiving the data on differential line using HDLC protocol, locomotive 6A system boards receive
After data 0x7E, clock signal is generated, in the event of clock signal transitions, then after correcting synchronised clock using phaselocked loop, is received
0x7E data.
Above-mentioned locomotive 6A systems board external card mouth is not only receiving synchronous phase generation when receiving TAX information
Clock signal, while the stage of data is being received into the synchronization and correction of row clock signal by PHASE-LOCKED LOOP PLL TECHNIQUE.Specifically,
When HDLC protocol is used to receive the data on differential line, if the data received are 01111110(0x7E), and it is next
Data are not 01111110(0x7E), then it is assumed that have received a HDLC data frame frame head;During data are received, if
Receive 01111110(0x7E), then it is assumed that this data frame receipt terminates.Part between the two 0x7E is usually
The complete data of one frame.In general, several 0x7E that the beginning of data frame can be received continuously, these bytes also by with
Synchronised clock is generated, the and then reception of data frame is just received with this synchronised clock, when HDLC data frames are long(Greatly
In 1KB)When, due to receiving device and the clock fine difference of sending device, it is likely to result in and receives clock and tranmitting data register
Phase difference is increasing, will ultimately result in data frame receipt mistake, and after employing Phase Lock Technique, the generation of synchronised clock is not
Synchronous phase only is being received, and the synchronization and correction of clock can be also synchronized receiving data phase;Receiving data mistake
Cheng Zhong, whenever the data on differential bus generate a saltus step(1->0 saltus step or 0->1 saltus step), clock generation mechanism
Clock is corrected using phaselocked loop, so ensures that tranmitting data register with receiving the uniformity of clock.It is connect so as to ensure that
Receive the integrality of data.
Claims (2)
1. a kind of locomotive 6A its exteriors bayonet calibration method, it is characterised in that:
After TAX information and microcomputer cabinet information are received in the clamping of locomotive 6A system boards, following processing is done:
(1)After the locomotive 6A system boards clamping receives TAX information and microcomputer cabinet information, the temporal information in TAX information is judged
Whether effectively, if effectively, just taking out and being filled into " replying microcomputer cabinet data frame " by information, if invalid, " will just reply
It is invalid that temporal information in microcomputer cabinet data frame " is set to;
(2)It, will after receiving microcomputer cabinet data frame(1)In " reply microcomputer cabinet data frame " be sent to microcomputer cabinet;
When locomotive 6A systems board external card mouth realizes that synchronous serial interface communicates by 485 differential paths all the way with external equipment,
The method of used PHASE-LOCKED LOOP PLL TECHNIQUE recovered clock signal includes, when receiving the data on differential line using HDLC protocol, machine
After vehicle 6A system boards receive data 0x7E, clock signal is generated, in the event of data jump, is then corrected using phaselocked loop synchronous
After clock, 0x7E data are received.
2. locomotive 6A its exteriors bayonet calibration method according to claim 1, it is characterised in that:
Locomotive 6A systems board recovers synchronised clock using PHASE-LOCKED LOOP PLL TECHNIQUE from TAX information.
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CN201410739398.0A CN104348608B (en) | 2014-12-08 | 2014-12-08 | Locomotive 6A its exterior bayonet calibration methods |
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CN101860467B (en) * | 2010-05-26 | 2012-07-11 | 株洲南车时代电气股份有限公司 | Special wired train bus control device |
CN102572701B (en) * | 2011-11-30 | 2014-12-31 | 北京邮电大学 | Method and system for time synchronization of indoor locating nodes and locating signal generator |
CN103678728B (en) * | 2013-11-25 | 2016-10-26 | 北京航空航天大学 | A kind of construction method of High-speed Data Recording System based on FPGA+DSP framework |
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---|---|---|---|---|
CN103634402A (en) * | 2013-12-09 | 2014-03-12 | 赵生捷 | Intelligent vehicular safeguard system |
CN104181806A (en) * | 2013-12-20 | 2014-12-03 | 河南思维自动化设备股份有限公司 | Special time calibrator and method for carrying out time calibration on LKJ device by utilizing time calibrator |
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