CN104281535B - A kind for the treatment of method and apparatus of mapping table in internal memory - Google Patents
A kind for the treatment of method and apparatus of mapping table in internal memory Download PDFInfo
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Abstract
The invention discloses a kind for the treatment of method and apparatus of mapping table in internal memory, described method includes：Judge that the sub- mapping table of target whether there is in the sub- storage space S lot；If the sub- mapping table of target is not present in the sub- storage space S lot, judge whether as the sub- storage space S lot of dummy status mark；If existing for the sub- storage space S lot of dummy status mark, in the sub- storage space S lot that the sub- mapping table of the target is identified described in for dummy status；The status indicator of the sub- storage space S lot is updated to non-null states mark.The embodiment of the present invention reduces the read-write operation of data, shortens read-write delay to reduce conversion times of the mapping table in internal memory.
Description
Technical field
The present invention relates to technical field of data processing, more particularly to a kind of processing method and one of mapping table in internal memory
Processing unit of the kind mapping table in internal memory.
Background technology
In the products such as eMMC (Embedded Multi Media Card, embedded multi-media card), flash memory NAND
FTL (Flash Translation Layer, flash translation layer (FTL)), is a kind of medium talked between operating system, due to existing
FTL, therefore operating system can be established multiple virtual using products such as flash memories as a disc driver on the products such as flash memory
Data block or sector are storing and manage data.
The problem of existing at present for FTL be, as the RAM for needing to read the mapping table in FTL operating system
When in (Random Access Memory, random access memory/internal memory), it sometimes appear that mapping table is too big and can not all load
The problem of into internal memory.Therefore can only be loaded when internal memory is run and a part for mapping table is loaded into internal memory, when needing to map
Changed again during the other parts of table, the way of this conversion is referred to as " dynamic load mapping table ".
A kind of schematic diagram of common method for realizing dynamic load mapping table shown in reference picture 1, it carries out dynamic load
Mapping table comprises the concrete steps that：Mapping table is divided into multiple equal part Mapping table Part_1, Mapping
Table Part_2 ... Mapping table Part_m ... Mapping table Part_n, only operationally will mapping
A part for table is loaded into internal memory, such as only loads Mapping table Part_m into internal memory, when the read-write in data
During when needing the other parts of mapping table, than if desired for Mapping table Part_n, it is necessary to first by Mapping
Table Part_m are saved in flash memory NAND, then Mapping table Part_n are loaded into internal memory.This common method
The shortcomings that be, every time carry out mapping table conversion need to carry out the process of extra reading and writing data, cause larger read-write to postpone.
Therefore, a technical problem for needing those skilled in the art urgently to solve at present is exactly：It is proposed a kind of mapping table
Treating method and apparatus in internal memory, to reduce conversion times of the mapping table in internal memory, the read-write operation of data is reduced,
Shorten read-write delay.
The content of the invention
Technical problem to be solved of the embodiment of the present invention is to provide a kind of processing method of mapping table in internal memory, to
Conversion times of the mapping table in internal memory are reduced, reduce the read-write operation of data, shorten read-write delay.
Accordingly, the embodiment of the present invention additionally provides a kind of processing unit of mapping table in internal memory, above-mentioned to ensure
The realization and application of method.
In order to solve the above problems, the invention discloses a kind of processing method of mapping table in internal memory, the mapping table
Include two or more sub- mapping table；The memory space of the internal memory includes two or more son storage
Space S lot, the sub- storage space S lot have a corresponding status indicator, and the status indicator includes dummy status mark and non-
Dummy status identifies；Described method includes：
Judge that the sub- mapping table of target whether there is in the sub- storage space S lot；
If the sub- mapping table of target is not present in the sub- storage space S lot, judge whether as dummy status
The sub- storage space S lot of mark；
If existing for the sub- storage space S lot of dummy status mark, by the sub- mapping table of the target added to described for sky
In the sub- storage space S lot of status indicator；
The status indicator of the sub- storage space S lot is updated to non-null states mark.
Preferably, the access queue of the sub- storage space S lot is stored with the internal memory；The internal memory and flash memory
NAND is communicated；It is described judge whether for dummy status mark sub- storage space S lot the step of after, in addition to：
To be non-null states mark according to the access queue if in the absence of the sub- storage space S lot identified for dummy status
Sub- mapping table in the sub- storage space S lot known is preserved into flash memory NAND；
The status indicator of the sub- storage space S lot is updated to dummy status mark.
Preferably, the sub- mapping table in the sub- storage space S lot that will be identified according to access queue for non-null states is protected
Depositing to the step in flash memory NAND includes：
Obtain the sub- storage space S lot for non-null states mark of the tail of the queue in the access queue；
Sub- mapping table in the sub- storage space S lot is preserved to flash memory NAND.
Preferably, methods described also includes：
When the internal memory is in idle condition, judge whether as the sub- storage space S lot of dummy status mark.
Preferably, it is described by the new mapping table addition most sub- storage space S lot of dummy status mark the step of it
Afterwards, in addition to：
Update the sub- storage space S lot access queues.
The embodiment of the invention also discloses a kind of processing unit of mapping table in internal memory, the mapping table include two or
The more than two sub- mapping tables of person；The memory space of the internal memory includes two or more sub- storage space S lot,
The sub- storage space S lot has corresponding status indicator, and the status indicator includes dummy status mark and non-null states mark
Know；Described device includes：
First judge module, for judging that the sub- mapping table of target whether there is in the sub- storage space S lot；If institute
State the sub- mapping table of target to be not present in the sub- storage space S lot, then call the second module；
Second judge module, for judging whether as the sub- storage space S lot of dummy status mark；If exist for sky
The sub- storage space S lot of status indicator, then call add module；
Add module, for the sub- storage space S lot for identifying the sub- mapping table of the target for dummy status described in
In；
First update module, for the status indicator of the sub- storage space S lot to be updated into non-null states mark.
Preferably, the access queue of the sub- storage space S lot is stored with the internal memory；The internal memory and flash memory
NAND is communicated；Described device also includes：
Preserving module, if in the absence of the sub- storage space S lot identified for dummy status, according to the access queue
Sub- mapping table in the sub- storage space S lot that will be identified for non-null states is preserved into flash memory NAND；
Second update module, for the status indicator of the sub- storage space S lot to be updated into dummy status mark.
Preferably, the preserving module includes：
Sub- storage space S lot acquisition submodules, it is non-null states mark for tail of the queue of the acquisition in the access queue
The sub- storage space S lot known；
Sub- mapping table preserves submodule, for the sub- mapping table in the sub- storage space S lot to be preserved to flash memory NAND
In.
Preferably, described device also includes：
Idle determination module, for when the internal memory is in idle condition, judging whether as dummy status mark
Sub- storage space S lot.
Preferably, described device also includes：
Access queue update module, for updating the sub- storage space S lot access queues.
Compared with prior art, the embodiment of the present invention includes advantages below：
The embodiment of the present invention distributes some memory space in internal memory, and it is empty that the memory space is divided into more height storages again
Between Slot, for depositing the data of specific format.The process of data is being written and read, if it find that the sub- mapping table of target is not present
In sub- storage space S lot, then need for the sub- mapping table of the target to be added to the sub- storage space S lot of non-null states mark
In.Due to being assigned more sub- storage space S lot in internal memory, therefore only need the sub- mapping table of target being added to and reflected without son
The sub- storage space S lot of firing table, it is possible to reduce unnecessary read-write operation, the conversion times of mapping table are reduced, in raising
Deposit process performance.
In addition, the embodiment of the present invention also monitors all sub- storage space S lot state in idle condition, whole sons are deposited
Storage space S lot state records sub- storage space S lot access situation with access queue.If it find that all son storage is empty
Between Slot all have sub- mapping table, then the sub- storage space S lot in access queue afterbody can not entered for a long time
Sub- mapping table in the sub- storage space S lot of line access operation is saved in flash memory NAND, so as to vacate sub- storage space S lot
Come the sub- mapping table of target added, shorten read-write delay.
Brief description of the drawings
Fig. 1 is a kind of schematic diagram of common method for realizing dynamic load mapping table of the present invention；
Fig. 2 is a kind of step flow chart of processing method embodiment 1 of the mapping table of the present invention in internal memory；
Fig. 3 is a kind of schematic diagram being added to target sub- mapping table before internal memory of the present invention；
Fig. 4 is a kind of schematic diagram being added to target sub- mapping table after internal memory of the present invention；
Fig. 5 is a kind of step flow chart of processing method embodiment 2 of the mapping table of the present invention in internal memory；
Fig. 6 is a kind of schematic diagram arrived the storage of sub- mapping table before flash memory NAND of the present invention；
Fig. 7 is a kind of schematic diagram arrived the storage of sub- mapping table after flash memory NAND of the present invention；
Fig. 8 is a kind of structured flowchart of processing unit embodiment of the mapping table of the present invention in internal memory.
Embodiment
In order to facilitate the understanding of the purposes, features and advantages of the present invention, it is below in conjunction with the accompanying drawings and specific real
Applying mode, the present invention is further detailed explanation.
Embodiment one：
Reference picture 2, show a kind of step flow of processing method embodiment 1 of the mapping table of the present invention in internal memory
Figure, the mapping table can include two or more sub- mapping table；The memory space of the internal memory can include two
Individual or more than two sub- storage space S lot, the sub- storage space S lot can have corresponding status indicator, described
Status indicator can include dummy status mark and non-null states mark；
In the specific implementation, mapping table is divided into multiple equal sub- mapping tables, such as Mapping table part_1,
Mapping table part_2, Mapping table part_3 ....The memory space of a part is distributed in internal memory,
And the sub- memory space of many blocks is divided into, each piece of sub- memory space may serve to deposit the data of specific format, than
Such as mapping table.This seed memory space can be visually referred to as a groove (Slot), just as each groove in audio amplifier can be with
One CD of storage is the same, and in embodiments of the present invention, each groove can deposit a mapping table data.
The sub- storage space S lot is provided with corresponding status indicator, to show its storage state.It can specifically wrap
Include dummy status mark and non-null states mark.Wherein, dummy status is identified to represent current in its corresponding storage space S lot
Sub- mapping table is not deposited, non-null states mark then has sub- mapping to current storage in its corresponding storage space S lot
Table.
Methods described specifically may include steps of：
Step 201, judge that the sub- mapping table of target whether there is in the sub- storage space S lot；If target reflects
Firing table is not present in the sub- storage space S lot, then performs step 202；
Step 202, judge whether as the sub- storage space S lot of dummy status mark；If exist for dummy status mark
Sub- storage space S lot, then perform step 203；
Step 203, in the sub- storage space S lot mapping table of the target identified described in for dummy status；
In embodiments of the present invention, during user writable data, if the sub- mapping table of current desired target is not
It is present in internal memory, that is, when being not present in certain sub- storage space S lot, then needs the sub- mapping table of target being added to internal memory
In a certain sub- storage space S lot for dummy status mark, i.e., have the sub- storage space S lot of sub- mapping table currently without storage
In.Now if it is determined that exist for dummy status mark sub- storage space S lot, then the sub- mapping table of target can be added to for
In the sub- storage space S lot of dummy status mark, to ensure the normal operation of user writable data.
Step 204, the status indicator of the sub- storage space S lot is updated to non-null states mark.
After the sub- mapping table of target is added in sub- storage space S lot, due to having been deposited in the sub- storage space S lot
Sub- mapping table has been put, now also the status indicator of the sub- storage space S lot should be revised as non-null states from dummy status mark
Mark, thus illustrate that the sub- storage space S lot has housed sub- mapping table.
In order that those skilled in the art more fully understand the embodiment of the present invention, of the invention one shown in Fig. 3 can refer to
The sub- mapping table of target is added to the schematic diagram before internal memory by kind, and NAND (flash memory) and RAM (internal memory) is communicated in figure,
Include sub- mapping table Mapping table Part_1, Mapping the table Part_2, Mapping of mapping table in NAND
Table Part_3, Mapping table Part_4, Mapping table Part_5 ... ..., in RAM division have it is multiple
Sub- storage space S lot 0, Slot 1, Slot 2, Slot 3, wherein, Mapping table are stored in Slot 0
Part_1, therefore state corresponding to sub- storage space S lot 0, Slot 1, Slot 2, Slot 3 difference is that Non-empty is (non-
Dummy status), empty (dummy status), empty (dummy status), empty (dummy status).
A kind of schematic diagram being added to target sub- mapping table after internal memory of the invention shown in reference picture 4, read in user
During writing data, if the sub- mapping table Mapping table Part_3 of current desired target are not present in internal memory,
Then need Mapping table Part_3 being added in internal memory as in empty memory space, when by Mapping
After table Part_3 are added in internal memory as empty Slot 1, then it is Non-empty to need Slot 1 status modifier
(non-null states).
The embodiment of the present invention distributes some memory space in internal memory, and it is empty that the memory space is divided into more height storages again
Between Slot, for depositing the data (such as mapping table) of specific format.The process of data is being written and read, if it find that target is sub
Mapping table is not present in sub- storage space S lot, then needs for the sub- mapping table of the target to be added to the son of non-null states mark
In storage space S lot.Due to being assigned more sub- storage space S lot in internal memory, therefore only need to add the sub- mapping table of target
It is added to the sub- storage space S lot of no sub- mapping table, it is possible to reduce unnecessary read-write operation, reduce turning for mapping table
Number is changed, improves internal memory process performance.
Embodiment two：
Reference picture 5, show a kind of step flow of processing method embodiment 2 of the mapping table of the present invention in internal memory
Figure, the mapping table can include two or more sub- mapping table；The memory space of the internal memory can include two
Individual or more than two sub- storage space S lot, the sub- storage space S lot can have corresponding status indicator, described
Status indicator can include dummy status mark and non-null states mark；The sub- memory space can be stored with the internal memory
Slot access queue；The internal memory can communicate with flash memory NAND；Specifically it may include steps of：
Step 401, judge that the sub- mapping table of target whether there is in the sub- storage space S lot；If target reflects
Firing table is not present in the sub- storage space S lot, then performs step 402；If the sub- mapping table of target is present in the son
In storage space S lot, then step 407 is performed；
In one preferred embodiment of the invention, methods described can also comprise the following steps：
Step S11, when the internal memory is in idle condition, judge whether as the sub- memory space of dummy status mark
Slot。
In embodiments of the present invention, the access queue of the sub- storage space S lot is stored with internal memory.Example of the present invention
All sub- storage space S lot state can be monitored in idle condition, all sub- storage space S lot state access team
Arrange to record sub- storage space S lot access situation.If it find that all sub- storage space S lot has sub- mapping table, then
Can be by the sub- storage space S lot in access queue afterbody, i.e., long-time is without the sub- memory space for carrying out accessing operation
Sub- mapping table in Slot is saved in flash memory NAND, so as to vacate sub- storage space S lot the sub- mapping table of target that adds,
Avoid not existing for the sub- storage space S lot of dummy status during mapping table sometimes for addition target, it is also necessary to further clear
Time needed for empty a certain sub- storage space S lot, shorten read-write delay.
A kind of schematic diagram arrived the storage of sub- mapping table before flash memory NAND of the invention shown in reference picture 6, when in sky
During not busy state, detection internal memory neutron storage space S lot state.Assuming that sub- storage space S lot 0, Slot 1 in RAM,
Mapping table Part_1, Mapping table Part_3, Mapping are stored in Slot 2, Slot 3 respectively
Table Part_4, Mapping table Part_5, then sub- storage space S lot 0, Slot 1, Slot 2, Slot 3 distinguish
Corresponding state is Non-empty (non-null states).
A kind of schematic diagram arrived the storage of sub- mapping table after flash memory NAND of the invention shown in reference picture 7, when in sky
During not busy state, all sub- storage space S lot state is detected, finds sub- storage space S lot 0, Slot 1, Slot 2,
State corresponding to the difference of Slot 3 is Non-empty, in order to avoid when needing mapping table that target is sub-, the son for sky is not deposited
Space S lot is stored up to deposit, now can be by access queue tail of the queue, i.e., the son for not carrying out storing operation for a long time is deposited
Storage space S lot mapping table is saved in NAND.In this example, because Slot 0 is in access queue tail of the queue, therefore can be with
It is removed from access queue, and the Mapping table Part_1 in Slot 0 are saved in NAND.
Certainly, in actual applications, the sub- storage space S lot not being accessed more than preset time can also be set
Removed from access queue, the embodiment of the present invention is not any limitation as to this.
It should be noted that during user writable data, also with needing the sub- mapping table of target being added to
During sub- storage space S lot in depositing, the sub- storage space S lot of dummy status mark is just determined whether, the embodiment of the present invention is same
Sample is not any limitation as to this.
Step 402, judge whether as the sub- storage space S lot of dummy status mark；If exist for dummy status mark
Sub- storage space S lot, then perform step 405；If in the absence of the sub- storage space S lot identified for dummy status, step is performed
403；
Step 403, the sub- mapping table in the sub- storage space S lot that will be identified according to the access queue for non-null states
Preserve into flash memory NAND；
Need what is illustrated, mapping table can also be stored in other memories except flash memory NAND, the embodiment of the present invention
This is not any limitation as.
In one preferred embodiment of the invention, the step 403 can include following sub-step：
Sub-step S21, obtain the sub- storage space S lot for non-null states mark of the tail of the queue in the access queue；
Sub-step S22, the sub- mapping table in the sub- storage space S lot is preserved to flash memory NAND.
Step 404, the status indicator of the sub- storage space S lot is updated to dummy status mark；
Step 405, in the sub- storage space S lot mapping table of the target identified described in for dummy status；
Step 406, the status indicator of the sub- storage space S lot is updated to non-null states mark；
Step 407, the sub- storage space S lot access queues are updated.
In the specific implementation, the sub- mapping table of target is added in sub- storage space S lot, or current accessed is
It is stored have the sub- storage space S lot of the sub- mapping table of target after, because the sub- storage space S lot of access has occurred that change,
Therefore need to update the sub- storage space S lot access queues in internal memory, it will now store the sub- memory space of the sub- mapping table of target
Slot's is revised as first in access queue.
By taking Fig. 4 as an example, the access queue for recording sub- storage space S lot access orders is stored with RAM.Due to now
The sub- storage space S lot accessed has been changed to Slot 1, therefore also needs to that Mapping table will be stored in internal memory
Part_3 Slot's 1 is revised as first in access queue.
It should be noted that for embodiment of the method, in order to be briefly described, therefore it is all expressed as to a series of action group
Close, but those skilled in the art should know, the embodiment of the present invention is not limited by described sequence of movement, because according to
According to the embodiment of the present invention, some steps can use other orders or carry out simultaneously.Secondly, those skilled in the art also should
Know, embodiment described in this description belongs to preferred embodiment, and the involved action not necessarily present invention is implemented
Necessary to example.
Embodiment three：
Reference picture 8, a kind of structured flowchart of processing unit embodiment of the mapping table of the present invention in internal memory is shown, it is described
Mapping table can include two or more sub- mapping table；The memory space of the internal memory can include two or two
Sub- storage space S lot more than individual, the sub- storage space S lot can have corresponding status indicator, the status indicator
Dummy status mark and non-null states mark can be included；Following module can specifically be included：
First judge module 601, for judging that the sub- mapping table of target whether there is in the sub- storage space S lot；If
The sub- mapping table of target is not present in the sub- storage space S lot, then calls the second module；
Second judge module 602, for judging whether as the sub- storage space S lot of dummy status mark；If exist for
The sub- storage space S lot of dummy status mark, then call add module；
In one preferred embodiment of the invention, the visit of the sub- storage space S lot can be stored with the internal memory
Ask queue；The internal memory can communicate with flash memory NAND；Described device can also include following module：
Preserving module, if in the absence of the sub- storage space S lot identified for dummy status, according to the access queue
Sub- mapping table in the sub- storage space S lot that will be identified for non-null states is preserved into flash memory NAND；
Second update module, for the status indicator of the sub- storage space S lot to be updated into dummy status mark.
Add module 603, for the sub- memory space for identifying the sub- mapping table of the target for dummy status described in
In Slot；
First update module 604, for the status indicator of the sub- storage space S lot to be updated into non-null states mark.
In one preferred embodiment of the invention, the preserving module can include following submodule：
Sub- storage space S lot acquisition submodules, it is non-null states mark for tail of the queue of the acquisition in the access queue
The sub- storage space S lot known；
Sub- mapping table preserves submodule, for the sub- mapping table in the sub- storage space S lot to be preserved to flash memory NAND
In.
In one preferred embodiment of the invention, described device also includes following module：
Idle determination module, for when the internal memory is in idle condition, judging whether as dummy status mark
Sub- storage space S lot.
In one preferred embodiment of the invention, described device also includes following module：
Access queue update module, for updating the sub- storage space S lot access queues.
For device embodiment, because it is substantially similar to embodiment of the method, so description is fairly simple, it is related
Part illustrates referring to the part of embodiment of the method.
Each embodiment in this specification is described by the way of progressive, what each embodiment stressed be with
The difference of other embodiment, between each embodiment identical similar part mutually referring to.
It should be understood by those skilled in the art that, the embodiment of the embodiment of the present invention can be provided as method, apparatus or calculate
Machine program product.Therefore, the embodiment of the present invention can use complete hardware embodiment, complete software embodiment or combine software and
The form of the embodiment of hardware aspect.Moreover, the embodiment of the present invention can use one or more wherein include computer can
With in the computer-usable storage medium (including but is not limited to magnetic disk storage, CD-ROM, optical memory etc.) of program code
The form of the computer program product of implementation.
The embodiment of the present invention is with reference to method according to embodiments of the present invention, terminal device (system) and computer program
The flow chart and/or block diagram of product describes.It should be understood that can be by computer program instructions implementation process figure and/or block diagram
In each flow and/or square frame and the flow in flow chart and/or block diagram and/or the combination of square frame.These can be provided
Computer program instructions are set to all-purpose computer, special-purpose computer, Embedded Processor or other programmable data processing terminals
Standby processor is to produce a machine so that is held by the processor of computer or other programmable data processing terminal equipments
Capable instruction is produced for realizing in one flow of flow chart or multiple flows and/or one square frame of block diagram or multiple square frames
The device for the function of specifying.
These computer program instructions, which may be alternatively stored in, can guide computer or other programmable data processing terminal equipments
In the computer-readable memory to work in a specific way so that the instruction being stored in the computer-readable memory produces bag
The manufacture of command device is included, the command device is realized in one flow of flow chart or multiple flows and/or one side of block diagram
The function of being specified in frame or multiple square frames.
These computer program instructions can be also loaded into computer or other programmable data processing terminal equipments so that
Series of operation steps is performed on computer or other programmable terminal equipments to produce computer implemented processing, so that
The instruction performed on computer or other programmable terminal equipments is provided for realizing in one flow of flow chart or multiple flows
And/or specified in one square frame of block diagram or multiple square frames function the step of.
Although having been described for the preferred embodiment of the embodiment of the present invention, those skilled in the art once know base
This creative concept, then other change and modification can be made to these embodiments.So appended claims are intended to be construed to
Including preferred embodiment and fall into having altered and changing for range of embodiment of the invention.
Finally, it is to be noted that, herein, such as first and second or the like relational terms be used merely to by
One entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operation
Between any this actual relation or order be present.Moreover, term " comprising ", "comprising" or its any other variant meaning
Covering including for nonexcludability, so that process, method, article or terminal device including a series of elements are not only wrapped
Those key elements, but also the other element including being not expressly set out are included, or is also included for this process, method, article
Or the key element that terminal device is intrinsic.In the absence of more restrictions, wanted by what sentence "including a ..." limited
Element, it is not excluded that other identical element in the process including the key element, method, article or terminal device also be present.
Above to a kind of processing method of the mapping table provided by the present invention in internal memory and a kind of mapping table in internal memory
Processing unit, be described in detail, specific case used herein is carried out to the principle and embodiment of the present invention
Illustrate, the explanation of above example is only intended to help the method and its core concept for understanding the present invention；Meanwhile for this area
Those skilled in the art, according to the thought of the present invention, there will be changes in specific embodiments and applications, to sum up
Described, this specification content should not be construed as limiting the invention.
Claims (8)
1. processing method of a kind of mapping table in internal memory, it is characterised in that the mapping table includes two or more
Sub- mapping table；The memory space of the internal memory includes two or more sub- storage space S lot, the sub- storage
Space S lot has corresponding status indicator, and the status indicator includes dummy status mark and non-null states mark；Described side
Method includes：
Judge that the sub- mapping table of target whether there is in the sub- storage space S lot；
If the sub- mapping table of target is not present in the sub- storage space S lot, judge whether to identify for dummy status
Sub- storage space S lot；
If existing for the sub- storage space S lot of dummy status mark, it is dummy status that the sub- mapping table of the target, which is added to described,
In the sub- storage space S lot of mark；
The status indicator of the sub- storage space S lot is updated to non-null states mark；
When the internal memory is in idle condition, judge whether as the sub- storage space S lot of dummy status mark；
It is described to judge whether the sub- storage space S lot identified for dummy status when the internal memory is in idle condition, and also
Including：
All sub- storage space S lot state is monitored in idle condition, all sub- storage space S lot state access team
Arrange to record sub- storage space S lot access situation, if it find that all sub- storage space S lot has sub- mapping table, then
Sub- mapping table in sub- storage space S lot in access queue afterbody can be saved in flash memory NAND.
2. the method according to claim 1, in addition to, it is characterised in that the sub- storage is stored with the internal memory
Space S lot access queue；The internal memory communicates with flash memory NAND；It is described to judge whether as dummy status mark
After the step of sub- storage space S lot, in addition to：
If in the absence of the sub- storage space S lot identified for dummy status, will be identified according to the access queue for non-null states
Sub- mapping table in sub- storage space S lot is preserved into flash memory NAND；
The status indicator of the sub- storage space S lot is updated to dummy status mark.
3. according to the method for claim 2, it is characterised in that the son that will be identified according to access queue for non-null states
Sub- mapping table in storage space S lot, which is preserved to the step in flash memory NAND, to be included：
Obtain the sub- storage space S lot for non-null states mark of the tail of the queue in the access queue；
Sub- mapping table in the sub- storage space S lot is preserved to flash memory NAND.
4. method according to claim 1 or 2, it is characterised in that described by new mapping table addition most dummy status
After the step of sub- storage space S lot of mark, in addition to：
Update the sub- storage space S lot access queues.
5. processing unit of a kind of mapping table in internal memory, it is characterised in that the mapping table includes two or more
Sub- mapping table；The memory space of the internal memory includes two or more sub- storage space S lot, the sub- storage
Space S lot has corresponding status indicator, and the status indicator includes dummy status mark and non-null states mark；Described dress
Put including：
First judge module, for judging that the sub- mapping table of target whether there is in the sub- storage space S lot；If the mesh
Mark sub- mapping table to be not present in the sub- storage space S lot, then call the second module；
Second judge module, for judging whether as the sub- storage space S lot of dummy status mark；If exist for dummy status
The sub- storage space S lot of mark, then call add module；
Add module, for the sub- mapping table of the target to be added in the sub- storage space S lot for dummy status mark；
First update module, for the status indicator of the sub- storage space S lot to be updated into non-null states mark；
Idle determination module, for when the internal memory is in idle condition, judging whether that the son for dummy status mark is deposited
Store up space S lot；
The idle determination module, for when the internal memory is in idle condition, judging whether as dummy status mark
Sub- storage space S lot, in addition to：
All sub- storage space S lot state is monitored in idle condition, all sub- storage space S lot state access team
Arrange to record sub- storage space S lot access situation, if it find that all sub- storage space S lot has sub- mapping table, then
Sub- mapping table in sub- storage space S lot in access queue afterbody can be saved in flash memory NAND.
6. device according to claim 5, it is characterised in that be stored with the sub- storage space S lot's in the internal memory
Access queue；The internal memory communicates with flash memory NAND；Described device also includes：
Preserving module, if for that in the absence of the sub- storage space S lot identified for dummy status, will be according to the access queue
Sub- mapping table in the sub- storage space S lot of non-null states mark is preserved into flash memory NAND；
Second update module, for the status indicator of the sub- storage space S lot to be updated into dummy status mark.
7. device according to claim 6, it is characterised in that the preserving module includes：
Sub- storage space S lot acquisition submodules, for obtain in the access queue tail of the queue for non-null states mark
Sub- storage space S lot；
Sub- mapping table preserves submodule, for the sub- mapping table in the sub- storage space S lot to be preserved into flash memory NAND.
8. the device according to claim 5 or 6, it is characterised in that also include：
Access queue update module, for updating the sub- storage space S lot access queues.
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| TW201818248A (en) * | 2016-11-15 | 2018-05-16 | 慧榮科技股份有限公司 | Memory managing method for data storage device |
| CN107168888B (en) * | 2017-05-19 | 2020-06-02 | 惠州佰维存储科技有限公司 | Mapping table management method and system of Nand flash memory |
| CN109375877A (en) * | 2018-10-24 | 2019-02-22 | 江苏华存电子科技有限公司 | A kind of method of managing main frame end logical place correspondence mappings table in flash memory storage |
| TWI709854B (en) * | 2019-01-21 | 2020-11-11 | 慧榮科技股份有限公司 | Data storage device and method for accessing logical-to-physical mapping table |
| CN111666330B (en) * | 2019-03-06 | 2023-05-02 | 阿里巴巴集团控股有限公司 | Data reading and writing method and device |
| CN112882663B (en) * | 2021-03-25 | 2022-10-14 | 湖南国科微电子股份有限公司 | Random writing method, electronic equipment and storage medium |
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