CN104269395A - Low-dielectric constant dielectric etching and copper interconnection structure and integration method - Google Patents
Low-dielectric constant dielectric etching and copper interconnection structure and integration method Download PDFInfo
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- CN104269395A CN104269395A CN201410433978.7A CN201410433978A CN104269395A CN 104269395 A CN104269395 A CN 104269395A CN 201410433978 A CN201410433978 A CN 201410433978A CN 104269395 A CN104269395 A CN 104269395A
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- dielectric constant
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Abstract
The invention belongs to the technical field of semiconductor devices, and particularly relates to a low-dielectric constant dielectric etching and copper interconnection structure and an integration method. The copper interconnection structure comprises at least one metal wire and insulator supporting structures located below the metal wires. Porous low-dielectric constant media are arranged among the multiple metal wires, and the porous low-dielectric constant media are also arranged among the insulator supporting structures. The copper interconnection and air gaps are combined to lower capacitance, and copper wires are supported through the specific supporting structures so that the shape of the copper wires can be maintained after the media are removed. According to the low-dielectric constant dielectric etching and copper interconnection structure and the integration method, a full-air-gap structure can be achieved without causing short circuit or open circuit of the copper wires, the full-air-gap structure of longer wires can be achieved, and the RC delay is reduced.
Description
Technical field
The invention belongs to technical field of semiconductor device, be specifically related to use a kind of medium with low dielectric constant to etch and the structure of copper-connection and integrated approach.
Background technology
Along with the continuous progress of very lagre scale integrated circuit (VLSIC) technology, the characteristic size of semiconductor device constantly reduces, chip area continues to increase, people are faced with the problem how overcoming the RC (R refers to resistance, and C refers to electric capacity) brought due to the rapid growth of wire length and postpone significantly to increase.Impact particularly due to metal line line capacitance is day by day serious, causes device performance significantly to decline, has become the key restriction factors that semi-conductor industry further develops.In order to reduce the RC delay caused that interconnects, now have employed many kinds of measures.
Parasitic capacitance between interconnection and interconnection resistance cause the transmission delay of signal.Because copper has lower resistivity, superior electromigration resistance properties and high reliability, in order to reduce the interconnection resistance of metal, and then reducing total interconnect delay effect, now having studied and having changed into low-resistance copper-connection by the aluminium interconnection of routine.The electric capacity reduced between interconnection can reduce delay equally simultaneously, and parasitic capacitance C is proportional to the relative dielectric constant K that circuit layer completely cuts off medium, low k material (K<3) is therefore used to replace traditional SiO as the isolated medium of different circuit layer
2medium has become the needs of the development meeting high-speed chip.Relative dielectric constant due to air is 1, so air is ideal dielectric.Therefore, the porous low dielectric constant material between metal can reduce interconnect RC delay effectively.
Summary of the invention
The object of the present invention is to provide a kind of medium with low dielectric constant to etch and the structure of copper-connection and integrated approach, postpone large shortcoming to overcome RC, promote the performance of semiconductor chip, be conducive to the development of very lagre scale integrated circuit (VLSIC).
Medium with low dielectric constant etching and the structure of copper-connection that the present invention proposes, comprise at least one plain conductor, and be positioned at the dielectric support structure under described plain conductor; Further, between many strip metals wire, porous low-k dielectric is had; Also porous low-k dielectric is had between dielectric support structure.
In the present invention, described plain conductor is copper, or is the compound wire be made up of copper and diffusion impervious layer, or described plain conductor is tungsten, or is the compound wire be made up of tungsten and diffusion impervious layer.Described diffusion barrier material is titanium nitride (TiN), or tantalum (Ta), or tungsten nitride (WN).
In the present invention, described dielectric support structure, the column be made up of insulating material or list structure, dielectric support structure is positioned at by under the plain conductor that supports, to maintain the shape of described plain conductor.Described insulating material is silicon nitride (Si-
3n
4), silica or organic insulating material.
The invention allows for the integrated approach of a kind of medium with low dielectric constant etching and copper-connection, its concrete steps are:
A substrate is provided;
Form the ground floor film be made up of the first material successively over the substrate;
The mouth of perforate shape in ground floor film;
Deposit ground floor support insulator, and planarization;
Deposit second layer support insulator, and open second mouth;
Insulation film is formed again in second layer support insulator;
Form Damascus or the dual damascene figure of copper-connection;
Medium except support insulator will be removed;
Removing the space of the medium except support insulator, backfill porous low-k dielectric, namely forms porous low dielectric constant structure.Support insulator is positioned at by under the metal that supports, to maintain the shape of described metal.
The present invention adopts copper-connection to be combined with air gap to reduce electric capacity, and supports copper conductor by specific support structures, to maintain the shape of copper conductor after removing medium.The present invention can realize porous low-k dielectric interstitital texture and not make copper conductor short circuit or open circuit, and can realize the full gap structure compared with long lead, makes RC postpone to reduce.
Accompanying drawing explanation
Fig. 1-Fig. 6 is according to the process section of a kind of medium with low dielectric constant etching of the invention process with the integrated approach of copper-connection.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Please refer to Fig. 1, one is provided to be formed at substrate 201 wherein containing plain conductor 101 and diffusion impervious layer 102, substrate and wire are formed a layer insulating 202, then on insulating barrier 202, sequentially form film 203 and thin film 204, the material of plain conductor 101 is Cu, diffusion impervious layer 102 is such as TiN, and film 203 material is SiO
2, utilize photoetching technique and lithographic technique to form opening 301 and opening 302 in film 204 and film 203, carry out photoresistance afterwards and divest.
Deposit insulator 401 and 402 in opening 301 and opening 302, the material of this insulator can be Si-
3n
4.Etch Si afterwards
3n
4film, forms the structure shown in Fig. 2.
Please refer to Fig. 3, removed by film 204, then on film 203, form film 205, this film 205 material can be Si-
3n
4, again utilize photoetching technique and lithographic technique on film 205, form an opening 305, then carry out photoresistance and divest.
Please refer to Fig. 4, film 205 is sequentially formed thin film 206 and thin film 207, film 206 material is SiO
2, film 207 material is Si-
3n
4, then utilize photoetching technique and lithographic technique to form an opening 306 in film 207, film 206, film 205, film 203 and film 202, then carry out photoresistance and divest.
Please refer to Fig. 5, in opening 305, form one deck diffusion impervious layer 103, then utilize electroplating technology to be embedded in opening 305 by plain conductor 104, utilize chemical polishing technology by plain conductor 104 polishing, diffusion barrier material 103 is TiN, and the material of plain conductor 104 is Cu.
Please refer to Fig. 6, etch away film 207, film 206, part film 205 and film 203 successively, after above-mentioned film is removed, then backfill porous low-k dielectric, the space of backfill is porous low-k dielectric interstitital texture 210,211 and 212 of the present invention.
Enforcement of the present invention can realize the porous low-k dielectric interstitital texture not making copper conductor short circuit or open circuit, and, the porous low-k dielectric interstitital texture compared with long lead can be realized, make RC postpone to reduce.
Claims (5)
1. medium with low dielectric constant etching and a structure for copper-connection, is characterized in that, comprise at least one plain conductor, and be positioned at the dielectric support structure under described plain conductor; Further, between many strip metals wire, porous low-k dielectric is had; Also porous low-k dielectric is had between dielectric support structure.
2. the structure of medium with low dielectric constant etching according to claim 1 and copper-connection, it is characterized in that, described plain conductor is copper, or is the compound wire be made up of copper and diffusion impervious layer; Or described plain conductor is tungsten, or it is the compound wire be made up of tungsten and diffusion impervious layer.
3. the structure of medium with low dielectric constant etching according to claim 1 and copper-connection, it is characterized in that, described diffusion barrier material is titanium nitride, tantalum or tungsten nitride.
4. the structure of medium with low dielectric constant etching according to claim 1 and copper-connection, it is characterized in that, described dielectric support structure, the column be made up of insulating material or list structure, described insulating material is silicon nitride, silica or organic insulating material.
5. an integrated approach for medium with low dielectric constant etching as claimed in claim 1 and copper interconnection structure, it is characterized in that, concrete steps are:
A substrate is provided;
Form the ground floor film be made up of the first material successively over the substrate;
The mouth of perforate shape in ground floor film;
Deposit ground floor support insulator, and planarization;
Deposit second layer support insulator, and open second mouth;
Insulation film is formed again in second layer support insulator;
Form Damascus or the dual damascene figure of copper-connection;
Medium except support insulator will be removed;
Removing the dielectric space except support insulator, backfill porous low-k dielectric, namely forms porous low dielectric constant structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410433978.7A CN104269395A (en) | 2014-08-29 | 2014-08-29 | Low-dielectric constant dielectric etching and copper interconnection structure and integration method |
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| CN201410433978.7A CN104269395A (en) | 2014-08-29 | 2014-08-29 | Low-dielectric constant dielectric etching and copper interconnection structure and integration method |
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|---|---|
| CN104269395A true CN104269395A (en) | 2015-01-07 |
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| CN201410433978.7A Pending CN104269395A (en) | 2014-08-29 | 2014-08-29 | Low-dielectric constant dielectric etching and copper interconnection structure and integration method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110383472A (en) * | 2017-03-22 | 2019-10-25 | 香港科技大学 | IC structure and its manufacturing method with air gap and protective layer |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101673727A (en) * | 2009-09-24 | 2010-03-17 | 复旦大学 | Structure for interconnecting medium with low dielectric constant and copper and integration method |
-
2014
- 2014-08-29 CN CN201410433978.7A patent/CN104269395A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101673727A (en) * | 2009-09-24 | 2010-03-17 | 复旦大学 | Structure for interconnecting medium with low dielectric constant and copper and integration method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110383472A (en) * | 2017-03-22 | 2019-10-25 | 香港科技大学 | IC structure and its manufacturing method with air gap and protective layer |
| CN110383472B (en) * | 2017-03-22 | 2023-03-31 | 香港科技大学 | IC structure with air gap and protective layer and method of making the same |
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Application publication date: 20150107 |