CN104242906A - Uncooled infrared detector interface timing control circuit - Google Patents
Uncooled infrared detector interface timing control circuit Download PDFInfo
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- CN104242906A CN104242906A CN201410518093.7A CN201410518093A CN104242906A CN 104242906 A CN104242906 A CN 104242906A CN 201410518093 A CN201410518093 A CN 201410518093A CN 104242906 A CN104242906 A CN 104242906A
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- clock
- synchronizing signal
- counting
- frequency division
- infrared detector
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Abstract
The invention discloses an uncooled infrared detector interface timing control circuit which comprises a main clock, three counting modules and three frequency division modules. The counting modules are connected with the main clock and are respectively connected with the frequency division modules; the main clock generates stable main-clock frequency output; the counting modules are triggered by taking main-clock input as counts and perform synchronous counting; the frequency division modules perform frequency division on main-clock pulses and output timing signals. By the uncooled infrared detector interface timing control circuit, the main-clock frequency can be outputted by only one clock, and sequence of the three-way signals can be strictly controlled according to different drive timing signals of the three-way signals.
Description
Technical field
The present invention relates to a kind of non-refrigerated infrared detector interface sequence control circuit.
Background technology
Along with the development that electronic technology is maked rapid progress, DSP(digital signal processor), CPU(central processing unit), large scale integrated circuit etc. used widely in fields such as communications, automatically control, space flight and aviation, medical treatment, household electrical appliance.Along with the development of chip, electric power-feeding structure also presents diversified feature based on the consideration of the aspects such as reliability, stability, cost.
Infrared Detectors is the device infrared radiation signal of incidence being transformed into signal of telecommunication output.Infrared radiation is the electromagnetic wave of wavelength between visible ray and microwave, human eye discover less than.Discover the existence of this radiation and measure its power, it must be transformed into other physical quantitys that can discover and measure.In general, any effect caused by illuminated with infrared radiation object, as long as effect can be measured and enough sensitive, all can be used to the power of measuring infrared radiation.The mainly thermo-effect of infrared radiation that modern Infrared Detectors utilizes and photoelectric effect.The output of these effects is mostly electricity, or available suitable method is transformed into electricity.
The external signal of Infrared Detectors has frame synchronizing signal, line synchronizing signal and pixel synchronizing signal.All pulse signals all should produce under the control of same master clock.The core of sequential Interface design is exactly how correctly to produce above-mentioned three road clock signals.Namely, under a stable master clock frequency input, sequential how is obtained, Control timing sequence signal that logic all meets the demands.This three roads timing control signal frequency is different, and also there is strict sequencing relation between them.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of non-refrigerated infrared detector interface sequence control circuit is provided, this circuit can provide a kind of unique clock that adopts to export master clock frequency, difference according to three road signals produces driver' s timing signal, the strict sequencing controlling three road signals.
The object of the invention is to be achieved through the following technical solutions: non-refrigerated infrared detector interface sequence control circuit, the external signal of detector has frame synchronizing signal, line synchronizing signal and pixel synchronizing signal, all pulse signals all should produce under the control of same master clock, non-refrigerated infrared detector interface sequence circuit has been exactly the correct effect producing above-mentioned three road clock signals, it comprises master clock, three counting modules and three frequency division modules, multiple counting module is connected with master clock respectively, described counting module is connected with frequency division module respectively, it is that master clock frequency exports that described master clock produces stable, described counting module triggers using master clock input as counting, carries out synchronous counting, described frequency division module carries out frequency division to main clock pulse, and output timing signal.
Three described counters adopt the counter of different count range respectively.
Described interface sequence circuit produces frame synchronizing signal, line synchronizing signal and the pixel synchronizing signal that frequency is different, output is successively different.
The invention has the beneficial effects as follows: the invention provides a kind of non-refrigerated infrared detector interface sequence control circuit, this circuit can provide a kind of unique clock that adopts to export master clock frequency, difference according to three road signals produces driver' s timing signal, the strict sequencing controlling three road signals.
Accompanying drawing explanation
Fig. 1 is structured flowchart of the present invention.
Embodiment
Below in conjunction with accompanying drawing, technical scheme of the present invention is described in further detail, but protection scope of the present invention is not limited to the following stated.
As shown in Figure 1, non-refrigerated infrared detector interface sequence control circuit, the external signal of detector has frame synchronizing signal, line synchronizing signal and pixel synchronizing signal, all pulse signals all should produce under the control of same master clock, non-refrigerated infrared detector interface sequence circuit has been exactly the correct effect producing above-mentioned three road clock signals, it comprises master clock, three counting modules and three frequency division modules, multiple counting module is connected with master clock respectively, and described counting module is connected with frequency division module respectively; It is that master clock frequency exports that described master clock produces stable; Described counting module triggers using master clock input as counting, carries out synchronous counting; Described frequency division module carries out frequency division to main clock pulse, and output timing signal.
Three described counters adopt the counter of different count range respectively.
Described interface sequence circuit produces frame synchronizing signal, line synchronizing signal and the pixel synchronizing signal that frequency is different, output is successively different.
The present invention arranges frequency division module according to detector to the frequency of outside frame synchronizing signal, line synchronizing signal and pixel synchronizing signal and transmission timing demand in use and carries out frequency division, export the value of driver' s timing signal after frequency division, driver' s timing signal drives the generation of frame synchronizing signal, line synchronizing signal and pixel synchronizing signal.
Claims (3)
1. non-refrigerated infrared detector interface sequence control circuit, the external signal of detector has frame synchronizing signal, line synchronizing signal and pixel synchronizing signal, all pulse signals all should produce under the control of same master clock, non-refrigerated infrared detector interface sequence circuit has been exactly the correct effect producing above-mentioned three road clock signals, it is characterized in that: it comprises master clock, three counting modules and three frequency division modules, multiple counting module is connected with master clock respectively, and described counting module is connected with frequency division module respectively; Described master clock produces stable master clock frequency and exports; Described counting module triggers using master clock input as counting, carries out synchronous counting; Described frequency division module carries out frequency division to main clock pulse, and output timing signal.
2. non-refrigerated infrared detector interface sequence control circuit according to claim 1, is characterized in that: three described counters adopt the counter of different count range respectively.
3. non-refrigerated infrared detector interface sequence control circuit according to claim 1, is characterized in that: described interface sequence circuit produces frame synchronizing signal, line synchronizing signal and the pixel synchronizing signal that frequency is different, output is successively different.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410518093.7A CN104242906A (en) | 2014-09-30 | 2014-09-30 | Uncooled infrared detector interface timing control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410518093.7A CN104242906A (en) | 2014-09-30 | 2014-09-30 | Uncooled infrared detector interface timing control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104242906A true CN104242906A (en) | 2014-12-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410518093.7A Pending CN104242906A (en) | 2014-09-30 | 2014-09-30 | Uncooled infrared detector interface timing control circuit |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5122757A (en) * | 1988-09-22 | 1992-06-16 | U.S. Philips Corp. | Digital frequency generator |
| CN102866982A (en) * | 2012-09-14 | 2013-01-09 | 复旦大学 | Eight-bit complex instruction set central processor based on FPGA (Field Programmable Gata Array) |
| CN103780236A (en) * | 2014-02-12 | 2014-05-07 | 北京空间机电研究所 | CCD dynamic and high-precision sequence signal generation circuit based on FPGA |
| US20140167825A1 (en) * | 2012-12-13 | 2014-06-19 | Coherent Logix, Incorporated | Multi-frequency clock skew control for inter-chip communication in synchronous digital systems |
| CN204131495U (en) * | 2014-09-30 | 2015-01-28 | 成都市晶林科技有限公司 | Non-refrigerated infrared detector interface sequence control circuit |
-
2014
- 2014-09-30 CN CN201410518093.7A patent/CN104242906A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5122757A (en) * | 1988-09-22 | 1992-06-16 | U.S. Philips Corp. | Digital frequency generator |
| CN102866982A (en) * | 2012-09-14 | 2013-01-09 | 复旦大学 | Eight-bit complex instruction set central processor based on FPGA (Field Programmable Gata Array) |
| US20140167825A1 (en) * | 2012-12-13 | 2014-06-19 | Coherent Logix, Incorporated | Multi-frequency clock skew control for inter-chip communication in synchronous digital systems |
| CN103780236A (en) * | 2014-02-12 | 2014-05-07 | 北京空间机电研究所 | CCD dynamic and high-precision sequence signal generation circuit based on FPGA |
| CN204131495U (en) * | 2014-09-30 | 2015-01-28 | 成都市晶林科技有限公司 | Non-refrigerated infrared detector interface sequence control circuit |
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Application publication date: 20141224 |