CN104241456A - Metal substrate and LED chip connection method - Google Patents
Metal substrate and LED chip connection method Download PDFInfo
- Publication number
- CN104241456A CN104241456A CN201310241619.7A CN201310241619A CN104241456A CN 104241456 A CN104241456 A CN 104241456A CN 201310241619 A CN201310241619 A CN 201310241619A CN 104241456 A CN104241456 A CN 104241456A
- Authority
- CN
- China
- Prior art keywords
- metal substrate
- plating
- led chip
- bonding
- department
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 title claims abstract description 57
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 57
- 239000000758 substrate Substances 0.000 title claims abstract description 55
- 238000000034 method Methods 0.000 title claims abstract description 20
- 238000007747 plating Methods 0.000 claims abstract description 30
- 239000000853 adhesive Substances 0.000 claims abstract description 20
- 230000001070 adhesive effect Effects 0.000 claims abstract description 20
- 239000000463 material Substances 0.000 claims abstract description 11
- 238000004519 manufacturing process Methods 0.000 claims abstract description 9
- 239000011248 coating agent Substances 0.000 claims description 29
- 238000000576 coating method Methods 0.000 claims description 29
- 239000000956 alloy Substances 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 5
- 238000002844 melting Methods 0.000 claims description 5
- 230000008018 melting Effects 0.000 claims description 5
- 238000001816 cooling Methods 0.000 claims description 2
- 238000004544 sputter deposition Methods 0.000 abstract description 10
- 238000000407 epitaxy Methods 0.000 abstract 2
- 230000004927 fusion Effects 0.000 abstract 2
- 239000011162 core material Substances 0.000 abstract 1
- 230000005855 radiation Effects 0.000 abstract 1
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000002131 composite material Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 229910018104 Ni-P Inorganic materials 0.000 description 1
- 229910018536 Ni—P Inorganic materials 0.000 description 1
- 229910052774 Proactinium Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Physical Vapour Deposition (AREA)
Abstract
The invention provides a metal substrate and LED chip connection method. A proper metal substrate form can be provided for a plating department of an assembly manufacturer in a preceding procedure, and burden of the following assembly department can be reduced. The metal substrate and LED chip connection method is characterized in that adjustment plating with high brightness, high radiation performance and equal hardness is applied to the upper face and the lower face of a core material, and the metal substrate is used for LEDs; in terms of the relationship of the plating department responsible for manufacturing the metal substrate used for the LEDs and the assembly department responsible for arranging the LEDs of an LED chip on the metal substrate, metal plating which becomes adhesive materials after fusion is applied to the adjustment plating of the metal substrate in the plating department, the metal substrate with the adhesive plating is sent to the assembly department, an adhesive sputtering film is applied to an epitaxy layer of the LED chip by means of a sputtering device in the assembly department, then the adhesive plating and the adhesive sputtering film are fused, and an adhesive material layer making use of fusion is formed between the adjustment plating and the epitaxy layer.
Description
Technical field
The present invention relates to and to cut out by the LED chip carried in the same manner as Silicon Wafer etc. and use thus be also referred to as the metal substrate of the LED of metal wafer, and relate to the metal substrate of this LED and the joint method of LED chip.
Background technology
In the past, the applicant of the application waits thing for the purpose of the substrate being characterized as high brightness, the high LED dispelled the heat, carry out the research of method for plating, exploitation, and manufactured and provide the metal substrate (patent documentation 1) of the adjustment coating being applied with its height etc. on the two sides of the core of the mode clipping Mo with Cu, Cu.In this specification this core is called " DMD ".
Be that the metal substrate of core is provided to manufacturer more and uses with DMD, at place of follow-up manufacturer through by bonding come the meticulous operation of assembled LED chip, and be finally assembled into LED chip.
Fig. 2 represents the existing joint method using AuSn as adhesives.It is described successively.
Stage (1)
The plating enterprises such as the applicant of the application (plating department) manufacture the metal substrate Pa of LED, and send it to the assembling manufacturer (assembly department) of LED.The metal substrate Pa of LED in the illustrated case, on the two sides of core 31 across the substrate coating 32,32 of Ni or Ni-P alloy, and is formed with the adjustment coating 33,33 of Au thereon.That is, not additional adhesive material and it can be used as product to assembling manufacturer shipment.
Assembling manufacturer prepares the LED chip Qa on composition surface with epitaxial loayer 35.But, although this manufacturer is the general enterprise not having plating apparatus or have this lack of skill of plating apparatus.In addition, standing have sputter equipment and can skillfully use.In addition, plating cannot be implemented to LED chip.
Stage (2)
Therefore, when being transported metal substrate Pa, at place of assembling manufacturer, select AuSn as adhesives, sputter equipment is used to it and on the adjustment coating 33 of the upper surface of metal substrate Pa and the epitaxial loayer 35 of LED chip Qa is formed the bonding sputtered film 37,38 of AuSn.Both add up and take time very much.
Stage (3)
At place of assembling manufacturer, after sputtering forms bonding sputtered film 37,38 like this, both bonding sputtered film are engaged and one melting.Thus, formed the layer of adhesive material 39 of the AuSn of both bonding sputtered film integrations between.
Patent documentation 1:JP JP 2012-109288 publication
Sputtering is the method to material membrane, different from plating etc., does not use chemicals but utilizes the operation of the sputtering phenomenon in vacuum, because of but the film build method of the volume production that expends time in, is unsuitable for, but have to use the method to be truth at epitaxial loayer.
In the past, the bonding assembling manufacturer that all transfers to of LED chip carries out by plating manufacturer, thus at place of assembling manufacturer, form bonding sputtered film by time-consuming sputtering process at metal substrate P and LED chip both sides, therefore this brings excessive burden to assembling manufacturer.
Summary of the invention
The present invention is in view of above situation, and its problem is, as the plating department of assembling manufacturer formerly etc., for the purpose of the burden alleviating the assembly department of follow-up manufacturer, by providing applicable metal substrate form, and alleviates the burden of follow-up assembly department.
In order to solve above-mentioned problem, the invention provides the joint method of a kind of metal substrate and LED chip, it is characterized in that, described metal substrate is be applied with high brightness at the upper and lower surface of core, the metal substrate of the LED of the adjustment coating of the hardness of high-cooling property etc., manufacture this LED metal substrate plating department and carry on metallic substrates LED chip LED assembly department between relation in, in plating department, the adjustment coating of metal substrate is applied through melting and becomes the metal-plated of adhesives, be sent out the assembly department with the metal substrate of this bonding coating, bonding sputtered film is applied by the epitaxial loayer of sputter equipment to LED chip, bonding coating and bonding sputtered film is made to merge afterwards, the layer of adhesive material utilizing melting is formed between above-mentioned adjustment coating and epitaxial loayer.
As above the joint method of metal substrate and LED chip is formed, therefore bonding coating can be applied simply by the plating operation of the manufacture of subsidiary metal substrate in plating department, this external assembly department (such as assembling manufacturer) is without the need to forming the bonding sputtered film as adhesives at metal substrate by sputtering method, form bonding sputtered film by means of only the epitaxial loayer at LED chip, the activity duration can be made to reduce by half in order to assembling.
As mentioned above, according to the present invention, in the manufacturing sector of metal substrate, in its a series of plating process, as long as add the bonding coating of plating, this does not substantially bear on equipment, in operation, in ability, but for assembly department, the burden sputtering operation is reduced by half, the metal substrate of prefitable commodity can be provided as, if especially assembly department is client, then achieve operation to shorten and cost reduction, the circulation of final LED can be promoted.
Accompanying drawing explanation
Fig. 1 is for illustration of key diagram of the present invention, is the flow chart of the joint method for illustration of the metal substrate represented with layer cross section and LED chip.In addition, be the sectional view that citing describes metal species in layer cross section.
Fig. 2 is the cross section key diagram representing the flow chart of the method in the past by same main points.
Embodiment
In the present invention, in the manufacturing sector of metal substrate, form bonding coating by plating apparatus, form bonding sputtered film in assembly department by sputter equipment, but existence is merged by both sides and produces the situation of the layer of adhesive material 19 of same metal and the situation of different alloys adhesives 19.Specifically, be combined as same metal when AuSn and AuSn, Au and AuSn etc., combining metal when AuSn and In, Au and In etc. is dissimilar metal.
The core 1 of metal substrate P is such as DMD or CuW, is following any one.
The two sides of the core of DMD:Mo is the composite material of Cu, Cu coating or thin plate.
The two sides of the core of CuW:W is the composite material of Cu, Cu coating or thin plate or the alloy of CuW.
Embodiment 1
Fig. 1 is corresponding with Fig. 2 of the explanation of above-mentioned past case, is divided into stage (a) and (b), (c) illustrates.
Stage (a)
Plating enterprise as production division produces metal substrate P by plating apparatus.Metal substrate P is adjustment coating 3,3 by defining hardness etc. across substrate coating 2,2 on the two sides of above-mentioned core 1.The bonding coating 12 of AuSn is formed at the upper surface of this core 1.Follow-up manufacturer is sent under the state with this bonding coating 12.
And be sent out the follow-up manufacturer as assembly department of metal substrate P, prepare the LED chip Q being formed with epitaxial loayer 13.
Stage (b)
AuSn, according to the information of content having known metal substrate P in advance from plating manufacturer, selects relative to AuSn in assembling manufacturer, only implements sputtering to LED chip Q, forms bonding sputtered film 17 thus.
Stage (c)
In the joint (bonding) at place of assembling manufacturer, in order to LED chip Q is installed to metal substrate P, and the bonding coating 12 of metal substrate P and the bonding sputtered film 17 of LED chip Q are merged, form the layer of adhesive material 19 of the AuSn identical with both thus.
Embodiment 2
In metal substrate P, form In as bonding coating 12, in LED chip Q, form Au as bonding sputtered film 17.Thus, the alloy as AuIn forms layer of adhesive material 19.
Symbol description
P metal substrate
Q LED chip
1 core
3 adjustment coating
12 bonding coating
13 epitaxial loayers
17 bonding sputtered film
19 layer of adhesive material
Claims (3)
1. a joint method for metal substrate and LED chip, is characterized in that,
Described metal substrate is be applied with high brightness at the upper and lower surface of core, the metal substrate of the LED of the adjustment coating of the hardness of high-cooling property etc., manufacture this LED metal substrate plating department and carry on metallic substrates LED chip LED assembly department between relation in, in plating department, the adjustment coating of metal substrate is applied through melting and becomes the metal-plated of adhesives, be sent out the assembly department with the metal substrate of this bonding coating, bonding sputtered film is applied by the epitaxial loayer of sputter equipment to LED chip, bonding coating and bonding sputtered film is made to merge afterwards, the layer of adhesive material utilizing melting is formed between above-mentioned adjustment coating and epitaxial loayer.
2. the joint method of metal substrate according to claim 1 and LED chip, is characterized in that, above-mentioned bonding coating and bonding sputtered film are respectively Au or AuSn.
3. the joint method of metal substrate according to claim 1 and LED chip, is characterized in that, one in above-mentioned bonding coating and bonding sputtered film is the alloy of Au or AuSn, and another is In.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310241619.7A CN104241456A (en) | 2013-06-18 | 2013-06-18 | Metal substrate and LED chip connection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310241619.7A CN104241456A (en) | 2013-06-18 | 2013-06-18 | Metal substrate and LED chip connection method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104241456A true CN104241456A (en) | 2014-12-24 |
Family
ID=52229193
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310241619.7A Pending CN104241456A (en) | 2013-06-18 | 2013-06-18 | Metal substrate and LED chip connection method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104241456A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101390224A (en) * | 2006-02-09 | 2009-03-18 | 罗姆股份有限公司 | Nitride semiconductor element |
-
2013
- 2013-06-18 CN CN201310241619.7A patent/CN104241456A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101390224A (en) * | 2006-02-09 | 2009-03-18 | 罗姆股份有限公司 | Nitride semiconductor element |
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| PB01 | Publication | ||
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| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20141224 |
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| WD01 | Invention patent application deemed withdrawn after publication |