CN104238420A - Servosystem high-speed data interactive communication unit based on USB - Google Patents
Servosystem high-speed data interactive communication unit based on USB Download PDFInfo
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Abstract
The invention relates to a servosystem high-speed data interactive communication unit based on a USB. According to the technical scheme, the COM end of an upper computer (1) is connected with the input and output end 2a of a USB interface module (2); the data end and the control end 2b of the USB interface module (2) are connected with the data end and the control end 11b of an FPGA (11) respectively; a data bus and an address bus of the FPGA (11) are correspondingly connected with a data bus and an address bus of a DSP controller (8); the PWM output end of the DSP controller (8) is connected with the PWM input end of a power drive module (10); two current feedback ends of a permanent magnet synchronous motor (9) are correspondingly connected with the input end 8c and the input end 8d of the DSP controller (8); the position feedback end of the permanent magnet synchronous motor (9) is connected with the input end 8b of the DSP controller (8); the output end of the power drive module (10) is connected with the input ends of the permanent magnet synchronous motor (9). The servosystem high-speed data interactive communication unit based on the USB has the advantages of being simple in structure, high in transmission rate, stable in transmission and convenient to use.
Description
Technical field
The invention belongs to the communication unit technology field that servo-drive system high-speed data is mutual.Particularly relate to a kind of communication unit mutual based on the servo-drive system high-speed data of USB.
Background technology
With high speed, the high-precision servo-drive system for target, be widely used in the high-tech areas such as Laser Processing, robot, high precision machine tool.Along with the control algolithm of servo-drive system becomes increasingly complex, servocontrol effect is determined by some correlation parameters of algorithm to a great extent, each state parameter in servo-drive system operational process, if position, speed, error etc. are all the basic foundations obtaining amendment algorithm parameter.In R&D process, in order to have the running status of servo-drive system more deep, be familiar with more easily, need adopt host computer Real-Time Monitoring and show the running status of servo-drive system.The motion state parameter of servo-drive system is complicated and volume of transmitted data is large, higher to the transmission rate request of data when therefore servo-drive system and host computer carry out data interaction.
At present, the major way that the servo-drive system of domestic use communicates with host computer has following several: serial communication mode, and which structure is simple, but the low and poor stability of message transmission rate, transmission data are unreliable; Optical fiber communication, which transfer rate is high and transmission stability better, but cost is higher, complex structure, and is not easy to carry out data communication with conventional PC computer.
Summary of the invention
The present invention is intended to overcome the defect that prior art exists, and object is to provide a kind of easy to use, transmission is stable and transfer rate is high communication unit mutual based on the servo-drive system high-speed data of USB.
For achieving the above object, the technical solution used in the present invention is: described communication unit comprises: host computer, usb interface module, keyboard and display, I/O interface, field-bus interface, Puled input interface, analog quantity interface, dsp controller, FPGA, fault detection module, power driver module and permagnetic synchronous motor.
The COM end of described host computer is connected with the input/output terminal 2a of usb interface module.The data terminal of usb interface module is connected with control end 11b with the data terminal of control end 2b and FPGA, the control end 11c of input/output terminal 3a and the FPGA of keyboard and display connects, the control end 11d of input/output terminal 4a and the FPGA of I/O interface connects, the control end 11e of input/output terminal 5a and the FPGA of field-bus interface connects, the control end 11f of input/output terminal 6a and the FPGA of Puled input interface connects, the input end 11a of output terminal 12a and the FPGA of fault detection module connects, the data bus of the data bus of FPGA and address bus and dsp controller and address bus is corresponding is connected.The input/output terminal 7a of analog quantity interface is connected with the input/output port 8a of dsp controller, the PWM output terminal of dsp controller is connected with the PWM input end of power driver module, the two-way current feedback terminal of permagnetic synchronous motor is corresponding with input end 8c, 8d of dsp controller to be connected, and the position feedback end of permagnetic synchronous motor is connected with the input end 8b of dsp controller; The output terminal of power driver module is connected with the input end of permagnetic synchronous motor.
Host computer is equipped with read-write USB interface software, and FPGA is with the read-write logical-sequential control software of USB interface, and FPGA is with to image data framing function software.
Described usb interface module is made up of USB interface and USB control chip FT245RL, pin USBDM, the pin USBDP of USB control chip FT245RL and the pin UD-of USB interface and pin UD+ is corresponding connects.
The COM end of host computer is connected with the input/output terminal 2a of USB interface, data signal pin D0-D7, the write control signal input pin WR of USB control chip FT245RL, read control signal input pin RD, expire signal pins TXE and spacing wave pin RXF successively with the data input output ports D0-D7 of FPGA, write and control pin WR, read to control pin RD, expire signal input pin TXE and spacing wave input pin RXF is corresponding is connected.
The main flow of described read-write USB interface software is:
The port numbers of S-1, acquisition USB interface;
S-2, USB interface are enable;
S-3, judge read data or write data, if read data, entering S-4, otherwise, enter S-7;
S-4, host computer read the data of USB interface, judge whether frame data have read, if frame data have read, enter S-5, otherwise, re-execute S-4;
After S-5, host computer receive frame data, the data received are resolved and buffer memory;
S-6, host computer judge whether the data of USB interface have all read, if data have all read, enter S-8, otherwise have returned S-4;
S-7, host computer write data to USB interface, judge whether data writing operation completes, complete, enter S-8 if write data, otherwise, re-execute S-7;
S-8, read data complete or write data and complete; EOP (end of program).
The main flow of the read-write logical-sequential control software of described USB interface is:
S-1, FPGA judge read data or write data, if read data, enter S-2, otherwise, enter S-5;
S-2, FPGA judge whether RXF is low level, if low level, enters S-3, otherwise, enter S-8;
S-3, RD set low level, and perform read data operation, RD sets high level;
S-4, FPGA judge whether data field reads sky, if data field reads sky, RXF sets high level, enters S-8, otherwise, return and perform S-3;
S-5, FPGA judge whether TXE is low level, if low level, enters S-6, otherwise, enter S-8;
S-6, WR set high level, and perform data writing operation, WR sets high level;
S-7, FPGA judge whether data field is write full, if data field is write full, TXE sets high level, enters S-8, otherwise, return S-6;
S-8, EOP (end of program).
Described to the main flow of image data framing function software is:
The current data that S-1, FPGA gather dsp controller and position data are integrated and framing;
S-2, FPGA add frame head to the data integrated.
Owing to adopting technique scheme, the present invention compared with prior art has following good effect:
The present invention utilizes the read-write logical sequence of FPGA control USB control chip FT245RL, ensure that USB interface have transfer rate high, transmit stable feature.USB control chip FT245RL has the function that eight bit parallel data and serial data are changed mutually, ensures the accuracy of host computer and servo-drive system data interaction; FT245RL is easy to use for USB control chip, makes this communication unit structure simple, shortens the construction cycle.Host computer of the present invention carries out high-speed data alternately by this usb interface module and servo-drive system, reads each state parameter of servo-drive system in real time, and analysis result is presented at the control inerface of host computer.
Therefore, the present invention has the advantages that structure is simple, easy to use, transmission is stable and transfer rate is high.
Accompanying drawing explanation
Fig. 1 is a kind of structural representation of the present invention;
Fig. 2 is the structural representation of the usb interface module 2 in Fig. 1;
Fig. 3 is the main flow chart of the read-write USB interface software of host computer 1 in Fig. 1;
Fig. 4 is the main flow chart of the read-write logical-sequential control software of the USB interface of FPGA11 in Fig. 1;
Fig. 5 is the main flow chart to image data framing function software of the FPGA11 in Fig. 1.
Embodiment
Below in conjunction with the drawings and specific embodiments, the invention will be further described, the restriction not to protection domain:
A kind of communication unit mutual based on the servo-drive system high-speed data of USB.As shown in Figure 1, described communication unit comprises: host computer 1, usb interface module 2, keyboard and display 3, I/O interface 4, field-bus interface 5, Puled input interface 6, analog quantity interface 7, dsp controller 8, FPGA11, fault detection module 12, power driver module 10 and permagnetic synchronous motor 9.
The COM end of described host computer 1 is connected with the input/output terminal 2a of usb interface module 2.The data terminal of usb interface module 2 is connected with control end 11b with the data terminal of control end 2b and FPGA11, the control end 11c of input/output terminal 3a and the FPGA11 of keyboard and display 3 connects, the control end 11d of input/output terminal 4a and the FPGA11 of I/O interface 4 connects, the control end 11e of input/output terminal 5a and the FPGA11 of field-bus interface 5 connects, the control end 11f of input/output terminal 6a and the FPGA11 of Puled input interface 6 connects, the input end 11a of output terminal 12a and the FPGA11 of fault detection module 12 connects, the data bus of the data bus of FPGA11 and address bus and dsp controller 8 and address bus is corresponding is connected.The input/output terminal 7a of analog quantity interface 7 is connected with the input/output port 8a of dsp controller 8, the PWM output terminal of dsp controller 8 is connected with the PWM input end of power driver module 10, the two-way current feedback terminal of permagnetic synchronous motor 9 is corresponding with input end 8c, 8d of dsp controller 8 to be connected, and the position feedback end of permagnetic synchronous motor 9 is connected with the input end 8b of dsp controller 8; The output terminal of power driver module 10 is connected with the input end of permagnetic synchronous motor 9.
Host computer 1 is equipped with read-write USB interface software, and FPGA11 is with the read-write logical-sequential control software of USB interface, and FPGA11 is with to image data framing function software.
As shown in Figure 2, described usb interface module 2 is made up of USB interface 2.1 and USB control chip FT245RL2.2, pin USBDM, the pin USBDP of USB control chip FT245RL2.2 and the pin UD-of USB interface 2.1 and pin UD+ is corresponding connects.
The COM end of host computer 1 is connected with the input/output terminal 2a of USB interface 2.1, data signal pin D0-D7, the write control signal input pin WR of USB control chip FT245RL2.2, read control signal input pin RD, expire signal pins TXE and spacing wave pin RXF successively with the data input output ports D0-D7 of FPGA11, write and control pin WR, read to control pin RD, expire signal input pin TXE and spacing wave input pin RXF is corresponding is connected.
As shown in Figure 3, the main flow of described read-write USB interface software is:
The port numbers of S-1, acquisition USB interface 2.1;
S-2, USB interface 2.1 are enable;
S-3, judge read data or write data, if read data, entering S-4, otherwise, enter S-7;
S-4, host computer 1 read the data of USB interface 2.1, judge whether frame data have read, if frame data have read, enter S-5, otherwise, re-execute S-4;
After S-5, host computer 1 receive frame data, the data received are resolved and buffer memory;
S-6, host computer 1 judge whether the data of USB interface 2.1 have all read, if data have all read, enter S-8, otherwise have returned S-4;
S-7, host computer 1 write data to USB interface 2.1, judge whether data writing operation completes, complete, enter S-8 if write data, otherwise, re-execute S-7;
S-8, read data complete or write data and complete; EOP (end of program).
As shown in Figure 4, the main flow of the read-write logical-sequential control software of described USB interface is:
S-1, FPGA11 judge read data or write data, if read data, enter S-2, otherwise, enter S-5;
S-2, FPGA11 judge whether RXF is low level, if low level, enters S-3, otherwise, enter S-8;
S-3, RD set low level, and perform read data operation, RD sets high level;
S-4, FPGA11 judge whether data field reads sky, if data field reads sky, RXF sets high level, enters S-8, otherwise, return and perform S-3;
S-5, FPGA11 judge whether TXE is low level, if low level, enters S-6, otherwise, enter S-8;
S-6, WR set high level, and perform data writing operation, WR sets high level;
S-7, FPGA11 judge whether data field is write full, if data field is write full, TXE sets high level, enters S-8, otherwise, return S-6;
S-8, EOP (end of program).
As shown in Figure 5, describedly to the main flow of image data framing function software be:
The current data that S-1, FPGA11 gather dsp controller 8 and position data are integrated and framing;
S-2, FPGA11 add frame head to the data integrated.
This embodiment compared with prior art has following good effect:
This embodiment utilizes the read-write logical sequence of FPGA11 control USB control chip FT245RL2.2, ensure that USB interface have transfer rate high, transmit stable feature.USB control chip FT245RL2.2 has the function that eight bit parallel data and serial data are changed mutually, ensures the accuracy of host computer 1 and servo-drive system data interaction; FT245RL2.2 is easy to use for USB control chip, makes this communication unit structure simple, shortens the construction cycle.The host computer 1 of this embodiment carries out high-speed data alternately by this usb interface module 2 and servo-drive system, reads each state parameter of servo-drive system in real time, and analysis result is presented at the control inerface of host computer 1.
Therefore, this embodiment has the advantages that structure is simple, easy to use, transmission is stable and transfer rate is high.
Claims (5)
1. based on the communication unit that the servo-drive system high-speed data of USB is mutual, it is characterized in that described communication unit comprises: host computer (1), usb interface module (2), keyboard and display (3), I/O interface (4), field-bus interface (5), Puled input interface (6), analog quantity interface (7), dsp controller (8), FPGA (11), fault detection module (12), power driver module (10) and permagnetic synchronous motor (9);
The COM end of described host computer (1) is connected with the input/output terminal 2a of usb interface module (2), the data terminal of usb interface module (2) is connected with control end 11b with the data terminal of control end 2b and FPGA (11), the control end 11c of input/output terminal 3a and the FPGA (11) of keyboard and display (3) connects, the control end 11d of input/output terminal 4a and the FPGA (11) of I/O interface (4) connects, the control end 11e of input/output terminal 5a and the FPGA (11) of field-bus interface (5) connects, the control end 11f of input/output terminal 6a and the FPGA (11) of Puled input interface (6) connects, the input end 11a of output terminal 12a and the FPGA (11) of fault detection module (12) connects, the data bus of the data bus of FPGA (11) and address bus and dsp controller (8) and address bus is corresponding is connected, the input/output terminal 7a of analog quantity interface (7) is connected with the input/output port 8a of dsp controller (8), the PWM output terminal of dsp controller (8) is connected with the PWM input end of power driver module (10), the two-way current feedback terminal of permagnetic synchronous motor (9) is corresponding with input end 8c, 8d of dsp controller (8) to be connected, and the position feedback end of permagnetic synchronous motor (9) is connected with the input end 8b of dsp controller (8), the output terminal of power driver module (10) is connected with the input end of permagnetic synchronous motor (9),
Host computer (1) is equipped with read-write USB interface software, and FPGA (11) is with the read-write logical-sequential control software of USB interface, and FPGA (11) is with to image data framing function software.
2. the communication unit mutual based on the servo-drive system high-speed data of USB according to claim 1, it is characterized in that described usb interface module (2) is made up of USB interface (2.1) and USB control chip FT245RL (2.2), pin USBDM, the pin USBDP of USB control chip FT245RL (2.2) and the pin UD-of USB interface (2.1) and pin UD+ is corresponding connects;
The COM end of host computer (1) is connected with the input/output terminal 2a of USB interface (2.1), data signal pin D0-D7, the write control signal input pin WR of USB control chip FT245RL (2.2), read control signal input pin RD, expire signal pins TXE and spacing wave pin RXF successively with the data input output ports D0-D7 of FPGA (11), write and control pin WR, read to control pin RD, expire signal input pin TXE and spacing wave input pin RXF is corresponding is connected.
3. the communication unit mutual based on the servo-drive system high-speed data of USB according to claim 1, is characterized in that the main flow of described read-write USB interface software is:
The port numbers of S-1, acquisition USB interface (2.1);
S-2, USB interface (2.1) are enable;
S-3, judge read data or write data, if read data, entering S-4, otherwise, enter S-7;
S-4, host computer (1) read the data of USB interface (2.1), judge whether frame data have read, if frame data have read, enter S-5, otherwise, re-execute S-4;
After S-5, host computer (1) receive frame data, the data received are resolved and buffer memory;
S-6, host computer (1) judge whether the data of USB interface (2.1) have all read, if data have all read, enter S-8, otherwise have returned S-4;
S-7, host computer (1) write data to USB interface (2.1), judge whether data writing operation completes, complete, enter S-8 if write data, otherwise, re-execute S-7;
S-8, read data complete or write data and complete; EOP (end of program).
4. the communication unit mutual based on the servo-drive system high-speed data of USB according to claim 1, is characterized in that the main flow of the read-write logical-sequential control software of described USB interface is:
S-1, FPGA (11) judge read data or write data, if read data, enter S-2, otherwise, enter S-5;
S-2, FPGA (11) judge whether RXF is low level, if low level, enters S-3, otherwise, enter S-8;
S-3, RD set low level, and perform read data operation, RD sets high level;
S-4, FPGA (11) judge whether data field reads sky, if data field reads sky, RXF sets high level, enters S-8, otherwise, return and perform S-3;
S-5, FPGA (11) judge whether TXE is low level, if low level, enters S-6, otherwise, enter S-8;
S-6, WR set high level, and perform data writing operation, WR sets high level;
S-7, FPGA (11) judge whether data field is write full, if data field is write full, TXE sets high level, enters S-8, otherwise, return S-6;
S-8, EOP (end of program).
5. the communication unit mutual based on the servo-drive system high-speed data of USB according to claim 1, it is characterized in that described to the main flow of image data framing function software be:
The current data that S-1, FPGA (11) gather dsp controller (8) and position data are integrated and framing;
S-2, FPGA (11) add frame head to the data integrated.
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Application publication date: 20141224 |