CN104238402A - USB line concentration module for cloud terminal - Google Patents

USB line concentration module for cloud terminal Download PDF

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Publication number
CN104238402A
CN104238402A CN201410356427.5A CN201410356427A CN104238402A CN 104238402 A CN104238402 A CN 104238402A CN 201410356427 A CN201410356427 A CN 201410356427A CN 104238402 A CN104238402 A CN 104238402A
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China
Prior art keywords
integrated circuit
ground connection
electric capacity
termination
holds
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CN201410356427.5A
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Chinese (zh)
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CN104238402B (en
Inventor
马曰武
范蔚
于勇
张迎春
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SHANDONG ZHONGHONG CLOUD COMPUTING TECHNOLOGY Co Ltd
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SHANDONG ZHONGHONG CLOUD COMPUTING TECHNOLOGY Co Ltd
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Priority to CN201410356427.5A priority Critical patent/CN104238402B/en
Priority to CN201610467059.0A priority patent/CN105929755B/en
Priority to CN201610466798.8A priority patent/CN106094623B/en
Priority to CN201610466717.4A priority patent/CN105955142B/en
Publication of CN104238402A publication Critical patent/CN104238402A/en
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/25Pc structure of the system
    • G05B2219/25034Connect module to data, monitor, control lines, extra I-O and power to connector

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Information Transfer Systems (AREA)
  • Telephone Function (AREA)

Abstract

The invention relates to a USB line concentration module for a cloud terminal. The USB line concentration module comprises an integrated circuit U11, and the model number of the integrated circuit U11 is USB2514B. The version 2.0 of the USB line concentration module is adopted for the cloud terminal, the speed is high, centralized management can be carried out, intelligent control can be achieved, and the normal operation of the cloud terminal is guaranteed.

Description

A kind of cloud terminal USB line concentration module
Technical field
The present invention relates to a kind of cloud terminal USB line concentration module, belong to electronic technology field.
Background technology
Cloud terminal, it is collection cloud computing technology, desktop virtual technology, computation migration with share concept in one intelligent terminal, a kind ofly possessed the linux operating system of increasing income, can accessing Internet, can by the intelligent terminal of installation and operation application program, it has the huge advantage in price compared with the network computer (NC) of traditional sense, there is the advantage of saving expensive software license compared with so-called thin client, cloud terminal both can as mini PC isolated operation, carry out audio frequency, the acquisition process of video and data, again can by wired and wireless mode framework network, play the data brought of Network integration and Information Superiority to greatest extent, cloud terminal develops to intelligent direction, to commence business Operation Network with the cost advantage of innovation.
USB framework in cloud terminal, has also possessed USB main controller function.General hardware unit expands in the mode of USB HUB.But expand in the mode of HUB, be adopt serial singular association port share mode, therefore not only frequency range can be shared, speed is low, and the power supply on USB Port also can face same situation, therefore USB HUB designs independently power supply mode mostly, supplies the periphery compared with large power supply demand, can not manage concentratedly, cannot intelligentized control method be carried out.
Summary of the invention
The technical problem to be solved in the present invention is for above deficiency, provides a kind of cloud terminal USB line concentration module, can manage concentratedly, realize intelligentized control method.
In order to solve above technical matters, the technical solution used in the present invention is as follows: a kind of cloud terminal USB line concentration module, described USB line concentration module comprises integrated circuit U11, the USBUP_DP end of integrated circuit U11, USBUP_DM termination mainboard U1, the VBUS_DET end of integrated circuit U11 meets 3.3V through resistance R50, integrated circuit U11 VBUS_DET end through series connection resistance R50 and electric capacity C89 ground connection, the OCS1 end of integrated circuit U11 meets 3.3V through resistance R52, the OCS2 end of integrated circuit U11 meets 3.3V through resistance R53, the OCS3 end of integrated circuit U11 meets 3.3V through resistance R54, the OCS4 end of integrated circuit U11 meets 3.3V through resistance R55, the SUSP_IND/LOCAL_PWR/NON_REM0 end of integrated circuit U11 is through resistance R57 ground connection, the RESET end of integrated circuit U11 meets 3.3V through resistance R56, the RESET end of integrated circuit U11 is through electric capacity C90 ground connection, the XnRSTOUT end of the RESET termination mainboard U1 of integrated circuit U11, the XTAL1/CLKIN end of integrated circuit U11 connects the XTAL2/CLKIN_EN end of integrated circuit U11 through the resistance R62 of parallel connection and crystal oscillator X7, one end of the XTAL1/CLKIN termination capacitor C91 of integrated circuit U11, another termination crystal oscillator X2 of electric capacity C91, the other end ground connection of electric capacity C91, the other end of electric capacity C91 connects the XTAL2/CLKIN_EN end of integrated circuit U11 through electric capacity C92, the TEST of integrated circuit U11 holds ground connection, the PLLFILT end of integrated circuit U11 is through electric capacity C96 ground connection, the CRFILT end of integrated circuit U11 is through electric capacity C101 ground connection, the CRFILT end of integrated circuit U11 connects the VSS end of integrated circuit U11 through electric capacity C101, the SDA/SMBDATA/NON_REM1 end of integrated circuit U11 is through resistance R60 ground connection, the SCL/SMBCLK/CFG_SEL0 end of integrated circuit U11 is through resistance R59 ground connection, the HS_IND/CFG_SEL1 end of integrated circuit U11 is through resistance R58 ground connection, the RBIAS end of integrated circuit U11 is through resistance R61 ground connection, VDD33 (IO) the termination 3.3V of integrated circuit U11, VDD33 (REG) the termination 3.3V of integrated circuit U11, VDD33 (IO) end of integrated circuit U11 is through electric capacity C94 ground connection, the VDDPLLREF/VDDA33 end of VDD33 (IO) the termination integrated circuit U11 of integrated circuit U11, VDD33 (REG) end of integrated circuit U11 is through electric capacity C93 ground connection, VDD33 (REG) end of integrated circuit U11 is through electric capacity C95 ground connection, the VDDPLLREF/VDDA33 end of integrated circuit U11 is held with VDDA33_1, VDDA33_2 holds, VDDA33_3 holds connection, the VDDPLLREF/VDDA33 of integrated circuit U11 holds the electric capacity C97 through parallel connection, electric capacity C98, electric capacity C99 and electric capacity C100 ground connection, the USBDN2_DP end of integrated circuit U11 and USBDN2_DM termination HOST style interface generic USB socket.
Further improvement as technique scheme:
The model of described integrated circuit U11 is USB2514B.
The present invention takes above technical scheme, has the following advantages: cloud terminal USB line concentration module of the present invention adopts 2.0 versions, and speed is high, can manage concentratedly, realize intelligentized control method, ensure that normally carrying out of cloud terminal.
Below in conjunction with drawings and Examples, the invention will be further described.
Accompanying drawing explanation
Accompanying drawing 1 is the structured flowchart of embodiment of the present invention medium cloud terminal;
Accompanying drawing 2 is the circuit diagrams of motherboard circuit Part I U1A in the embodiment of the present invention;
Accompanying drawing 3 is circuit enlarged drawings of 11 parts in accompanying drawing 2;
Accompanying drawing 4 is circuit enlarged drawings of 12 parts in accompanying drawing 2;
Accompanying drawing 5 is circuit enlarged drawings of 13 parts in accompanying drawing 2;
Accompanying drawing 6 is circuit enlarged drawings of 14 parts in accompanying drawing 2;
Accompanying drawing 7 is the circuit diagrams of motherboard circuit Part II U1B in the embodiment of the present invention;
Accompanying drawing 8 is circuit enlarged drawings of 21 parts in accompanying drawing 7;
Accompanying drawing 9 is circuit enlarged drawings of 22 parts in accompanying drawing 7;
Accompanying drawing 10 is circuit enlarged drawings of 23 parts in accompanying drawing 7;
Accompanying drawing 11 is circuit enlarged drawings of 24 parts in accompanying drawing 7;
Accompanying drawing 12 is the circuit diagrams of motherboard circuit Part III U1C in the embodiment of the present invention;
Accompanying drawing 13 is circuit diagrams of embodiment of the present invention sound intermediate frequency module;
Accompanying drawing 14 is circuit diagrams of USB line concentration module in the embodiment of the present invention;
Accompanying drawing 15 is circuit diagrams of the camera of CMOS camera module in the embodiment of the present invention;
Accompanying drawing 16 is circuit diagrams of the camera power circuit of CMOS camera module in the embodiment of the present invention;
Accompanying drawing 17 is circuit diagrams of 3G/4G module in the embodiment of the present invention;
Accompanying drawing 18 is circuit diagrams of Zigbee module in the embodiment of the present invention;
Accompanying drawing 19 is circuit diagrams of the horizontal cradle head control circuit of The Cloud Terrace control module in the embodiment of the present invention;
Accompanying drawing 20 is circuit diagrams of longitudinal cradle head control circuit of The Cloud Terrace control module in the embodiment of the present invention;
Accompanying drawing 21 is circuit diagrams of the power circuit by illuminance control of CMOS camera module;
Accompanying drawing 22 is the circuit diagrams of power management module Part I U2A in the embodiment of the present invention;
Accompanying drawing 23 is the circuit diagrams of power management module Part II U2B in the embodiment of the present invention;
Accompanying drawing 24 is the circuit diagrams of power management module Part III U2C in the embodiment of the present invention;
Accompanying drawing 25 is the circuit diagrams of power management module Part IV U2D in the embodiment of the present invention.
Embodiment
Embodiment, as shown in Figure 1, cloud terminal comprises motherboard circuit, cradle head control module, power management module, CMOS camera module, Zigbee module, 3G/4G module, USB line concentration module and audio-frequency module, and cradle head control module, power management module, CMOS camera module, Zigbee module, 3G/4G module, USB line concentration module are all connected with motherboard circuit with audio-frequency module.
Motherboard circuit: core processor place.
Cradle head control module: by two motors, respectively the action electricity of crosswise joint The Cloud Terrace and longitudinally control The Cloud Terrace action, to focus etc. to camera.
Power management module: export multiple voltage, all modules of whole circuit are powered and managed.
CMOS camera module: gather video image.
Zigbee module: networked by Zigbee protocol tissue substance, carries out data transmission with various kinds of sensors networking.
3G/4G module: by using 3G or the 4G network interface card of operator to connect with internet, carry out data transmission.
USB line concentration module: USB many interfaces are provided.
Audio-frequency module: gather voice data.
Cloud computing technology is used in motherboard circuit, build cloud environment, build the framework based on cloud, reduce costs and accelerate service offering speed, thus a kind of intelligent automaticization cloud service of perception is provided, and adopt the mode of distributed storage to store data, cloud terminal can store mass data, based on the needs of network available in networking and reality, devising can the Zigbee module of self-organizing network, the 3G/4G module of operator 3G or 4G network can be utilized, general module constructing plan, the action of cloud terminal is controlled by the certified order of sending in network, or control the function of a certain particular module, cloud terminal completes audio frequency, video, the acquisition process of data, to data fusion with after calculating, result can be published on network, accept the order coming from network, control a certain function of cloud terminal.
As shown in accompanying drawing 2 to accompanying drawing 12, motherboard circuit comprises mainboard U1, the model of mainboard U1 is S5PV210AH-A0, the XOM0 end of mainboard U1 is through resistance R7 ground connection, the XOM1 end of mainboard U1 is through socket J3 ground connection, the XOM2 end of mainboard U1 is through resistance R6 ground connection, the XOM3 end of mainboard U1 is through resistance R5 ground connection, the XOM4 end of mainboard U1 is through resistance R4 ground connection, the XOM5 end of mainboard U1 is through resistance R3 ground connection, the XOM1 end of mainboard U1 meets VDD_IO through resistance R1, the XOM2 end of mainboard U1 meets VDD_IO through socket J2, the XOM3 end of mainboard U1 meets VDD_IO through socket J1, the XXTI end of mainboard U1 is through electric capacity C1 ground connection, the XXTO end of mainboard U1 is through electric capacity C2 ground connection, the XXTI end of mainboard U1 connects XXTO end through resistance R8, the XXTI end of mainboard U1 connects XXTO end through crystal oscillator X1, the XusbXTI end of mainboard U1 is through electric capacity C7 ground connection, the XusbXTO end of mainboard U1 is through electric capacity C8 ground connection, the XusbXTI end of mainboard U1 connects XusbXTO end through resistance R1, the XusbXTI end of mainboard U1 connects XusbXTO end through crystal oscillator X4, the hdmiXTI end of mainboard U1 is through electric capacity C4 ground connection, the hdmiXTO end of mainboard U1 is through electric capacity C6 ground connection, the hdmiXTI end of mainboard U1 meets X hdmiXTO through resistance R13 and holds, the hdmiXTI end of mainboard U1 connects hdmiXTO end through crystal oscillator X3, the XuhREXT end of mainboard U1 is through resistance R10 ground connection, the XuoREXT end of mainboard U1 is through resistance R12 ground connection, the NC/EPLL end of mainboard U1 is through electric capacity C9 ground connection, the XDACIREF end of mainboard U1 is through resistance R22 ground connection, the XDACVREF end of mainboard U1 is through electric capacity C12 ground connection, the XDACCOMP end of mainboard U1 is through electric capacity C11 ground connection, the XmipiVREG_0P4V end of mainboard U1 is through electric capacity C10 ground connection, the XHDMIREXT end of mainboard U1 is through resistance R21 ground connection.
Mainboard U1 connects cradle head control module, and cradle head control module comprises horizontal cradle head control circuit and longitudinal cradle head control circuit, the XURXD0/GPA0_0 end of mainboard U1, XUTXD0/GPA0_1 end and the longitudinal cradle head control circuit of XEINT16/KP_COL0/GPH2_0 termination, the XpwmTOUT0/GPD0_0 end of mainboard U1, XpwmTOUT1/GPD0_1 holds, XpwmTOUT2/GPD0_2 end and the horizontal cradle head control circuit of XpwmTOUT3/PWM_MIE/GPD20_3 termination, the XURXD1/GPA0_4 end of mainboard U1 and XUTXD1/GPA0_5 termination Zigbee module, the XuhDP end of mainboard U1 and XuhDM termination USB line concentration module, the Xi2sSCLK1/PCM_SCLK1/AC97BITCLK/GPC0_0 end of mainboard U1, Xi2sCDCLK1/PCM_EXTCLK1/AC97RESETn/GPC0_1 holds, Xi2sLRCK1/PCM_FSYNC1/AC97SYNC/GPC0_2 holds, Xi2sSDI1/PCM_SIN1/AC97SDI/GPC0_3 end and Xi2sSDO1/PCM_SOUT1/AC97SDO/GPC0_4 ending connecting audio module and 3G/4G module, the Xmmc0CLK/GPG0_0 of mainboard U1 holds, Xmmc0CMD/GPG0_1 holds, Xmmc0CDn/GPG0_2 holds, Xmmc0DATA0/GPG0_3 holds, Xmmc0DATA1/GPG0_4 holds, Xmmc0DATA2/GPG0_5 end and Xmmc0DATA3/GPG0_6 termination SD card, the Xi2cSDA0/GPD1_0 end of mainboard U1, Xi2cSCL0/GPD1_1 holds, XciPCLK/GPE0_0 holds, XciVSYNC/GPE0_1 holds, XciHREF/GPE0_2 holds, XciYDATA0/GPE0_3 holds, XciYDATA1/GPE0_4 holds, XciYDATA2/GPE0_5 holds, XciYDATA3/GPE0_6 holds, XciYDATA4/GPE0_7 holds, XciYDATA5/GPE1_0 holds, XciYDATA6/GPE1_1 holds, XciYDATA7/GPE1_2 holds, XciCLKenb/GPE1_3 end and XciFIELD/GPE1_4 termination CMOS camera module, the XnRESET end of mainboard U1, XPWRRGTON holds, XEINT2/GPH0_2 holds, Xi2cSDA2/IEM_SCLK/GPD1_4 holds, Xi2cSCL2/IEM_SPWI/GPD1_5 holds, XmsmADDR2/CAM_B_D2/CF_ADDR2/TS_CLK/GPJ0_2 end and XmsmADDR3/CAM_B_D3/CF_IORDY/TS_SYNC/GPJ0_3 termination power administration module.
As shown in Figure 14, USB line concentration module comprises integrated circuit U11, the model of integrated circuit U11 is USB2514B, the XuhDP end of the USBUP_DP termination mainboard U1 of integrated circuit U11, the XuhDN end of the USBUP_DM termination mainboard U1 of integrated circuit U11, the VBUS_DET end of integrated circuit U11 meets 3.3V through resistance R50, integrated circuit U11 VBUS_DET end through series connection resistance R50 and electric capacity C89 ground connection, the OCS1 end of integrated circuit U11 meets 3.3V through resistance R52, the OCS2 end of integrated circuit U11 meets 3.3V through resistance R53, the OCS3 end of integrated circuit U11 meets 3.3V through resistance R54, the OCS4 end of integrated circuit U11 meets 3.3V through resistance R55, the SUSP_IND/LOCAL_PWR/NON_REM0 end of integrated circuit U11 is through resistance R57 ground connection, the RESET end of integrated circuit U11 meets 3.3V through resistance R56, the RESET end of integrated circuit U11 is through electric capacity C90 ground connection, the XnRSTOUT end of the RESET termination mainboard U1 of integrated circuit U11, the XTAL1/CLKIN end of integrated circuit U11 connects the XTAL2/CLKIN_EN end of integrated circuit U11 through the resistance R62 of parallel connection and crystal oscillator X7, one end of the XTAL1/CLKIN termination capacitor C91 of integrated circuit U11, another termination crystal oscillator X2 of electric capacity C91, the other end ground connection of electric capacity C91, the other end of electric capacity C91 connects the XTAL2/CLKIN_EN end of integrated circuit U11 through electric capacity C92, the TEST of integrated circuit U11 holds ground connection, the PLLFILT end of integrated circuit U11 is through electric capacity C96 ground connection, the CRFILT end of integrated circuit U11 is through electric capacity C101 ground connection, the CRFILT end of integrated circuit U11 connects the VSS end of integrated circuit U11 through electric capacity C101, the SDA/SMBDATA/NON_REM1 end of integrated circuit U11 is through resistance R60 ground connection, the SCL/SMBCLK/CFG_SEL0 end of integrated circuit U11 is through resistance R59 ground connection, the HS_IND/CFG_SEL1 end of integrated circuit U11 is through resistance R58 ground connection, the RBIAS end of integrated circuit U11 is through resistance R61 ground connection, VDD33 (IO) the termination 3.3V of integrated circuit U11, VDD33 (REG) the termination 3.3V of integrated circuit U11, VDD33 (IO) end of integrated circuit U11 is through electric capacity C94 ground connection, the VDDPLLREF/VDDA33 end of VDD33 (IO) the termination integrated circuit U11 of integrated circuit U11, VDD33 (REG) end of integrated circuit U11 is through electric capacity C93 ground connection, VDD33 (REG) end of integrated circuit U11 is through electric capacity C95 ground connection, the VDDPLLREF/VDDA33 end of integrated circuit U11 is held with VDDA33_1, VDDA33_2 holds, VDDA33_3 holds connection, the VDDPLLREF/VDDA33 of integrated circuit U11 holds the electric capacity C97 through parallel connection, electric capacity C98, electric capacity C99 and electric capacity C100 ground connection, the USBDN2_DP end of integrated circuit U11 and USBDN2_DM termination HOST style interface generic USB socket.
When building a whole set of single-chip USB otg controller, the interface that will support must be considered, such as possesses the primary cpu i/f of support direct memory access (DMA), just can support most of ARM, MIPS and various reduced instruction set computer (RISC) processor by this, along with the storage volume of equipment constantly increases, the flow of the required transmission of USB is also constantly grown up thereupon, requires the data transmission having a kind of high-performance, high speed between usb host and complex peripheral equipment.
The USB2514B USB2.0 hub controller of this module has multi-functional, the feature such as high performance-price ratio and low-power consumption, this hub controller adopts the MultiTRAK technology of innovation, the data throughout of industry-leading can be provided in the USB environment of mixing velocity, there is 1 USB uplink port, the technical grade USB2.0 HUB device of 4 USB downlink ports, each downlink port maximum operating currenbt can be 500mA, flank speed is 480Mb/s, USB HUB supports the USB external unit of multiple different attribute, tiered-star topology structural support reaches 127 external units.
The inner structure of USB2514B comprises transponder (HUB Repeater), controller (HUB Controller) and process translater (Transaction Translator, TT), USB2514B is operated in Signal transmissions, restart and wait for three kinds of states, support at a high speed, full speed and low speed three kinds of transfer rates, its transfer rate depends on the transmission state of the connection status towards the uplink port system of main frame and the HUB downlink port peripherals towards USB device, HUB Repeater is responsible for the connectedness that HUB uplink port and HUB downlink port are operated in same transfer rate, HUB Repeater must have 1 port to be connected to uplink port, and has one or more ports to be connected to downlink port, HUB Controller provides the state of main frame to HUB and control.When HUB be operated in high-speed transfer state and have simultaneously at full speed or the peripherals of low speed is connected with HUB time, process translater is then translated into high speed signal classification process at full speed or low-speed processing signal; When a periphery is not for when being connected with the downlink port of HUB, operating rate determines that its logical routing is connected to HUB transponder or damp device is turned in HUB process.
XURXD1/GPA0_4 end and the XUTXD1/GPA0_5 end of mainboard U1 connect Zigbee module through connector J17 and connector J18, as shown in Figure 18, Zigbee module comprises integrated circuit M1, the model of integrated circuit M1 is CC2530, the XURXD1/GPA0_4 of mainboard U1 holds 2 pin through connector J17 and connector J18 to connect the P0_3_txd end of integrated circuit M1, the XUTXD1/GPA0_5 of mainboard U1 holds 1 pin through connector J17 and connector J18 to connect the P0_2_rxd end of integrated circuit M1, the XEINT18/KP_COL2/GPH2_2 of mainboard U1 holds 3 pin through connector J17 and connector J18 to connect the P2_0 end of integrated circuit M1, the XnRSTOUT of mainboard U1 holds 4 pin through connector J17 and connector J18 to connect the RST end of integrated circuit M1, 5 pin of connector J17 and connector J18 meet SYSVDD, the 6 pin ground connection of connector J17 and connector J18, the vdd terminal of integrated circuit M1 meets 3.3V, the GND1 end of integrated circuit M1, GND2 end and GND3 hold ground connection.
As shown in Figure 13, audio-frequency module comprises integrated circuit U8, the model of integrated circuit U8 is WM9713G, the DBVDD termination 3.3V of integrated circuit U8, the DBVDD end of integrated circuit U8 is through electric capacity C64 ground connection, the DCVDD termination 3.3V of integrated circuit U8, the DCVDD end of integrated circuit U8 is through electric capacity C65 ground connection, the DGND1 end of integrated circuit U8 and DGND2 end ground connection respectively, the MCLKA end of integrated circuit U8 connects 3 pin of crystal oscillator X6 through resistance R43, the 2 pin ground connection of crystal oscillator X6, 4 pin of crystal oscillator X6 meet 3.3V, MCLKB/GPIO6/ (ADA/MASK) end of integrated circuit U8 meets 3.3V through resistance R41, the Xi2sSDO1/PCM_SOUT1/AC97SDO/GPC0_4 end of the SDATAOUT termination mainboard U1 of integrated circuit U8, the ITCLK termination of integrated circuit U8 connects the Xi2sSCLK1/PCM_SCLK1/AC97BITCLK/GPC0_0 end of mainboard U1, the Xi2sSDI1/PCM_SIN1/AC97SDI/GPC0_3 end of the SDATAIN termination mainboard U1 of integrated circuit U8, the Xi2sLRCK1/PCM_FSYNC1/AC97SYNC/GPC0_2 end of the SYNC termination mainboard U1 of integrated circuit U8, the Xi2sCDCLK1/PCM_EXTCLK1/AC97RESETn/GPC0_1 end of RESETB/GPIO7/ (PENDOWN) the termination mainboard U1 of integrated circuit U8, the MIC1 end of integrated circuit U8 is through one end of electric capacity C79 connecting resistance R47, the MICBIAS end of another termination integrated circuit U8 of resistance R47, the other end of resistance R47 connects the MIC2A/COMP1/AUX1 end of integrated circuit U8 through the resistance R48 of series connection and electric capacity C80, the other end of resistance R47 connects 2 pin of microphone J9 through resistance R48, the 2 foot meridian capacitor C80 of microphone J9 connect the MIC2A/COMP1/AUX1 end of integrated circuit U8, the MICCM end of integrated circuit U8 connects 1 pin of microphone J9 through electric capacity C82, integrated circuit U8 MICCM end through series connection electric capacity C82 and resistance R49 ground connection, the AVDD termination AVDD of integrated circuit U8, the AVDD end of integrated circuit U8 connects the AGND end of integrated circuit U8 through electric capacity C70, the SPKVDD end of integrated circuit U8 is held with AVDD, HPVDD holds, TPVDD holds connection, the SPKVDD end of integrated circuit U8 connects the SPKGND end of integrated circuit U8 through electric capacity C69, the HPVDD end of integrated circuit U8 connects the HPGND end of integrated circuit U8 through electric capacity C68, the TPVDD end of integrated circuit U8 connects the TPGND end of integrated circuit U8 through electric capacity C66, the AGND end of integrated circuit U8, SPKGND holds, HPGND holds, TPGND holds, AGND2 holds equal ground connection,
The MICBIAS end of integrated circuit U8 is through the electric capacity C83 of parallel connection and electric capacity C88 ground connection, and the CAP2 end of integrated circuit U8 is through the electric capacity C86 of parallel connection and electric capacity C87 ground connection, and the VREF end of integrated circuit U8 is through the electric capacity C84 of parallel connection and electric capacity C85 ground connection;
The SPKL end of integrated circuit U8 connects the-IN end of integrated circuit U9 after the electric capacity C71 and resistance R44 of series connection, one end of SPKL end connecting resistance R42 after the electric capacity C71 and resistance R44 of series connection of integrated circuit U8, the VO1 end of another termination integrated circuit U9 of resistance R42, + IN termination the BYPASS of integrated circuit U9 holds, the BYPASS end of integrated circuit U9 is through electric capacity C72 ground connection, the SHUTDOWN of integrated circuit U9 holds ground connection, the vdd terminal of integrated circuit U9 meets VDDAMP, the vdd terminal of integrated circuit U9 is through electric capacity C87 ground connection, the GND of integrated circuit U9 holds ground connection, the model of integrated circuit U9 is LM4871, the SPKR end of integrated circuit U8 connects the-IN end of integrated circuit U10 after the electric capacity C77 and resistance R48 of series connection, one end of SPKR end connecting resistance R45 after the electric capacity C77 and resistance R48 of series connection of integrated circuit U8, the VO1 end of another termination integrated circuit U10 of resistance R45, + IN termination the BYPASS of integrated circuit U10 holds, the BYPASS end of integrated circuit U10 is through electric capacity C81 ground connection, the SHUTDOWN of integrated circuit U10 holds ground connection, the vdd terminal of integrated circuit U10 meets VDDAMP, the vdd terminal of integrated circuit U10 is through electric capacity C75 ground connection, the GND of integrated circuit U10 holds ground connection, the model of integrated circuit U10 is LM4871.
The OUT4 end of integrated circuit U8, MONO holds, PCBEEP end and MONOIN termination 3G/4G module, as shown in Figure 17, the MICP end of integrated circuit U18, MICN holds, EARP end and EARN ending connecting audio module, the MICP end of integrated circuit U18 connects the OUT4 end of integrated circuit U8 through electric capacity C73, the MICN end of integrated circuit U18 connects the MONO end of integrated circuit U8 through electric capacity C74, the EARP end of integrated circuit U18 connects the PCBEEP end of integrated circuit U8 through electric capacity C76, the EARN end of integrated circuit U18 connects the MONOIN end of integrated circuit U8, the GND1 end of integrated circuit U18 through electric capacity C78, GND2 holds, GND3 holds, GND4 holds, GND5 holds, GND6 holds, GND7 holds, GND8 holds, GND9 holds, GND10 holds, GND11 holds, GND12 holds, GND13 holds, GND14 holds, S1 holds, S2 holds, HOLE1 end and HOLE2 hold ground connection, the VDD1 end of integrated circuit U18, VDD2 holds, VDD3 holds, VDD4 and VDD5 termination 3.3V, the VREG_USIM end of integrated circuit U18 connects the IO end of SIM card slot J16 through resistance R77, the IO end of SIM card slot J16 is through electric capacity C106 ground connection, the VREG_USIM end of integrated circuit U18 is through electric capacity C109 ground connection, the IO end of the UIM_DATA termination SIM card slot J16 of integrated circuit U18, the CLK end of the UIM_CLK termination SIM card slot J16 of integrated circuit U18, the UIM_CLK end of integrated circuit U18 is through electric capacity C107 ground connection, the RST end of the UIM_RST termination SIM card slot J16 of integrated circuit U18, the UIM_RST end of integrated circuit U18 is through electric capacity C108 ground connection, and the SH1 of SIM card slot J16 holds, SH2 holds, SH3 holds, SH4 end and GND hold ground connection, the USB_D-end of integrated circuit U18 and USB_D+ termination integrated circuit U11, the USB_D-end of integrated circuit U18 and USB_D+ termination USB line concentration module, the USBDN1_DM end of the USB_D-termination integrated circuit U11 of integrated circuit U18, the USBDN1_DP end of the USB_D+ termination integrated circuit U11 of integrated circuit U18.
As shown in accompanying drawing 22 to accompanying drawing 25, power management module comprises integrated circuit U2, the power management chip of integrated circuit U2 to be model be WM8310G, the PVDD1 termination SYSVDD of integrated circuit U2, the PVDD2 termination SYSVDD of integrated circuit U2, the PVDD1 end of integrated circuit U2 is through electric capacity C49 ground connection, the PVDD2 end of integrated circuit U2 is through electric capacity C48 ground connection, the USBVMON termination USBVDD of integrated circuit U2, the SYSVMON termination SYSVDD of integrated circuit U2, the BATTVMON termination VBAT of integrated circuit U2, the NTCBIAS end of integrated circuit U2 connects NTCMON end through resistance R23, 2 pin of the NTCMON termination battery J5 of integrated circuit U2, the USBVDD1 end of integrated circuit U2, USBVDD2 holds, USBVDD3 end and USBVDD4 end meet USBVDD respectively, the USBVDD1 end of integrated circuit U2, USBVDD2 holds, USBVDD3 end and USBVDD4 end are respectively through electric capacity C53 ground connection, the SYSVDD1 end of integrated circuit U2, SYSVDD2-A holds, SYSVDD2-B holds, SYSVDD3-A holds, SYSVDD3-B holds, SYSVDD4 holds connection, the SYSVDD1 termination SYDVDD of integrated circuit U2, the SYSVDD1 end of integrated circuit U2 is through electric capacity C55 ground connection, 2 pin of the SYSVDD1 termination integrated circuit U3 of integrated circuit U2 and 3 pin, 7 pin of the SYSVDD1 termination integrated circuit U3 of integrated circuit U2 and 6 pin, integrated circuit U3 is SI6913DQ, 1 pin of integrated circuit U3 connects the WALLVDD end of integrated circuit U2, 1 pin of integrated circuit U3 meets 5V, 1 pin of integrated circuit U3 is through the electric capacity C54 of parallel connection and diode D1 ground connection, 1 pin of integrated circuit U3 connects 1 pin of battery J4 through fuse F1, 2 pin of battery J4 and 3 pin ground connection, 4 pin of integrated circuit U3 connect the WALLENA end of integrated circuit U2, 5 pin of integrated circuit U3 connect the BATTFETENA end of integrated circuit U2, 8 pin of integrated circuit U3 connect BATTVDD1 end and the BATTVDD2 end of integrated circuit U2, 8 pin of integrated circuit U3 meet VBAT, the 8 foot meridian capacitor C59 ground connection of integrated circuit U3, 8 pin of integrated circuit U3 connect 1 pin of battery J5, the 3 pin ground connection of battery J5, the XPWRRGTON end of the GPIO1 termination mainboard U1 of integrated circuit U2, the XmsmADDR2/CAM_B_D2/CF_ADDR2/TS_CLK/GPJ0_2 end of the GPIO2 termination mainboard U1 of integrated circuit U2, the XmsmADDR3/CAM_B_D3/CF_IORDY/TS_SYNC/GPJ0_3 end of the GPIO3 termination mainboard U1 of integrated circuit U2,
The DC1VDD-A termination DC1VDD-B of integrated circuit U2 holds, the DC1VDD-A termination SYSVDD of integrated circuit U2, the DC1VDD-A end of integrated circuit U2 is through the electric capacity C13 of parallel connection and electric capacity C17 ground connection, the DC1FB end of integrated circuit U2 connects DC1LX-A end through inductance L 1, the DC1LX-A termination DC1LX-B of integrated circuit U2 holds, one end of the DC1LX-A termination inductance L 1 of integrated circuit U2, another termination 1.25V of inductance L 1, the other end of inductance L 1 connects the DC1GND-A end of integrated circuit U2 through electric capacity C21 and C15 of parallel connection, the DC1GND-A termination DC1GND-B of integrated circuit U2 holds, the DC1GND-A of integrated circuit U2 holds ground connection, the DC2VDD-A termination DC2VDD-B of integrated circuit U2 holds, the DC2VDD-A termination SYSVDD of integrated circuit U2, the DC2VDD-A end of integrated circuit U2 is through the electric capacity C24 of parallel connection and electric capacity C16 ground connection, the DC2FB end of integrated circuit U2 connects DC2LX-A end through inductance L 2, the DC2LX-A termination DC2LX-B of integrated circuit U2 holds, one end of the DC2LX-A termination inductance L 2 of integrated circuit U2, another termination 1.1V of inductance L 2, the other end of inductance L 1 connects the DC2GND-A end of integrated circuit U2 through electric capacity C27 and C28 of parallel connection, the DC2GND-A termination DC2GND-B of integrated circuit U2 holds, the DC2GND-A of integrated circuit U2 holds ground connection, the DC3VDD-A termination DC3VDD-B of integrated circuit U2 holds, the DC3VDD-A termination SYSVDD of integrated circuit U2, the DC3VDD-A end of integrated circuit U2 is through the electric capacity C34 of parallel connection and electric capacity C33 ground connection, the DC3FB end of integrated circuit U2 connects DC3LX-A end through inductance L 3, the DC3LX-A termination DC3LX-B of integrated circuit U2 holds, one end of the DC3LX-A termination inductance L 3 of integrated circuit U2, another termination 1.8V of inductance L 3, the other end of inductance L 1 connects the DC3GND-A end of integrated circuit U2 through electric capacity C37 and C38 of parallel connection, the DC3GND-A termination DC3GND-B of integrated circuit U2 holds, the GND7-11 end of integrated circuit U2, GND7-10 holds, DC4GND holds, GND1 holds, GND2-1 holds, GND2-2 holds, GND2-3 holds, GND2-4 holds, GND2-5 holds, GND2-6 holds, GND2-7 holds, GND2-8 holds, GND2-9 holds, GND2-10 holds, GND2-11 holds, GND2-12 holds, GND2-13 holds, GND2-14 holds, GND2-15 holds, GND2-16 holds, GND3 holds, GND4-1 holds, GND4-2 holds, GND4-3 holds, GND4-4 holds, GND4-5 holds, GND4-6 holds, GND4-7 holds, GND4-8 holds, GND5 holds, GND6 holds, GND7-1 holds, GND7-2 holds, GND7-3 holds, GND7-4 holds, GND7-5 holds, GND7-6 holds, GND7-7 holds, GND7-8 end and GND7-9 hold ground connection,
The DBVDD1-1 end of integrated circuit U2, DBVDD2-2 holds, DBVDD2 end is connected with DBVDD3 end, the DBVDD1-1 end of integrated circuit U2, DBVDD2-2 holds, DBVDD2 end and DBVDD3 termination DBVDD, the DBVDD1-1 end of integrated circuit U2 is through electric capacity C51 ground connection, the DBVDD2 end of integrated circuit U2 is through electric capacity C50 ground connection, the DBVDD3 end of integrated circuit U2 is through electric capacity C52 ground connection, the DBGND-1 end of integrated circuit U2, DBGND-2 holds, DBGND-3 end and DBGND-4 hold ground connection, the XnRESET end of the RESET termination mainboard U1 of integrated circuit U2, the CIFMODE end of integrated circuit U2, SDOUT1 holds, ground connection after CS end connects, the SCLK1 end of integrated circuit U2 meets DBVDD through resistance R24, the SDA1 end of integrated circuit U2 meets DBVDD through resistance R25, the Xi2cSCL2/IEM_SPWI/GPD1_5 end of the SCLK1 termination mainboard U1 of integrated circuit U2, the Xi2cSDA2/IEM_SCLK/GPD1_4 end of the SDA1 termination mainboard U1 of integrated circuit U2, the SCLK2 end of integrated circuit U2 meets DBE VCC through resistance R26, the SDA2 end of integrated circuit U2 meets DBE VCC through resistance R27, the SCL end of the SCLK2 termination integrated circuit U4 of integrated circuit U2, the SDA end of the SDA2 termination integrated circuit U4 of integrated circuit U2, the model of integrated circuit U4 is 24AA32A, the A0 end of integrated circuit U4, A1 holds, A2 end and GND hold ground connection, the WP of integrated circuit U4 holds ground connection, the VCC termination DBE VCC of integrated circuit U4, the VREFC end of integrated circuit U2 is through electric capacity C60 ground connection, the IREFR end of integrated circuit U2 is through resistance R28 ground connection, the REFGND of integrated circuit U2 holds ground connection, the ISINKGND-1 end of integrated circuit U2, ISINKGND-2 end and XOSCGND hold ground connection, the XTI end of integrated circuit U2 connects XTO end through crystal oscillator X5, the XTI end of integrated circuit U2 is through electric capacity C56 ground connection, the XTO end of integrated circuit U2 is through electric capacity C58 ground connection, the XEINT2/GPH0_2 end of the IRQ termination mainboard U1 of integrated circuit U2,
The LDO1VDD termination SYSVDD of integrated circuit U2, the LDO1VDD end of integrated circuit U2, LDO2VDD holds, LDO3VDD holds, LDO4VDD holds, LDO5VDD holds, LDO6VDD holds, LDO7VDD end is connected with LDO8VDD end, the LDO1VDD end of integrated circuit U2 is through electric capacity C14 ground connection, the LDO2VDD end of integrated circuit U2 is through electric capacity C19 ground connection, the LDO3VDD end of integrated circuit U2 is through electric capacity C22 ground connection, the LDO4VDD end of integrated circuit U2 is through electric capacity C26 ground connection, the LDO5VDD end of integrated circuit U2 is through electric capacity C29 ground connection, the LDO6VDD end of integrated circuit U2 is through electric capacity C31 ground connection, the LDO7VDD end of integrated circuit U2 is through electric capacity C35 ground connection, the LDO8VDD end of integrated circuit U2 is through electric capacity C39 ground connection, the LDO9VDD end of integrated circuit U2 is through electric capacity C41 ground connection, the LDO10VDD end of integrated circuit U2 is through electric capacity C44 ground connection, the LDO1VOUT termination 2.8V of integrated circuit U2, the LDO1VOUT end of integrated circuit U2 is through electric capacity C18 ground connection, the LDO2VOUT termination 1.8V of integrated circuit U2, the LDO2VOUT end of integrated circuit U2 is through electric capacity C20 ground connection, the LDO3VOUT termination 1.8V of integrated circuit U2, the LDO3VOUT end of integrated circuit U2 is through electric capacity C23 ground connection, the LDO4VOUT termination 1.8V of integrated circuit U2, the LDO4VOUT end of integrated circuit U2 is through electric capacity C25 ground connection, the LDO5VOUT termination 1.1V of integrated circuit U2, the LDO5VOUT end of integrated circuit U2 is through electric capacity C30 ground connection, the LDO6VOUT termination 2.8V of integrated circuit U2, the LDO6VOUT end of integrated circuit U2 is through electric capacity C32 ground connection, the LDO7VOUT termination 1.1V of integrated circuit U2, the LDO7VOUT end of integrated circuit U2 is through electric capacity C36 ground connection, the LDO8VOUT termination 3.3V of integrated circuit U2, the LDO8VOUT end of integrated circuit U2 is through electric capacity C40 ground connection, the LDO9VOUT termination 3.3V of integrated circuit U2, the LDO9VOUT end of integrated circuit U2 is through electric capacity C42 ground connection, the LDO10VOUT termination 3.3V of integrated circuit U2, the LDO10VOUT end of integrated circuit U2 is through electric capacity C43 ground connection, the LDO11VOUT termination 1.1V of integrated circuit U2, the LDO11VOUT end of integrated circuit U2 is through electric capacity C45 ground connection, the LDO12VOUT termination DBE_VCC of integrated circuit U2, the LDO12VOUT end of integrated circuit U2 is through electric capacity C46 ground connection, the LDO13VOUT termination 2.5V of integrated circuit U2, the LDO13VOUT end of integrated circuit U2 is through electric capacity C47 ground connection.
As shown in Figure 20, longitudinal cradle head control circuit comprises RS485 interface circuit, RS485 interface circuit comprises integrated circuit U12, the model of integrated circuit U12 is MAX3485, the XURXD0/GPA0_0 end of the RO termination mainboard U1 of integrated circuit U12, integrated circuit U12 /RE termination DE hold after connect mainboard U1 XEINT16/KP_COL0/GPH2_0 end, the XUTXD0/GPA0_1 end of the DI termination mainboard U1 of integrated circuit U12, the vdd terminal of integrated circuit U12 meets 3.3V, the vdd terminal of integrated circuit U12 is through electric capacity C102 ground connection, the B end of integrated circuit U12 is through resistance R63 ground connection, the B end of integrated circuit U12 connects the A end of integrated circuit U12 through resistance R65, the A end of integrated circuit U12 meets 3.3V through resistance R66, the A end of integrated circuit U12 is through one end of resistance R67 connecting resistance R71, the A end of another termination integrated circuit U16 of resistance R71, the B end of integrated circuit U12 is through one end of resistance R64 connecting resistance R69, the other end of resistance R69 is through resistance R68 ground connection, the B end of another termination integrated circuit U16 of resistance R69, the model of integrated circuit U16 is MAX3485EESA, the A end of integrated circuit U16 connects B end through resistance R70, the A end of integrated circuit U16 meets 3.3V through resistance R72, the GND of integrated circuit U16 holds ground connection, integrated circuit U16 /RE termination DE hold after connect single-chip microcomputer U14 P1.0/RSTOUT_LOW end, the model of single-chip microcomputer U14 is STC15W201S, the P3.0/RxD/INT4/T2CLKO end of the RO termination single-chip microcomputer U14 of integrated circuit U16, the P3.1/TxD/T2 end of the DI termination single-chip microcomputer U14 of integrated circuit U16, the P3.7/INT/TxD_2 end of single-chip microcomputer U14 meets 3.3V through resistance R73, the P3.6/INT2/RxD_2 end of single-chip microcomputer U14 meets 3.3V through resistance R75, the P3.3/INT1 end of single-chip microcomputer U14 meets 3.3V through resistance R74, the P3.2/INT0 end of single-chip microcomputer U14 meets 3.3V through resistance R76, the IN7 end of the P1.1 termination integrated circuit U15 of single-chip microcomputer U14, integrated circuit U15 is relay driver ULN2003LV, the IN6 end of the TO/P1.2 termination integrated circuit U15 of single-chip microcomputer U14, the IN5 end of the P1.3 termination integrated circuit U15 of single-chip microcomputer U14, the IN4 end of the T0CLKO/P1.4 termination integrated circuit U15 of single-chip microcomputer U14, the IN3 end of the P1.5 termination integrated circuit U15 of single-chip microcomputer U14, the IN2 end of the MCLKO/RST/P5.4 termination integrated circuit U15 of single-chip microcomputer U14, the VCC termination 3.3V of single-chip microcomputer U14, the IN1 end of the P5.5 termination integrated circuit U15 of single-chip microcomputer U14, the GND of the GND termination integrated circuit U15 of single-chip microcomputer U14 holds ground connection, the COM termination 5.0V of integrated circuit U15, the OUT1 end of integrated circuit U15, OUT2 holds, OUT3 holds, OUT4 end and COM termination stepper motor J14.
As shown in Figure 19, horizontal cradle head control circuit comprises integrated circuit U13, integrated circuit U13 is relay driver ULN2003LV, the XpwmTOUT0/GPD0_0 end of the IN1 termination mainboard U1 of integrated circuit U13, the XpwmTOUT1/GPD0_1 end of the IN2 termination mainboard U1 of integrated circuit U13, the XpwmTOUT2/GPD0_2 end of the IN3 termination mainboard U1 of integrated circuit U13, the XpwmTOUT3/PWM_MIE/GPD20_3 end of the IN4 termination mainboard U1 of integrated circuit U13, the GND of integrated circuit U13 holds ground connection, the COM termination SYSVDD of integrated circuit U13, the OUT1 end of integrated circuit U13, OUT2 holds, OUT3 holds, OUT4 end and COM termination stepper motor J11.
As shown in Figure 15, CMOS camera module comprises camera U17, the model of camera is OV3640, the AGND of camera U17 holds ground connection, the Xi2cSDA0/GPD1_0 end of the SIO_D termination mainboard U1 of camera U17, the Xi2cSCL0/GPD1_1 end of the SIO_C termination mainboard U1 of camera U17, the XciFIELD/GPE1_4 end of the RESET termination mainboard U1 of camera U17, the XciVSYNC/GPE0_1 end of the VSYNC termination mainboard U1 of camera U17, the PWDN of camera U17 holds ground connection, the XciHREF/GPE0_2 end of the HREF termination mainboard U1 of camera U17, the XciYDATA7/GPE1_2 end of the Y9 termination mainboard U1 of camera U17, the XciCLKenb/GPE1_3 end of the XCLK termination mainboard U1 of camera U17, the XciYDATA6/GPE1_1 end of the Y8 termination mainboard U1 of camera U17, the DGND of camera U17 holds ground connection, the XciYDATA5/GPE1_0 end of the Y7 termination mainboard U1 of camera U17, the XciPCLK/GPE0_0 end of the PCLK termination mainboard U1 of camera U17, the XciYDATA4/GPE0_7 end of the Y6 termination mainboard U1 of camera U17, the XciYDATA0/GPE0_3 end of the Y2 termination mainboard U1 of camera U17, the XciYDATA3/GPE0_6 end of the Y5 termination mainboard U1 of camera U17, the XciYDATA1/GPE0_4 end of the Y3 termination mainboard U1 of camera U17, the XciYDATA2/GPE0_5 end of the Y4 termination mainboard U1 of camera U17, the Y1 termination 3.3V of camera U17, the Y0 of camera U17 holds ground connection.
CMOS camera module also comprises camera power circuit, as shown in Figure 16, camera power circuit comprises integrated circuit U20, integrated circuit U21, integrated circuit U22, the model of integrated circuit U20 is EMP8734-28VF05GRR, the model of integrated circuit U21 is EMP8734-15VF05GRR, the model of integrated circuit U22 is EMP8734-18VF05GRR, the Vin termination 5.0V of integrated circuit U20, the Vin termination EN of integrated circuit U20 holds, the Vin end of integrated circuit U20 is through electric capacity C100 ground connection, the GND of integrated circuit U20 holds ground connection, the Vout termination 2.8V of integrated circuit U20, the Vout end of integrated circuit U20 is through electric capacity C101 ground connection, one end of the Vout termination magnetic bead of integrated circuit U20, the other end of magnetic bead is through the electric capacity C102 of parallel connection and electric capacity C103 ground connection, the AVDD end of another termination camera U17 of magnetic bead, the Vin termination 3.3V of integrated circuit U21, the Vin termination EN of integrated circuit U21 holds, the Vin end of integrated circuit U21 is through electric capacity C104 ground connection, the GND of integrated circuit U21 holds ground connection, the Vout end of integrated circuit U21 through the electric capacity C105 of parallel connection and electric capacity C106 ground connection, the DVDD(1.5V of the Vout termination camera U17 of integrated circuit U21) end, the Vin termination 3.3V of integrated circuit U22, the Vin termination EN of integrated circuit U22 holds, the Vin end of integrated circuit U22 is through electric capacity C107 ground connection, the GND of integrated circuit U22 holds ground connection, the Vout end of integrated circuit U22 through electric capacity C108, the electric capacity C109 of parallel connection, electric capacity C110 and electric capacity C111 ground connection, the DOVDD(1.8V of the Vout termination camera U17 of integrated circuit U22) end.
CMOS camera module also comprises the power circuit controlled by illuminance, as shown in Figure 21, the power circuit controlled by illuminance comprises integrated circuit U19, the model of integrated circuit U19 is EML3023-00VF05NRR, the Vin end of integrated circuit U19 is through electric capacity C112 ground connection, the Vin end of integrated circuit U19 connects EN end through resistance R59, the EN end of integrated circuit U19 connects the collector of triode Q1 through resistance R75, the emitter of triode Q1 is through resistance R61 ground connection, the base stage of triode Q1 is through resistance R60 ground connection, the base stage of triode Q1 connects the emitter of phototriode Q2, the collector of phototriode Q2 meets SYSVDD, the VSS of integrated circuit U19 holds ground connection, one end of the SW termination inductance L 4 of integrated circuit U19, the other end of inductance L 4 after the electric capacity C113 and resistance R62 of parallel connection again through resistance R63 ground connection, the other end of inductance L 4 is through electric capacity C114 ground connection, the FB end of integrated circuit U19 is through resistance R63 ground connection, the GPIO6 end of the EN termination integrated circuit U8 of integrated circuit U19.
The above is only preferred embodiment of the present invention, and not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.

Claims (2)

1. a cloud terminal USB line concentration module, it is characterized in that: described USB line concentration module comprises integrated circuit U11, the USBUP_DP end of integrated circuit U11, USBUP_DM termination mainboard U1, the VBUS_DET end of integrated circuit U11 meets 3.3V through resistance R50, integrated circuit U11 VBUS_DET end through series connection resistance R50 and electric capacity C89 ground connection, the OCS1 end of integrated circuit U11 meets 3.3V through resistance R52, the OCS2 end of integrated circuit U11 meets 3.3V through resistance R53, the OCS3 end of integrated circuit U11 meets 3.3V through resistance R54, the OCS4 end of integrated circuit U11 meets 3.3V through resistance R55, the SUSP_IND/LOCAL_PWR/NON_REM0 end of integrated circuit U11 is through resistance R57 ground connection, the RESET end of integrated circuit U11 meets 3.3V through resistance R56, the RESET end of integrated circuit U11 is through electric capacity C90 ground connection, the XnRSTOUT end of the RESET termination mainboard U1 of integrated circuit U11, the XTAL1/CLKIN end of integrated circuit U11 connects the XTAL2/CLKIN_EN end of integrated circuit U11 through the resistance R62 of parallel connection and crystal oscillator X7, one end of the XTAL1/CLKIN termination capacitor C91 of integrated circuit U11, another termination crystal oscillator X2 of electric capacity C91, the other end ground connection of electric capacity C91, the other end of electric capacity C91 connects the XTAL2/CLKIN_EN end of integrated circuit U11 through electric capacity C92, the TEST of integrated circuit U11 holds ground connection, the PLLFILT end of integrated circuit U11 is through electric capacity C96 ground connection, the CRFILT end of integrated circuit U11 is through electric capacity C101 ground connection, the CRFILT end of integrated circuit U11 connects the VSS end of integrated circuit U11 through electric capacity C101, the SDA/SMBDATA/NON_REM1 end of integrated circuit U11 is through resistance R60 ground connection, the SCL/SMBCLK/CFG_SEL0 end of integrated circuit U11 is through resistance R59 ground connection, the HS_IND/CFG_SEL1 end of integrated circuit U11 is through resistance R58 ground connection, the RBIAS end of integrated circuit U11 is through resistance R61 ground connection, VDD33 (IO) the termination 3.3V of integrated circuit U11, VDD33 (REG) the termination 3.3V of integrated circuit U11, VDD33 (IO) end of integrated circuit U11 is through electric capacity C94 ground connection, the VDDPLLREF/VDDA33 end of VDD33 (IO) the termination integrated circuit U11 of integrated circuit U11, VDD33 (REG) end of integrated circuit U11 is through electric capacity C93 ground connection, VDD33 (REG) end of integrated circuit U11 is through electric capacity C95 ground connection, the VDDPLLREF/VDDA33 end of integrated circuit U11 is held with VDDA33_1, VDDA33_2 holds, VDDA33_3 holds connection, the VDDPLLREF/VDDA33 of integrated circuit U11 holds the electric capacity C97 through parallel connection, electric capacity C98, electric capacity C99 and electric capacity C100 ground connection, the USBDN2_DP end of integrated circuit U11 and USBDN2_DM termination HOST style interface generic USB socket.
2. a kind of cloud terminal USB line concentration module as claimed in claim 1, is characterized in that: the model of described integrated circuit U11 is USB2514B.
CN201410356427.5A 2014-07-25 2014-07-25 A kind of cloud terminal USB set wire module Active CN104238402B (en)

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CN201410356427.5A CN104238402B (en) 2014-07-25 2014-07-25 A kind of cloud terminal USB set wire module
CN201610467059.0A CN105929755B (en) 2014-07-25 2014-07-25 A kind of cloud terminal USB set wire module of achievable intelligentized control method
CN201610466798.8A CN106094623B (en) 2014-07-25 2014-07-25 A kind of cloud terminal USB set wire module managed concentratedly
CN201610466717.4A CN105955142B (en) 2014-07-25 2014-07-25 A kind of fast cloud terminal USB set wire module

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CN201610466717.4A Division CN105955142B (en) 2014-07-25 2014-07-25 A kind of fast cloud terminal USB set wire module

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CN201410356427.5A Active CN104238402B (en) 2014-07-25 2014-07-25 A kind of cloud terminal USB set wire module
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CN105929755A (en) 2016-09-07
CN105929755B (en) 2018-06-12
CN105955142A (en) 2016-09-21
CN106094623B (en) 2018-08-07
CN104238402B (en) 2016-07-27
CN106094623A (en) 2016-11-09

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