CN104216450A - Power supply and simulative debugging circuit thereof - Google Patents
Power supply and simulative debugging circuit thereof Download PDFInfo
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- CN104216450A CN104216450A CN201310220323.7A CN201310220323A CN104216450A CN 104216450 A CN104216450 A CN 104216450A CN 201310220323 A CN201310220323 A CN 201310220323A CN 104216450 A CN104216450 A CN 104216450A
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Abstract
The invention belongs to the field of power supplies, and particularly relates to a power supply and a simulative debugging circuit of the power supply. An electronic optical shutter control circuit outputs electronic optical shutter signals to an excitation power supply circuit and a gate pulse control circuit. A strong pulse control circuit outputs strong pulse signals to the excitation power supply circuit or outputs gate pulse signals to the gate pulse control circuit. The gate pulse control circuit generates square signals and outputs the square signals with the amplitude adjusted to a super pulse control circuit, and meanwhile the gate pulse control circuit outputs the gate pulse signals or the square signals to the excitation power supply circuit through the electronic optical shutter control circuit. The super pulse control circuit outputs super pulse signals to the excitation power supply circuit. Preferably, a current adjusting circuit is adjusted to adjust the amplitude of the electronic optical shutter signals, the strong pulse signals, the gate pulse signals and the super pulse signals output to the excitation power supply circuit. Therefore, the different signals are controlled to be output to an excitation power supply through the power supply, and debugging is convenient.
Description
Technical field
The invention belongs to power device field, relate in particular to a kind of power device and simulative debugging circuit thereof.
Background technology
At present, excitation power supply is as the critical component of high power gas laser, and when high power gas laser work, excitation power supply control signal is provided by Laser Control System.But in the time that excitation power supply is debugged as independent equipment, due to Laser Control System complexity, and there is the control signal that a lot of non-excitation power supplies need, can cause inconvenient debugging.
Summary of the invention
The object of the present invention is to provide a kind of simulative debugging circuit, aim to provide a kind of control and export to excitation power supply the simulative debugging circuit of different control signals.
The present invention is achieved in that the external excitation power supply circuit of described simulative debugging circuit, and described simulative debugging circuit comprises:
For whether generating electronics optical gate signal according to switch order control and exporting the electronics optical gate control circuit of described electronics optical gate signal to described excitation power supply circuit and gate pulse control circuit;
For generating high power pulse signal or door pulse signal and export described high power pulse signal or export the high power pulse control circuit of described door pulse signal to described gate pulse control circuit to described excitation power supply circuit according to generating steering order;
Be used for the current regulating circuit of the size of current that regulates described excitation power supply circuit;
Be used for generating square-wave signal and export described square-wave signal to super pulse control circuit, export the described gate pulse control circuit of described door pulse signal or described square-wave signal according to selection instruction control to described excitation power supply circuit; And
Be used for the described super pulse control circuit that generates ultrawideband impulse signal and export described ultrawideband impulse signal to described excitation power supply circuit;
Described electronics optical gate control circuit connects described excitation power supply circuit, described current regulating circuit and described gate pulse control circuit, described high power pulse control circuit connects described excitation power supply circuit, described current regulating circuit and described gate pulse control circuit, described super pulse control circuit connects described excitation power supply circuit and described gate pulse control circuit, and described gate pulse control circuit and described current regulating circuit connect described excitation power supply circuit.
Another object of the present invention is to provide a kind of power device, described power device comprises excitation power supply circuit, and described power device also comprises above-mentioned simulative debugging circuit; The external excitation power supply circuit of described simulative debugging circuit.
In the present invention, export electronics optical gate signal by electronics optical gate control circuit to excitation power supply circuit and gate pulse control circuit; By high power pulse control circuit to excitation power supply circuit output high power pulse signal or to gate pulse control circuit out gate pulse signal; By this electronics optical gate signal controlling gate pulse control circuit whether to excitation power supply circuit out gate pulse signal; Gate pulse control circuit generates square-wave signal, and square-wave signal after adjusting to super pulse control circuit output amplitude, and meanwhile, control is to excitation power supply circuit out gate pulse signal or square-wave signal; Super pulse control circuit, by after the square-wave signal after square-wave signal and two divided-frequency is superposeed, generates ultrawideband impulse signal and exports excitation power supply circuit to; More optimizedly, by regulating the amplitude of current regulating circuit adjustment to electronics optical gate signal, high power pulse signal, door pulse signal and the ultrawideband impulse signal of the output of excitation power supply circuit.Thereby the simulative debugging circuit control that the embodiment of the present invention provides is exported different signals to excitation power supply, be convenient to debugging.
Brief description of the drawings
Fig. 1 is the circuit structure diagram of the simulative debugging circuit that provides of the embodiment of the present invention;
Fig. 2 is the circuit diagram that simulative debugging circuit that the embodiment of the present invention provides comprises electronics optical gate control circuit, high power pulse control circuit and current regulating circuit;
Fig. 3 is the circuit diagram of the gate pulse control circuit in the simulative debugging circuit that provides of the embodiment of the present invention;
Fig. 4 is the circuit diagram of the super pulse control circuit in the simulative debugging circuit that provides of the embodiment of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
Fig. 1 shows the structure of the simulative debugging circuit that the embodiment of the present invention provides, and for convenience of explanation, only shows the part relevant to the embodiment of the present invention, and details are as follows.
A kind of simulative debugging circuit, the external excitation power supply circuit of described simulative debugging circuit, described simulative debugging circuit comprises:
For whether generating electronics optical gate signal according to switch order control and exporting the electronics optical gate control circuit 1 of described electronics optical gate signal to described excitation power supply circuit and gate pulse control circuit 3;
For generating high power pulse signal or door pulse signal and export described high power pulse signal or export the high power pulse control circuit 2 of described door pulse signal to gate pulse control circuit 3 to described excitation power supply circuit according to generating steering order;
Be used for the current regulating circuit 5 of the size of current that regulates described excitation power supply circuit;
Be used for generating square-wave signal and export described square-wave signal to super pulse control circuit 4, export the gate pulse control circuit 3 of described door pulse signal or described square-wave signal according to selection instruction control to described excitation power supply circuit; And
Be used for the super pulse control circuit 4 that generates ultrawideband impulse signal and export described ultrawideband impulse signal to described excitation power supply circuit;
Electronics optical gate control circuit 1 connects described excitation power supply circuit, current regulating circuit 5 and gate pulse control circuit 3, high power pulse control circuit 2 connects described excitation power supply circuit, current regulating circuit 5 and gate pulse control circuit 3, super pulse control circuit 4 connects described excitation power supply circuit and gate pulse control circuit 3, and gate pulse control circuit 3 and current regulating circuit 5 connect described excitation power supply circuit.
It should be noted that, described switch order can be: user manually connects physical switch, the switch order of generation, or the switch order producing by programmable logic controller (PLC) (Programmable Logic Controller, PLC).
It should be noted that, described generation steering order can be: user manually connects the gating switch of physics, produce the generation steering order that generates high power pulse signal or the generation steering order that generates door pulse signal, or produce the generation steering order that generates high power pulse signal or the generation steering order that generates door pulse signal by PLC.
It should be noted that, described selection instruction can be: user manually connects the gating switch of physics, selects the selection instruction of out gate pulse signal or square-wave signal, or produces by PLC the selection instruction of selecting out gate pulse signal or square-wave signal.
The simulative debugging circuit that Fig. 2 shows the embodiment of the present invention to be provided comprises the physical circuit of electronics optical gate control circuit 1, high power pulse control circuit 2 and current regulating circuit 5, for convenience of explanation, only show the part relevant to the embodiment of the present invention, details are as follows.
As one embodiment of the invention, described current regulating circuit 5 comprises:
Battery BT1, three terminal regulator TL1, three terminal regulator TL2, three terminal regulator TL3, three terminal regulator TL4, potentiometer RL1 and current-limiting resistance R3;
The positive pole of described battery BT1 and negative pole connect respectively power supply VCC and ground, the first termination power VCC of described current-limiting resistance R3, the reference utmost point of described three terminal regulator TL1 connects negative electrode, the negative electrode of described three terminal regulator TL1 and anode connect respectively the second end of described current-limiting resistance R3 and the negative electrode of described three terminal regulator TL2, the reference utmost point of described three terminal regulator TL2 connects negative electrode, the anode of described three terminal regulator TL2 connects the negative electrode of described three terminal regulator TL3, the reference utmost point of described three terminal regulator TL3 connects negative electrode, the reference utmost point of described three terminal regulator TL4 connects negative electrode, the negative electrode of described three terminal regulator TL4 and anode connect respectively anode and the ground of described three terminal regulator TL3, the first end of described potentiometer RL1 and the second end connect respectively the second end and the ground of described current-limiting resistance R3, electronics optical gate control circuit 1 and described high power pulse control circuit 2 described in the first termination of described current-limiting resistance R3, excitation power supply circuit described in the slip termination of described potentiometer RL1.
More optimizedly, the slip termination electric current of described potentiometer RL1 regulates pin CP1, regulates pin CP1 to excitation power supply circuit output current conditioning signal by this electric current.
It should be noted that, the voltage of battery BT1 output, by after three terminal regulator TL1, three terminal regulator TL2, three terminal regulator TL3 and three terminal regulator TL4 voltage stabilizing, is powered to potentiometer RL1; By the sliding end of migration potential device RL1, electric current regulates pin CP1 to excitation power supply circuit output current conditioning signal, by this current regulating signal, the electric current in excitation power supply circuit is carried out to linear regulation.
As one embodiment of the invention, described electronics optical gate control circuit 1 comprises:
Current-limiting resistance R1 and three-terminal switch SW1;
The first end of described current-limiting resistance R1 and the second end connect respectively the first end of described current-limiting resistance R3 and the first movable end of described three-terminal switch SW1, excitation power supply circuit and described gate pulse control circuit 3 described in the fixing termination of described three-terminal switch SW1.
More optimizedly, the fixing termination electronic light lock pin EP0 of described three-terminal switch SW1, exports electronics optical gate signal to excitation power supply circuit and gate pulse control circuit 3 by this electronics optical gate pin EP0 simultaneously.
It should be noted that, current regulating circuit 5 generates after original electron optical gate signal, this original electron optical gate signal is after current-limiting resistance R1 adjusts current/voltage, when the stiff end of three-terminal switch SW1 and the first movable end are when closed, electronics optical gate pin EP0 exports electronics optical gate signal to excitation power supply circuit and gate pulse control circuit 3 simultaneously.
As one embodiment of the invention, described high power pulse control circuit 2 comprises:
Current-limiting resistance R2 and three-terminal switch SW2;
The first end of described current-limiting resistance R2 and the second end connect respectively the first end of described current-limiting resistance R3 and the stiff end of described three-terminal switch SW2, and the first movable end of described three-terminal switch SW2 and the second movable end connect respectively described excitation power supply circuit and described gate pulse control circuit 3.
More optimizedly, the first activity termination high power pulse pin SP1 of described three-terminal switch SW2, exports high power pulse signal by this high power pulse pin SP1 to excitation power supply circuit.The second activity termination gate pulse pin DP1 of described three-terminal switch SW2, by this gate pulse pin DP1 to gate pulse control circuit 3 out gate pulse signals.
It should be noted that, current regulating circuit 5 generates after original burst signal, this original burst signal is adjusted after current/voltage through current-limiting resistance R2, and in the time that stiff end and the first movable end of three-terminal switch SW2 is closed, high power pulse pin SP1 exports high power pulse signal to excitation power supply circuit.Current regulating circuit 5 generates after original burst signal, this original burst signal is after current-limiting resistance R2 adjusts current/voltage, when the stiff end of three-terminal switch SW2 and the second movable end are when closed, gate pulse pin DP1 is to gate pulse control circuit 3 out gate pulse signals.
Fig. 3 shows the physical circuit of the gate pulse control circuit 3 in the simulative debugging circuit that the embodiment of the present invention provides, and for convenience of explanation, only shows the part relevant to the embodiment of the present invention, and details are as follows.
As one embodiment of the invention, described gate pulse control circuit 3 comprises:
NPN type triode Q1, current-limiting resistance R4, three-terminal switch SW3, divider resistance R5, divider resistance R6, divider resistance R7, divider resistance R8, filter capacitor C1, filter capacitor C2, filter capacitor C3 and 555 timer chip U1;
The stiff end of three-terminal switch SW1 described in the first termination of described current-limiting resistance R4, the collector of described NPN type triode Q1, base stage and emitter connect respectively the second movable end of described three-terminal switch SW2, the second end of described current-limiting resistance R4 and the first movable end of described three-terminal switch SW3, the second movable end of described three-terminal switch SW3 and stiff end connect respectively first end and the described excitation power supply circuit of described filter capacitor C1, the first end of described divider resistance R5 and the second end connect respectively described super pulse control circuit 4 and ground, the first end of described divider resistance R6 and the second end meet respectively the first end of described divider resistance R5 and the output pin OUT of 555 timer chip U1, reset pin RD and the power pins VCC of described 555 timer chip U1 meet power supply VCC, the triggering pin TR of described 555 timer chip U1 and thresholding pin TH connect the first end of described filter capacitor C3, the ground pin GND of described 555 timer chip U1, electric discharge pin D and control pin CO ground connection respectively, the first end of the first end of described divider resistance R8 and described filter capacitor C2, the second end ground connection of the second end of described filter capacitor C2 and described filter capacitor C3, the first end of filter capacitor C3 described in the second termination of described divider resistance R8, the first end of described divider resistance R7 and the second end connect respectively the first end of power supply VCC and described divider resistance R8.
More optimizedly, the collector of described NPN type triode Q1 meets gate pulse pin DP1, receives by this gate pulse pin DP1 the door pulse signal that high power pulse control circuit 2 is exported.The first termination electronic light lock pin EP0 of current-limiting resistance R4, receives by this electronics optical gate pin EP0 the electronics optical gate signal that electronics optical gate control circuit 1 is exported.The fixing termination gate pulse pin DP0 of three-terminal switch SW3, by this gate pulse pin DP0 to excitation power supply circuit out gate pulse signal.The first termination square wave pin SP0 of divider resistance R5, by this square wave pin, SP0 exports square-wave signal to super pulse control circuit 4.
It should be noted that, when the base stage of NPN type triode Q1 receives electronics optical gate control circuit 1 electronics optical gate signal that export, high level by current-limiting resistance R4, NPN type triode Q1 conducting, meanwhile, if when the stiff end of three-terminal switch SW3 and the first movable end are closed, gate pulse pin DP0 is to excitation power supply circuit out gate pulse signal.Therefore, the electronics optical gate signal producing by optical gate control circuit, controls the ON/OFF of NPN type triode Q1, thereby control gate pulse pin DP0 is to whether out gate pulse signal of excitation power supply circuit.
555 timer chip U1, divider resistance R7, divider resistance R8, filter capacitor C1, filter capacitor C2 and filter capacitor C3 composition generate the circuit of square-wave signal; By regulating the resistance of divider resistance R7 and divider resistance R8, the capacitance of adjusting filter capacitor C3, control the output pin OUT output different frequency of 555 timer chip U1, the square-wave signal of different duty.If the stiff end of three-terminal switch SW3 and the second movable end are when closed, the output pin OUT of 555 timer chip U1 by gate pulse pin DP0 to excitation power supply circuit output square-wave signal.In addition, by divider resistance R5 and divider resistance R6, the square-wave signal of the output pin OUT output to 555 timer chip U1 does range-adjusting, square-wave signal after adjusting to super pulse control circuit 4 output amplitudes by square wave pin SP0, the highest amplitude of the square-wave signal after this range-adjusting is the magnitude of voltage at divider resistance R5 two ends.
Fig. 4 shows the physical circuit of the super pulse control circuit 4 in the simulative debugging circuit that the embodiment of the present invention provides, and for convenience of explanation, only shows the part relevant to the embodiment of the present invention, and details are as follows.
As one embodiment of the invention, described super pulse control circuit 4 comprises:
Current-limiting resistance R9, current-limiting resistance R10, current-limiting resistance R11, divider resistance R12, divider resistance R13, divider resistance R14, divider resistance R15, divider resistance R16, divider resistance R17, filter capacitor C4, filter capacitor C5, filter capacitor C6, amplifier chip U3, amplifier chip U4, d type flip flop chip U2 and switch S 1;
The first end of divider resistance R5 described in the first termination of described current-limiting resistance R10, the first end of described current-limiting resistance R10 and the second end meet respectively the first end of described divider resistance R5 and the high voltage input pin VI+ of described amplifier chip U3, described current-limiting resistance R11 is connected between the low-voltage input pin VI-and output pin VO of described amplifier chip U3, the first end of described filter capacitor C4 and the second end connect respectively output pin VO and the ground of described amplifier chip U3, the first end of described current-limiting resistance R9 and the second end meet respectively the first end of described current-limiting resistance R10 and the clock pin CLK of described d type flip flop chip U2, the input pin D of described d type flip flop chip U2 meets reverse output pin Q2, the first end of described filter capacitor C5 and the second end connect respectively forward output pin Q1 and the ground of described d type flip flop chip U2, the first end of described divider resistance R13 and the second end meet respectively the first end of described filter capacitor C5 and the high voltage input pin VI+ of described amplifier chip U4, described divider resistance R12 is connected between the second end of described filter capacitor C4 and the second end of described divider resistance R13, the first end of described divider resistance R15 and the second end connect respectively the second end and the ground of described divider resistance R13, the first end of described divider resistance R14 and the second end connect respectively low-voltage input pin VI-and the ground of described amplifier chip U4, described divider resistance R16 is connected between the low-voltage input pin VI-and output pin VO of described amplifier chip U4, after described divider resistance R17 and described filter capacitor C6 parallel connection, be connected between the output pin VO and ground of described amplifier chip U4, the first end of described switch S 1 and the second end connect respectively output pin VO and the described excitation power supply circuit of described amplifier chip U4.
More optimizedly, the super pulse pin of the second termination SP2 of switch S 1, exports ultrawideband impulse signal by this super pulse pin SP2 to excitation power supply circuit.
More optimizedly, the first termination square wave pin SP0 of current-limiting resistance R10, the square-wave signal after the range-adjusting of exporting by this square wave pin SP0 receiving gate pulse control circuit 3; This square-wave signal after current-limiting resistance R10, then after the voltage follower of current-limiting resistance R11 and amplifier chip U3 composition, the stronger square-wave signal of output driving force; Meanwhile, this square-wave signal, after current-limiting resistance R9, then carries out two divided-frequency through d type flip flop chip U2, to export the square-wave signal of 1/2nd frequencies of the square-wave signal that square wave pin SP0 receives; By the adding circuit of amplifier chip U4, divider resistance R12, divider resistance R13, divider resistance R14, divider resistance R15 and divider resistance R16 composition, square-wave signal after the two divided-frequency of the square-wave signal to amplifier chip U3 output and d type flip flop chip U2 output is added, generate original ultrawideband impulse signal, when after switch S 1 closure, after the filtering circuit of this original ultrawideband impulse signal by divider resistance R17 and filter capacitor C6 composition, generate ultrawideband impulse signal, and export this ultrawideband impulse signal by super pulse pin SP2 to excitation power supply circuit.
As another embodiment of the present invention, the embodiment of the present invention also provides a kind of power device, and described power device comprises excitation power supply circuit, and described power device also comprises above-mentioned simulative debugging circuit; The external excitation power supply circuit of described simulative debugging circuit.
In embodiments of the present invention, export electronics optical gate signal by the three-terminal switch SW1 of electronics optical gate control circuit to excitation power supply circuit and gate pulse control circuit; Three-terminal switch SW2 by high power pulse control circuit is to excitation power supply circuit output high power pulse signal or to gate pulse control circuit out gate pulse signal; By the ON/OFF of NPN type triode Q1 in this electronics optical gate signal controlling gate pulse control circuit, with control gate pulse control circuit whether to excitation power supply circuit out gate pulse signal; Gate pulse control circuit generates square-wave signal, and to the square-wave signal after the adjustment of super pulse control circuit output amplitude; By three-terminal switch SW3, control to excitation power supply circuit out gate pulse signal or square-wave signal; Super pulse control circuit, by after the square-wave signal after square-wave signal and two divided-frequency is superposeed, generates ultrawideband impulse signal, to export excitation power supply circuit to; More optimizedly,, by regulating the potentiometer RL1 in current regulating circuit, adjust to the amplitude of electronics optical gate signal, high power pulse signal, door pulse signal and the ultrawideband impulse signal of excitation power supply circuit output.Thereby the simulative debugging circuit control that the embodiment of the present invention provides is exported different signals to excitation power supply, be convenient to debugging.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.
Claims (7)
1. a simulative debugging circuit, the external excitation power supply circuit of described simulative debugging circuit, is characterized in that, described simulative debugging circuit comprises:
For whether generating electronics optical gate signal according to switch order control and exporting the electronics optical gate control circuit of described electronics optical gate signal to described excitation power supply circuit and gate pulse control circuit;
For generating high power pulse signal or door pulse signal and export described high power pulse signal or export the high power pulse control circuit of described door pulse signal to described gate pulse control circuit to described excitation power supply circuit according to generating steering order;
Be used for the current regulating circuit of the size of current that regulates described excitation power supply circuit;
Be used for generating square-wave signal and export described square-wave signal to super pulse control circuit, export the described gate pulse control circuit of described door pulse signal or described square-wave signal according to selection instruction control to described excitation power supply circuit; And
Be used for the described super pulse control circuit that generates ultrawideband impulse signal and export described ultrawideband impulse signal to described excitation power supply circuit;
Described electronics optical gate control circuit connects described excitation power supply circuit, described current regulating circuit and described gate pulse control circuit, described high power pulse control circuit connects described excitation power supply circuit, described current regulating circuit and described gate pulse control circuit, described super pulse control circuit connects described excitation power supply circuit and described gate pulse control circuit, and described gate pulse control circuit and described current regulating circuit connect described excitation power supply circuit.
2. simulative debugging circuit as claimed in claim 1, is characterized in that, described current regulating circuit comprises:
Battery BT1, three terminal regulator TL1, three terminal regulator TL2, three terminal regulator TL3, three terminal regulator TL4, potentiometer RL1 and current-limiting resistance R3;
The positive pole of described battery BT1 and negative pole connect respectively VDD-to-VSS, the first termination power of described current-limiting resistance R3, the reference utmost point of described three terminal regulator TL1 connects negative electrode, the negative electrode of described three terminal regulator TL1 and anode connect respectively the second end of described current-limiting resistance R3 and the negative electrode of described three terminal regulator TL2, the reference utmost point of described three terminal regulator TL2 connects negative electrode, the anode of described three terminal regulator TL2 connects the negative electrode of described three terminal regulator TL3, the reference utmost point of described three terminal regulator TL3 connects negative electrode, the reference utmost point of described three terminal regulator TL4 connects negative electrode, the negative electrode of described three terminal regulator TL4 and anode connect respectively anode and the ground of described three terminal regulator TL3, the first end of described potentiometer RL1 and the second end connect respectively the second end and the ground of described current-limiting resistance R3, electronics optical gate control circuit and described high power pulse control circuit described in the first termination of described current-limiting resistance R3, excitation power supply circuit described in the slip termination of described potentiometer RL1.
3. simulative debugging circuit as claimed in claim 2, is characterized in that, described electronics optical gate control circuit comprises:
Current-limiting resistance R1 and three-terminal switch SW1;
The first end of described current-limiting resistance R1 and the second end connect respectively the first end of described current-limiting resistance R3 and the first movable end of described three-terminal switch SW1, excitation power supply circuit and described gate pulse control circuit described in the fixing termination of described three-terminal switch SW1.
4. simulative debugging circuit as claimed in claim 2, is characterized in that, described high power pulse control circuit comprises:
Current-limiting resistance R2 and three-terminal switch SW2;
The first end of described current-limiting resistance R2 and the second end connect respectively the first end of described current-limiting resistance R3 and the stiff end of described three-terminal switch SW2, and the first movable end of described three-terminal switch SW2 and the second movable end connect respectively described excitation power supply circuit and described gate pulse control circuit.
5. simulative debugging circuit as claimed in claim 3, is characterized in that, described gate pulse control circuit comprises:
NPN type triode Q1, current-limiting resistance R4, three-terminal switch SW3, divider resistance R5, divider resistance R6, divider resistance R7, divider resistance R8, filter capacitor C1, filter capacitor C2, filter capacitor C3 and 555 timer chip U1;
The stiff end of three-terminal switch SW1 described in the first termination of described current-limiting resistance R4, the collector of described NPN type triode Q1, base stage and emitter connect respectively the second movable end of described three-terminal switch SW2, the second end of described current-limiting resistance R4 and the first movable end of described three-terminal switch SW3, the second movable end of described three-terminal switch SW3 and stiff end connect respectively first end and the described excitation power supply circuit of described filter capacitor C1, the first end of described divider resistance R5 and the second end connect respectively described super pulse control circuit and ground, the first end of described divider resistance R6 and the second end connect respectively the first end of described divider resistance R5 and the output pin of 555 timer chip U1, reset pin and the power pins of described 555 timer chip U1 connect power supply, the triggering pin of described 555 timer chip U1 and thresholding pin connect the first end of described filter capacitor C3, the ground pin of described 555 timer chip U1, electric discharge pin and control pin ground connection respectively, the first end of the first end of described divider resistance R8 and described filter capacitor C2, the second end ground connection of the second end of described filter capacitor C2 and described filter capacitor C3, the first end of filter capacitor C3 described in the second termination of described divider resistance R8, the first end of described divider resistance R7 and the second end connect respectively the first end of power supply and described divider resistance R8.
6. simulative debugging circuit as claimed in claim 5, is characterized in that, described super pulse control circuit comprises:
Current-limiting resistance R9, current-limiting resistance R10, current-limiting resistance R11, divider resistance R12, divider resistance R13, divider resistance R14, divider resistance R15, divider resistance R16, divider resistance R17, filter capacitor C4, filter capacitor C5, filter capacitor C6, amplifier chip U3, amplifier chip U4, d type flip flop chip U2 and switch S 1;
The first end of divider resistance R5 described in the first termination of described current-limiting resistance R10, the first end of described current-limiting resistance R10 and the second end connect respectively the first end of described divider resistance R5 and the high voltage input pin of described amplifier chip U3, described current-limiting resistance R11 is connected between the low-voltage input pin and output pin of described amplifier chip U3, the first end of described filter capacitor C4 and the second end connect respectively output pin and the ground of described amplifier chip U3, the first end of described current-limiting resistance R9 and the second end connect respectively the first end of described current-limiting resistance R10 and the clock pin of described d type flip flop chip U2, the input pin of described d type flip flop chip U2 connects reverse output pin, the first end of described filter capacitor C5 and the second end connect respectively forward output pin and the ground of described d type flip flop chip U2, the first end of described divider resistance R13 and the second end connect respectively the first end of described filter capacitor C5 and the high voltage input pin of described amplifier chip U4, described divider resistance R12 is connected between the second end of described filter capacitor C4 and the second end of described divider resistance R13, the first end of described divider resistance R15 and the second end connect respectively the second end and the ground of described divider resistance R13, the first end of described divider resistance R14 and the second end connect respectively low-voltage input pin and the ground of described amplifier chip U4, described divider resistance R16 is connected between the low-voltage input pin and output pin of described amplifier chip U4, after described divider resistance R17 and described filter capacitor C6 parallel connection, be connected between the output pin and ground of described amplifier chip U4, the first end of described switch S 1 and the second end connect respectively output pin and the described excitation power supply circuit of described amplifier chip U4.
7. a power device, described power device comprises excitation power supply circuit, it is characterized in that, described power device also comprises the simulative debugging circuit as described in claim 1 to 9 any one;
The external excitation power supply circuit of described simulative debugging circuit.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107565369A (en) * | 2017-08-17 | 2018-01-09 | 大族激光科技产业集团股份有限公司 | A kind of impulse waveform modulating system of laser |
| CN113110242A (en) * | 2021-05-14 | 2021-07-13 | 中国核动力研究设计院 | High-efficiency analog quantity signal output device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2099244A (en) * | 1981-05-01 | 1982-12-01 | Nippon Infrared Ind | Laser apparatus |
| CN86207551U (en) * | 1986-10-17 | 1987-07-29 | 湖南省技术物理研究所 | Light intensity controlling device for carbon-dioxide laser |
| WO1997019526A1 (en) * | 1995-11-21 | 1997-05-29 | University Of Rochester | Improvements in transmission of optical signals |
| US6072427A (en) * | 1999-04-01 | 2000-06-06 | Mcewan; Thomas E. | Precision radar timebase using harmonically related offset oscillators |
| CN1260614A (en) * | 1999-01-12 | 2000-07-19 | 宫地技术株式会社 | Laser apparatus |
| CN102545010A (en) * | 2011-12-25 | 2012-07-04 | 深圳市大族激光科技股份有限公司 | Oil tank control device of laser |
-
2013
- 2013-06-05 CN CN201310220323.7A patent/CN104216450B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2099244A (en) * | 1981-05-01 | 1982-12-01 | Nippon Infrared Ind | Laser apparatus |
| CN86207551U (en) * | 1986-10-17 | 1987-07-29 | 湖南省技术物理研究所 | Light intensity controlling device for carbon-dioxide laser |
| WO1997019526A1 (en) * | 1995-11-21 | 1997-05-29 | University Of Rochester | Improvements in transmission of optical signals |
| CN1260614A (en) * | 1999-01-12 | 2000-07-19 | 宫地技术株式会社 | Laser apparatus |
| US6072427A (en) * | 1999-04-01 | 2000-06-06 | Mcewan; Thomas E. | Precision radar timebase using harmonically related offset oscillators |
| CN102545010A (en) * | 2011-12-25 | 2012-07-04 | 深圳市大族激光科技股份有限公司 | Oil tank control device of laser |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107565369A (en) * | 2017-08-17 | 2018-01-09 | 大族激光科技产业集团股份有限公司 | A kind of impulse waveform modulating system of laser |
| CN113110242A (en) * | 2021-05-14 | 2021-07-13 | 中国核动力研究设计院 | High-efficiency analog quantity signal output device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104216450B (en) | 2016-02-17 |
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