CN104201259A - Luminous device and manufacturing method thereof - Google Patents

Luminous device and manufacturing method thereof Download PDF

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Publication number
CN104201259A
CN104201259A CN201410449026.4A CN201410449026A CN104201259A CN 104201259 A CN104201259 A CN 104201259A CN 201410449026 A CN201410449026 A CN 201410449026A CN 104201259 A CN104201259 A CN 104201259A
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CN
China
Prior art keywords
dislocation
substrate
luminescent device
semiconductor material
manufacture method
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Pending
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CN201410449026.4A
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Chinese (zh)
Inventor
徐正毅
郭德博
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BEIJING ZHONGKE TIANSHUN INFORMATION TECHNOLOGY Co Ltd
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BEIJING ZHONGKE TIANSHUN INFORMATION TECHNOLOGY Co Ltd
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Application filed by BEIJING ZHONGKE TIANSHUN INFORMATION TECHNOLOGY Co Ltd filed Critical BEIJING ZHONGKE TIANSHUN INFORMATION TECHNOLOGY Co Ltd
Priority to CN201410449026.4A priority Critical patent/CN104201259A/en
Publication of CN104201259A publication Critical patent/CN104201259A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds

Abstract

The invention discloses a luminous device manufacturing method and a luminous device prepared by the method. The method includes the steps: selecting a substrate and manually forming a dislocation source corresponding to a non-luminous area of the luminous device at any stage after cutting the substrate and before forming an active layer of a quantum well; forming other semiconductor material epitaxial layers of the luminous device by extension. The dislocation source forms a dislocation concentration area in the non-luminous area and releases stress in the other semiconductor material epitaxial layers, so that the dislocation density of a luminous area is reduced. By manually introducing dislocation in the non-luminous area of the luminous device and releasing the stress in the epitaxial layers of the luminous device, the dislocation density of the luminous area is reduced, and the quality of a chip of the luminous device is improved.

Description

A kind of luminescent device and manufacture method thereof
Technical field
The present invention relates to structure and the manufacture method in luminescent device field, particularly semiconductor light-emitting diode chip.
Background technology
In light-emitting diode (being called for short LED) is manufactured, what generally adopt is the mode of heteroepitaxy gallium nitride (GaN) on the substrates such as SiC, sapphire or Si at present.No matter adopt which kind of epitaxial substrate, all have the matching problem with GaN lattice, as shown in Figure 1, substrate 10 is different from the lattice constant of GaN epitaxial loayer 20, finally causes having formed dislocation 30 in GaN epitaxial loayer.In the prior art, for reducing the crystal dislocation in GaN epitaxial loayer, adopt high SiC substrate or the GaN homo-substrate of Lattice Matching degree, but these two kinds of substrates are expensive, cause the cost of LED high.Also can adopt patterned Sapphire Substrate or insert the methods such as transition zone, still, still there is a large amount of crystal dislocations in the GaN epitaxial loayer that extension forms in Sapphire Substrate, and dislocation density reaches 10 8-10 10/ cm 2.Fig. 2 is the cross section high magnification micrographs of extension GaN epitaxial loayer 20 of (not shown) in Sapphire Substrate, can find out, has a large amount of crystal dislocation 30 in GaN epitaxial loayer 20.As shown in Figure 3, dislocation 30 in GaN epitaxial loayer 20 even can be through the quantum well layer 40 as light-emitting zone, on P type GaN layer 50 surface, cause defect hole 60, these dislocations that run through light-emitting zone can cause LED electric leakage even to be lost efficacy, and dislocation is evenly distributed in GaN epitaxial loayer substantially, affect photoelectric properties and the reliability of LED, also cause LED decrease in efficiency when increasing Injection Current, produce " Droop " effect.
Summary of the invention
For above-mentioned the deficiencies in the prior art, the present invention proposes a kind of AlxInyGa1-x-yN (0≤x≤1, the 0≤y≤1) method of epitaxial loayer and light-emitting diode of being prepared by the method for forming in foreign substrate.The method artificially forms dislocation by the non-luminous region at LED and in working region, obtains the high-quality AlxInyGa1-x-yN epitaxial loayer of low-dislocation-density, thereby can improve LED photoelectric properties and reliability, reduce because defect produces " Droop " effect causing.
In order to reach foregoing invention object, technical scheme of the present invention realizes in the following way:
The manufacture method that the invention provides a kind of luminescent device, it comprises the following steps:
Select substrate;
On substrate, the position of the non-luminous region of corresponding luminescent device artificially forms dislocation source;
Thering is extension N type semiconductor material above the substrate of dislocation source, active area and P type semiconductor material, between described semi-conducting material and substrate, there is lattice mismatch;
Described dislocation source causes dislocation concentration zones at non-luminous region, and the stress in N type semiconductor material, active area and the P type semiconductor material of release extension reduces the dislocation density of light-emitting zone.
Wherein, described non-luminous region is for removing the region of active area, and the region of described removal active area comprises N table top, scribe line and isolated groove.
The method of described artificial formation dislocation source comprises the method for laser ablation, etching, Implantation or deposition foreign matter.
Described dislocation source is of a size of several nanometers to a few micron number magnitudes.
Described foreign matter is silica, silicon nitride, aluminium nitride or metal micro-nano particle.
Described substrate is sapphire, carborundum, silicon, aluminium nitride or compound substrate.
Described semi-conducting material is AlxInyGa1-x-yN (0≤x≤1,0≤y≤1).
The present invention also provides a kind of luminescent device, and it comprises:
Substrate; Be positioned at the dislocation source of the locational artificial formation of the non-luminous region of corresponding luminescent device on substrate;
Thering is extension N type semiconductor material above the substrate of described dislocation source, active area and P type semiconductor material, between described semi-conducting material and substrate, there is lattice mismatch; Described dislocation source causes dislocation concentration zones at non-luminous region, and the stress in N type semiconductor material, active area and the P type semiconductor material of release extension reduces the dislocation density of light-emitting zone.
Wherein, described non-luminous region comprises N table top, scribe line and isolated groove.
The method of described artificial formation dislocation source comprises laser ablation, etching, Implantation or deposition foreign matter.
In addition, the present invention also provides a kind of manufacture method of luminescent device, and it comprises the following steps:
Select substrate;
From the cutting of described substrate to any stage before forming mqw active layer, in the position of the non-luminous region of corresponding luminescent device, artificially form dislocation source;
And then extension forms other epitaxial growth of semiconductor material layers of luminescent device;
Described dislocation source causes dislocation concentration zones at non-luminous region, discharges the stress in other epitaxial growth of semiconductor material layers, and the dislocation density of light-emitting zone is reduced.
Wherein, described non-luminous region comprises N table top, scribe line and isolated groove.
The method of described artificial formation dislocation source comprises laser ablation, etching, Implantation or deposition foreign matter.
According to the method for artificially introducing dislocation at non-luminous region of the present invention, can control luminescent device chip Dislocations and distribute, reduce the dislocation density of the light-emitting zone of luminescent device chip, the quality of luminescent device chip is had to obvious improvement.
Accompanying drawing explanation
While forming GaN epitaxial loayer in Fig. 1 prior art in foreign substrate, due to lattice mismatch, form the schematic diagram of dislocation;
Fig. 2 and Fig. 3 are for showing the electromicroscopic photograph of the distribution of the GaN epitaxial loayer Dislocations forming in Sapphire Substrate in prior art;
Fig. 4 is for artificially forming the schematic diagram of dislocation source according to one of embodiment of the present invention at substrate surface;
Fig. 5 is dislocation according to the artificial formation of one of embodiment of the present invention extension schematic diagram in epitaxial loayer;
Fig. 6 is the LED sectional view forming according to one of embodiment of the present invention.
Embodiment
Below, with reference to Fig. 3 to Fig. 6, explanation is used for implementing best mode of the present invention.But mode shown below is only the example to light-emitting diode of the present invention and manufacture method thereof, the present invention is not limited to this mode.
As shown in Figure 4, artificially on substrate 100 form dislocation source 601, but dislocation source 601 also can be formed in the middle of resilient coating and N-shaped layer or top, can after substrate crystal cutting, to extension, do quantum well before the arbitrarily suitable stage all can form dislocation source 601.
Described substrate 100 is not limited to Sapphire Substrate, can also be the material that SiC substrate, Si substrate and compound substrate etc. and epitaxial material have lattice mismatch.
The generation type of dislocation source 601 can adopt the modes such as laser dotting, etching, introducing foreign matter or Implantation, but the formation of this dislocation source 601 is not limited to aforesaid way.Laser dotting adopts laser ablation disk surfaces assigned address, and ablated position can not be carried out follow-up crystal growth well, thereby artificially forms dislocation source 601; Also can adopt dry method or wet etching artificially to form dislocation source 601 at disk assigned address, or the foreign matters such as some SiO2 or deposit some metal of growing at disk assigned address, also can inject some foreign atoms at disk assigned address, the crystal structure at these positions is upset, make by the way to specify dislocation can not carry out well follow-up crystal growth at these, thereby artificially form dislocation source 601.
Dislocation source 601 horizontal and vertical is of a size of several nanometers to several microns, 1nm-10um for example, and preferably hundreds of nanometer is between 3um.According to the size, material and the formation efficiency that form dislocation source 601, from formation method listed above, select, but be not limited to above-mentioned formation method.
Form the not light-emitting zone that the assigned address of described dislocation source 601 should be on disk, such as: in the crevice place between LED chip, LED chip, penetrate the electrode area of quantum well etc., dislocation source 601 is distributed in these not light-emitting zones, is preferably uniformly distributed, also can uneven distribution.
As shown in Figure 5, due to the existence of dislocation source described in non-luminous region 601, can affect the growth thereon of follow-up epitaxial loayer.For example, on substrate 100 surfaces, form dislocation source 601, when subsequent growth N type semiconductor material 200, active layer 400 and P type semiconductor material 500, at dislocation source 601 peripheries, concentrate and form artificial dislocation 300, can discharge more equably the stress of lattice mismatch, reduce the number of dislocations of working region, thereby reduce defect, improve the quality of LED chip.And even non-luminous region dislocation density is higher, but be just positioned at the LED part that luminous component maybe will not be removed, can not affect LED luminous.
Along with the fast development of the technology of GaN extension, luminous efficiency improves constantly, and the area of LED chip can be more and more less, allly by artificially manufacturing dislocation at non-luminous region, can obtain the LED chip that dislocation density is very little.Therefore, the distribution by dislocation on method control chip of the present invention, can significantly improve the mass formation of LED.
Embodiment
First, select substrate 100, substrate 100 is that the materials such as sapphire, SiC, AlN or Si form;
Secondly, on substrate 100 surfaces, be about to be formed uniformly dislocation source 601 as the region of N table top 901, scribe line 902 or isolation deep trouth (not shown); Can adopt deposit SiO 2mode form dislocation source 601, the SiO that is 100nm-2um at substrate 100 surface deposition thickness 2film, graphical SiO 2film, the dislocation source 601 that formation lateral dimension is 100nm-2um.Also can depositing metal Ni film, for example thickness tens nanometers are to 1um, and annealing makes it aggregate into nanosphere, or wet method pattern forms figure that lateral dimension is nanometer scale as dislocation source 601.Also can patterned Ni or SiO 2for utilizing the mode of etching or Implantation, mask forms the dislocation source 601 in similar " micro-hole ".
Then, above substrate 100, form epitaxial loayer, for example, grown buffer layer (not shown), N-type AlxInyGa1-x-yN (0≤x≤1 successively, 0≤y≤1) epitaxial loayer 200, multiple quantum well layer 400 and P type AlxInyGa1-x-yN (0≤x≤1,0≤y≤1) epitaxial loayer 500.Existence due to dislocation source 601, can dislocation source 601 near with above form dislocation, and likely run through N-type AlxInyGa1-x-yN (0≤x≤1,0≤y≤1) in epitaxial loayer 200, multiple quantum well layer 400 and P type AlxInyGa1-x-yN (0≤x≤1,0≤y≤1) epitaxial loayer 500 one or more layers.Stress is discharged in these regions, thereby the dislocation density in other regions is reduced.
Then, at P type AlxInyGa1-x-yN epitaxial loayer 500 upper surfaces, form P type contact layers, also current extending, for example ITO or NiAu transparency electrode.
Graphical crystal column surface, above dislocation source 601 correspondence positions, etching P type AlxInyGa1-x-yN epitaxial loayer 500, multiple quantum well layer 400 and part N-type AlxInyGa1-x-yN epitaxial-side 200 form N table top 901 or scribe line 902.
On wafer, form passivation layer 700, passivation layer 700 can adopt the dielectric layers such as silica, silicon nitride, aluminium nitride, the region that graphical passivation layer 700 exposes deposit P electrode 800 and N electrode 900.
Then, region at P electrode 800 and N electrode 900 forms metal electrode, electrode material can be selected the metal systems such as Cr/Pt/Au, N electrode 900 in the horizontal can be separated with P electrode 800, also can be overlapping, as shown in Figure 6, N electrode 900 overlaps P electrode 800 tops, between adopt passivation layer 700 insulation isolation.
Finally, wafer is carried out to edge and draw and split 600, be separated into single led chip.
Because making stress, dislocation source 601 discharged at N table top 901 and scribe line 902 regions, make the dislocation density reduction as the region with multiple quantum well layer 400 (active layer) of light-emitting zone, thereby effectively reduced the impact of high dislocation density on LED device performance.And, in order to obtain good CURRENT DISTRIBUTION, the electrode that penetrates quantum well will be uniformly distributed conventionally, in the artificial dislocation of these equally distributed electrode position manufactures, both can discharge more equably the stress of lattice mismatch, reduce the number of dislocations of working region, thereby reduce defect, improve the quality of LED chip, again because this region finally can be removed active layer and can not affect luminous.
In addition, this specification does not have the disclosed component limit of claims in the member of execution mode.Particularly, the size of the structure member of recording in execution mode, material, shape, its structural order and in abutting connection with order etc. as long as no concrete restriction, just only as illustrative examples, rather than by circumscription of the present invention in this.The size of the structure member shown in accompanying drawing and position relationship are to amplify and illustrate in order clearly to describe.

Claims (12)

1. a manufacture method for luminescent device, it comprises the following steps:
Select substrate;
On substrate, the position of the non-luminous region of corresponding luminescent device artificially forms dislocation source;
Thering is extension N type semiconductor material above the substrate of dislocation source, active area and P type semiconductor material, between described semi-conducting material and substrate, there is lattice mismatch;
Described dislocation source causes dislocation concentration zones at non-luminous region, and the stress in N type semiconductor material, active area and the P type semiconductor material of release extension reduces the dislocation density of light-emitting zone.
2. the manufacture method of luminescent device as claimed in claim 1, described non-luminous region is for removing the region of active area.
3. the manufacture method of luminescent device as claimed in claim 2, the region of described removal active area comprises N table top, scribe line and isolated groove.
4. the manufacture method of luminescent device as claimed in claim 1, the method for described artificial formation dislocation source comprises the method for laser ablation, etching, Implantation or deposition foreign matter.
5. the manufacture method of luminescent device as claimed in claim 1, described dislocation source is of a size of several nanometers to a few micron number magnitudes.
6. the manufacture method of luminescent device as claimed in claim 4, described foreign matter is silica, silicon nitride, aluminium nitride or metal micro-nano particle.
7. the manufacture method of luminescent device as claimed in claim 1, described substrate is sapphire, carborundum, silicon, aluminium nitride or compound substrate.
8. the manufacture method of luminescent device as claimed in claim 1, described semi-conducting material is AlxInyGa1-x-yN (0≤x≤1,0≤y≤1).
9. a luminescent device, it comprises:
Substrate;
Be positioned at the dislocation source of the locational artificial formation of the non-luminous region of corresponding luminescent device on substrate;
Thering is extension N type semiconductor material above the substrate of described dislocation source, active area and P type semiconductor material, between described semi-conducting material and substrate, there is lattice mismatch;
Described dislocation source causes dislocation concentration zones at non-luminous region, and the stress in N type semiconductor material, active area and the P type semiconductor material of release extension reduces the dislocation density of light-emitting zone.
10. luminescent device as claimed in claim 10, described non-luminous region comprises N table top, scribe line and isolated groove.
11. luminescent devices as claimed in claim 1, the method for described artificial formation dislocation source comprises laser ablation, etching, Implantation or deposition foreign matter.
The manufacture method of 12. 1 kinds of luminescent devices, it comprises the following steps:
Select substrate;
From the cutting of described substrate to any stage before forming mqw active layer, in the position of the non-luminous region of corresponding luminescent device, artificially form dislocation source;
And then extension forms other epitaxial growth of semiconductor material layers of luminescent device;
Described dislocation source causes dislocation concentration zones at non-luminous region, discharges the stress in other epitaxial growth of semiconductor material layers, and the dislocation density of light-emitting zone is reduced.
CN201410449026.4A 2014-09-05 2014-09-05 Luminous device and manufacturing method thereof Pending CN104201259A (en)

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CN201410449026.4A CN104201259A (en) 2014-09-05 2014-09-05 Luminous device and manufacturing method thereof

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Application Number Priority Date Filing Date Title
CN201410449026.4A CN104201259A (en) 2014-09-05 2014-09-05 Luminous device and manufacturing method thereof

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105355767A (en) * 2015-12-11 2016-02-24 厦门乾照光电股份有限公司 Manufacturing method for light-emitting diode with high luminous efficiency

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105355767A (en) * 2015-12-11 2016-02-24 厦门乾照光电股份有限公司 Manufacturing method for light-emitting diode with high luminous efficiency

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Application publication date: 20141210