CN104143979B - A kind of high-precision high frequency ring oscillator circuit - Google Patents
A kind of high-precision high frequency ring oscillator circuit Download PDFInfo
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- CN104143979B CN104143979B CN201410064645.1A CN201410064645A CN104143979B CN 104143979 B CN104143979 B CN 104143979B CN 201410064645 A CN201410064645 A CN 201410064645A CN 104143979 B CN104143979 B CN 104143979B
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Abstract
The present invention relates to a kind of high-precision high frequency ring oscillator circuit, the pierce circuit includes frequency pressure converter, wave filter, frequency divider and voltage controlled oscillator, the frequency pressure converter output is connected to wave filter, the wave filter output is connected to voltage controlled oscillator, the voltage controlled oscillator output is connected to outside circuit to provide the higher-order of oscillation, feeding back output is connected to frequency divider simultaneously, frequency divider output is connected to frequency pressure converter, the frequency pressure converter by divider input signal frequency compared with setpoint frequency output control signal.Compared with prior art, the present invention is with design difficulty is small, design efficiency is high, uses simple, low cost and other advantages.
Description
Technical field
The present invention relates to a kind of high frequency ring oscillator circuit, more particularly, to a kind of high-precision high frequency ring oscillator electricity
Road.
Background technology
Traditional ring oscillator is using odd level inverse delayed structures in series cyclization to obtain the concussion of some frequency.It is if uncommon
Prestige obtains high-precision concussion frequency, then needs to ensure the delay of every one-level in each condition of work (temperature, power supply, technique change
Change etc.) all as equal as possible, i.e., delay deviation is small；If required concussion frequency is higher, calculated according to same precision percentage,
The requirement of this deviation is just harsher, such as shake frequency in more than 30MHz, it is desirable to accuracy 1%, then total delay deviation be less than
0.3ns, this index are difficult to when operation conditions change is larger.So direct design of high-precision high frequency ring oscillator
It is relatively difficult to achieve.
Against the background of the prior art, expect high-precision high frequency ring oscillator, phaselocked loop (PLL) and lock can also be used
Frequency ring (FLL), such as accompanying drawing 1.They are closed-loop control systems, using a high-precision low-frequency oscillator as benchmark, are led to
The N double-frequency oscillations of a high frequency can be obtained by crossing N frequency multiplier circuits, when the accuracy of reference frequency is very high, N double-frequency oscillations output
Also very high accuracy can be obtained.Such as using crystal oscillator as benchmark, vibration precision is up to below 100ppm, i.e. accuracy
Higher than 0.01%.Although this closed-loop control system can obtain the higher-order of oscillation of very high degree of precision, benchmark must be additionally provided
Vibration, the complexity of system is added, and the system gross area is larger, is unfavorable for reducing system cost.
The content of the invention
It is an object of the present invention to overcome the above-mentioned drawbacks of the prior art and provide a kind of design difficulty is small, sets
Count efficiency high, using the low high-precision high frequency ring oscillator circuit of simple, cost, 30MHz frequencies above can be easily reached,
About ± 1% frequency accuracy.
The purpose of the present invention can be achieved through the following technical solutions：
A kind of high-precision high frequency ring oscillator circuit, it is characterised in that the pierce circuit includes frequency pressure converter, filter
Ripple device, frequency divider and voltage controlled oscillator, the frequency pressure converter output are connected to wave filter, and the wave filter output is connected to pressure
Controlled oscillator, the voltage controlled oscillator externally export the higher-order of oscillation, while feed back output and be connected to frequency divider, and the frequency divider is defeated
Go out to be connected to frequency pressure converter, the frequency pressure converter by divider input signal frequency compared with setpoint frequency it is defeated
Go out control signal.
The frequency pressure converter includes current source I0, switchs S0, S1, S2, direct-to-ground capacitance C0, C1, voltage source V0 and compares
Device X0, the current source I0 are connected to comparator X0 anode by switching S0, and the anode of the comparator X0 is connected to over the ground
Electric capacity C0, the comparator X0 anode are connected to direct-to-ground capacitance C1, the direct-to-ground capacitance C1 and switch by switching S1 simultaneously
S2 is in parallel, and the negative terminal of the comparator X0 is connected to voltage source V0.
The capacitance of the direct-to-ground capacitance C1 is C, and the capacitance of the direct-to-ground capacitance electric capacity C0 is k times of direct-to-ground capacitance C1.
The frequency pressure converter receives the square wave of the dutycycle 50% of frequency divider output, and be sent respectively to switch S0, S1,
S2, wherein it is positive square wave to be sent to S0 and S2, S1 is anti-phase square wave；
Between positive square wave high period, S0 closures, current source I0 charges to direct-to-ground capacitance C0, and the charging interval is that frequency divider is defeated
Go out the half period t/2 of vibration, the upper enhanced charges of C0 are V0/R* (t/2), and the electric charge on direct-to-ground capacitance C1 is released completely；
Between positive square wave low period, S0 disconnects, and S1 closures, S2 disconnects, and the electric charge on direct-to-ground capacitance C0 is assigned to C1,
After distribution, the voltage on C0 and C1 is the k/ (k+1) of former C0 voltages, and the electric charge of the upper reductions of C0 is C*Vc*k/ (k+1), wherein Vc
For former C0 voltages.
In each cycle, if C0 on enhanced charge ＞ reductions electric charge, voltage C0 rises, comparator X0 output height,
Voltage controlled oscillator is adjusted by wave filter, its frequency is increased, the cycle reduces, and such enhanced charge V0/R* (t/2) will subtract
It is few；If the electric charge of the upper enhanced charge ＜ reductions of C0, C0 voltages reduce, and comparator X0 outputs are low, make its frequency of voltage controlled oscillator
Rate declines, and cycle increase, such enhanced charge V0/R* (t/2) will increase；
Can be consistent with comparator X0 negative terminal voltage V0 after voltage stabilization on C0, now closed-loop control system loop is steady
It is fixed, V0/R* (t/2)=C*V0*k/ (k+1), frequency divider frequency f=1/t=(k+1)/(2kRC).
Compared with prior art, the present invention has advantages below.
1) solve technology barrier, reduce design difficulty, improve design efficiency.Degree of precision can easily be obtained
The higher-order of oscillation, while frequency is adjustable, scalability is strong.
2) ring oscillator gone out designed by has using simply, is easy to the system integration, lower-cost advantage.
Brief description of the drawings
Fig. 1 is phaselocked loop, the theory diagram of FLL；
Fig. 2 is the theory diagram of the present invention；
Fig. 3 is the structural representation of the frequency pressure converter in the present invention.
Embodiment
The present invention is described in detail with specific embodiment below in conjunction with the accompanying drawings.The present embodiment is with technical solution of the present invention
Premised on implemented, give detailed embodiment and specific operating process, but protection scope of the present invention is not limited to
Following embodiments.
As shown in Fig. 2 a kind of high-precision high frequency ring oscillator circuit, the pierce circuit includes frequency pressure converter I, filter
Ripple device II, frequency divider III and voltage controlled oscillator IV, frequency pressure converter I outputs are connected to wave filter II, wave filter II output connections
To voltage controlled oscillator IV, voltage controlled oscillator IV outputs are connected to outside circuit to provide the higher-order of oscillation, while another feedback output connection
To frequency divider III, frequency divider III outputs are connected to frequency pressure converter I, frequency pressure converter I and passed through to divider input signal frequency
Rate output control signal compared with setpoint frequency.
Described wave filter, voltage controlled oscillator, frequency divider, have a variety of implementations, here not against the background of the prior art
It is limited.Compared with the phaselocked loop shown in Fig. 1, frequency locking ring structure, the present invention with frequency pressure converter I instead of phase discriminator (or reflect
Frequency device) and external reference frequency.So the present embodiment introduces frequency pressure converter.
As shown in figure 3, frequency pressure converter includes current source I0, S0, S1, S2, direct-to-ground capacitance C0, C1, voltage source V0 are switched
Comparator X0 anode is connected to by switching S0 with comparator X0, current source I0, comparator X0 anode is connected to electricity over the ground
Hold C0, comparator X0 anode is connected to direct-to-ground capacitance C1 by switching S1 simultaneously, and direct-to-ground capacitance C1 is in parallel with switch S2, compares
Device X0 negative terminal is connected to voltage source V0.
Current source I0, comparator X0, and switch S0, S1, S2, are made up of CMOS technology circuit, can there is a variety of tools
Body structure.
Voltage source V0, it is a magnitude of voltage in comparator X0 common mode ranges, is the resistance string partial pressure of supply voltage.
Current source I0 current value is obtained by voltage source V0 divided by a resistance R.
Frequency pressure converter passes through filter by the comparison output control signal to divider input signal frequency and setpoint frequency
Ripple device adjusts the frequency size of voltage controlled oscillator, so that concussion output is stable and unrelated with supply voltage.
If direct-to-ground capacitance C1 capacitance is C, direct-to-ground capacitance C0 capacitance is k times of electric capacity C1.
The square wave of the dutycycle 50% of frequency divider output is supplied to switch S0, S1, S2, and wherein S0 and S2 are positives, S1
It is anti-phase.
Between positive square wave high period, S0 closures, current source I0 charges to electric capacity C0, and the charging interval is that frequency divider output is shaken
The upper enhanced charge of the half period t/2 swung, C0 is V0/R* (t/2).S1 disconnects, S2 closures, and the electric charge on electric capacity C1 is placed to ground
On.
Between positive square wave low period, S0 disconnects, and S1 closures, S2 disconnects, and the electric charge on electric capacity C0 is evenly distributed to C1,
It is k times of C1 to have been put due to the voltage of the C1 in a upper phase into 0, C0 capacitances, so after electric charge mean allocation, C0 and C1
On voltage be former C0 voltages k/ (k+1), i.e., the electric charge of reduction is C*Vc*k/ (k+1) on C0, and wherein Vc is former C0 voltages.
Each cycle, if on C0 enhanced charge ＞ reductions electric charge, voltage C0 rise, comparator X0 output
Height, voltage controlled oscillator is adjusted by wave filter, its frequency is increased, the cycle reduces, and such enhanced charge V0/R* (t/2) will
Tail off；If the electric charge of the upper enhanced charge ＜ reductions of C0, C0 voltages reduce, and comparator X0 outputs are low, adjusted by wave filter
Voltage controlled oscillator is saved, declines its frequency, cycle increase, such enhanced charge V0/R* (t/2) can become more again.
Voltage on final C0 can be stablized as the negative terminal voltage V0 with comparator X0 on position, now closed-loop control system
System loop stability, V0/R* (t/2)=C*V0*k/ (k+1), can extrapolate frequency divider frequency f=1/t=(k+1)/(2kRC).
It can be seen that the frequency of oscillation that this oscillator obtains is unrelated with supply voltage, according to a variety of resistance and electric capacity with flat
Weigh their temperature coefficient, then can obtain one and temperature also unrelated frequency.So the precision of oscillator depends on resistance
The matching degree of electric capacity, and frequency height then can reach the purpose of frequency multiplication by increasing the divider ratio of frequency divider.
Claims (2)
- A kind of 1. ring oscillator circuit, it is characterised in that the pierce circuit include frequency pressure converter, wave filter, frequency divider and Voltage controlled oscillator, the frequency pressure converter output are connected to wave filter, and the wave filter output is connected to voltage controlled oscillator, described Voltage controlled oscillator externally exports the higher-order of oscillation, while feeds back output and be connected to frequency divider, and the frequency divider output is connected to frequency and pressed Converter, the frequency pressure converter by divider input signal frequency compared with setpoint frequency output control signal；The frequency pressure converter includes current source I0, switchs S0, S1, S2, direct-to-ground capacitance C0, C1, voltage source V0 and comparator X0, The current source I0 is connected to comparator X0 anode by switching S0, and the anode of the comparator X0 is connected to direct-to-ground capacitance C0, the comparator X0 anode are connected to direct-to-ground capacitance C1, the direct-to-ground capacitance C1 with switching S2 simultaneously by switching S1 simultaneously Connection, the negative terminal of the comparator X0 are connected to voltage source V0；The capacitance of the direct-to-ground capacitance C1 is C, and the capacitance of the direct-to-ground capacitance electric capacity C0 is k times of direct-to-ground capacitance C1；The frequency pressure converter receives the square wave of the dutycycle 50% of frequency divider output, and is sent respectively to switch S0, S1, S2, It is positive square wave to be wherein sent to S0 and S2, and S1 is anti-phase square wave；Between positive square wave high period, S0 closures, current source I0 charges to direct-to-ground capacitance C0, and the charging interval is that frequency divider output is shaken The upper enhanced charge of the half period t/2 swung, C0 is V0/R* (t/2), and the electric charge on direct-to-ground capacitance C1 is released completely；Between positive square wave low period, S0 disconnects, and S1 closures, S2 disconnects, and the electric charge on direct-to-ground capacitance C0 is assigned to C1, distributes Afterwards, the voltage on C0 and C1 is the k/ (k+1) of former C0 voltages, and the electric charge of the upper reductions of C0 is C*Vc*k/ (k+1), and wherein Vc is original C0 voltages.
- 2. a kind of ring oscillator circuit according to claim 1, it is characterised in that in each cycle, if increased on C0 Electric charge>The electric charge of reduction, then voltage C0 rises, comparator X0 outputs are high, adjust voltage controlled oscillator by wave filter, make its frequency Rise, the cycle reduces, and such enhanced charge V0/R* (t/2) will be reduced；If the upper enhanced charges of C0<The electric charge of reduction, then C0 Voltage reduces, and comparator X0 outputs are low, declines its frequency of voltage controlled oscillator, cycle increase, such enhanced charge V0/R* (t/2) will increase；Meeting is consistent with comparator X0 negative terminal voltage V0 after voltage stabilization on C0, now closed-loop control system loop stability, V0/ R* (t/2)=C*V0*k/ (k+1), frequency divider frequency f=1/t=(k+1)/(2kRC).
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| CN201410064645.1A CN104143979B (en) | 2014-02-25 | 2014-02-25 | A kind of high-precision high frequency ring oscillator circuit |
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| CN201410064645.1A CN104143979B (en) | 2014-02-25 | 2014-02-25 | A kind of high-precision high frequency ring oscillator circuit |
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| CN104143979B true CN104143979B (en) | 2018-03-06 |
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| CN109474239A (en) * | 2018-11-09 | 2019-03-15 | 深圳市金科泰通信设备有限公司 | 5G standard source high-frequency crystal oscillator circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1326304A (en) * | 2000-05-30 | 2001-12-12 | 松下电器产业株式会社 | Frequency mixing device |
| CN203071868U (en) * | 2013-01-15 | 2013-07-17 | 成都三零嘉微电子有限公司 | Correctable and adjustable high-precision relaxation oscillator |
| CN203722608U (en) * | 2014-02-25 | 2014-07-16 | 上海菱沃铂智能技术有限公司 | High-precision high-frequency ring oscillator circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090315611A1 (en) * | 2008-06-24 | 2009-12-24 | Ralink Technology Corporation | Quadrature mixer circuit |
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2014
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1326304A (en) * | 2000-05-30 | 2001-12-12 | 松下电器产业株式会社 | Frequency mixing device |
| CN203071868U (en) * | 2013-01-15 | 2013-07-17 | 成都三零嘉微电子有限公司 | Correctable and adjustable high-precision relaxation oscillator |
| CN203722608U (en) * | 2014-02-25 | 2014-07-16 | 上海菱沃铂智能技术有限公司 | High-precision high-frequency ring oscillator circuit |
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