CN104143590B - A kind of simple and quick silicon face passivating method - Google Patents
A kind of simple and quick silicon face passivating method Download PDFInfo
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- CN104143590B CN104143590B CN201410389994.0A CN201410389994A CN104143590B CN 104143590 B CN104143590 B CN 104143590B CN 201410389994 A CN201410389994 A CN 201410389994A CN 104143590 B CN104143590 B CN 104143590B
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Abstract
The invention provides a kind of simple and effective silicon face passivating method and the silicon chip of the surface passivation silicon/organic matter hybrid battery field application.This method handles silicon face with aqueous oxidizing agent solution, and forms SiO on surfacexPassivation layer.SiO prepared by the present inventionxPassivation layer uniformity is good, densification；Thinner thickness；There is larger roughness and more excellent hydrophily simultaneously, be conducive to water soluble organic substance semiconductor in the film preparation of silicon face.Silicon face passivating method of the present invention can improve the contact of silicon face and organic matter in the use of photoelectric field, suppress electronics and be combined, the photovoltaic property of hybrid battery is improved, with preferable application prospect.
Description
Technical field
The invention belongs to the crossing domain of chemical and photovoltaic material.In particular it relates to the Passivation Treatment side of silicon face
Method and its application in silicon/organic matter hybrid battery.
Background technology
In numerous solar cell technologies, silicon/organic hybrid solar cell is the new type solar energy with very big potentiality
One of battery.The battery possesses the advantage of organic semiconducting materials：1) synthesis cost is low；2) function and structure is easily designed and adjusts
System；3) solution film-forming, technique are simple；4) large area, flexible.At present, large quantities of conventional conjugated polymer photovoltaics have been developed
Material, such as P3HT, MEH-PPV, MDMO-PPV, PCPDTBT, PEDOT.Meanwhile, silicon/organic hybrid solar cell also has
The characteristics of silicon semiconductor：1) carrier mobility is high, 2) chemical stability is good.Silicon/organic hybrid solar cell is expected integration two
Person's advantage, opens up a low cost, green, efficient photovoltaic cell technology new way.
However, photo-generated carrier only has diffusion mobility to be separated to heterojunction boundary, when conjugated polymer is used as extinction
During donor material, photo-generated carrier is mainly moved in the conjugated bonds of intramolecular, and the migration of molecule interchain is relatively difficult, causes
The active diffusion length of organic semiconducting materials photo-generated carrier is shorter, only about 10nm, before heterojunction boundary is diffused into
It will be combined, charge-trapping rate is low, limit the raising of the photoelectric transformation efficiency of battery.Inorganic semiconductor has longer light
Raw carrier diffusion length, the negative issue that diffusion length short strip can be overcome, be more suitable for extinction in hybrid battery by
Body material.On the other hand, the nature difference of organic/inorganic materials can cause two-phase interface loose contact, and photo-generated carrier is different
After the separation of matter junction interface, a part of electronics is combined at boundary defect immediately, and electronics can not quickly be effectively collected in inorganic half
Conductor, causes the loss of short circuit current flow and open-circuit voltage.Meanwhile, inorganic semiconductor material surface has a large amount of defect (electronics
Trap), there is very strong capture ability to electronics, be unfavorable for the transmission of electronics, influence the fill factor, curve factor of battery.
Therefore, organic donor and inorganic acceptors only good contact just can guarantee that photo-generated carrier in the heterojunction boundary
Quick separating, and effectively collected.But the crystal of silicon face is periodically destroyed and produces dangling bonds so that surface is present
Substantial amounts of defect state.Meanwhile, dislocation, chemical residue, surface metal etc. can all introduce defect state.Answered in silicon face formation electric charge
Conjunction center, the compound of surface carrier can have a huge impact to silion cell performance, not only influence the stability of battery, and
Electric current, voltage and the efficiency of battery can greatly be influenceed.In order to improve silion cell performance and stability, silicon face passivation is developed
Technology, the fixed charge that surface passivation can be reduced in interfacial state, passivating film makes silicon face transoid or accumulation, forms surface knot, resistance
Only minority carrier recombination.At present, industrially, the silicon face passivating technique of silion cell is divided into：1) it is suitable by depositing or growing
When passivation layer, reduce the silicon face density of states；2) concentration in the free electron of reduction silicon face or hole.Mainly include plasma
Body enhancing chemical vapor deposition SiNx, plasma enhanced chemical vapor deposition α-Si:H, thermal oxide SiO2And ald
Al2O3Deng.However, at present in the hybrid battery, the passivation layer of silicon face mainly obtains SiO by autoxidationxPassivation layer,
The passivation layer quality that this method is obtained is affected by environment serious, it is not easy to prepare high-quality SiOxPassivation layer, and poor repeatability.
Thus, seek a kind of energy and prepare fine and close, ultra-thin SiOxThe technology of passivation layer, while can suppress Carrier recombination has
It is significant to silicon/organic hybrid battery for preparing efficient stable beneficial to the passivation layer of electron tunneling.
The content of the invention
The invention provides a kind of simple and effective silicon face passivating method, the surface passivation technique be mainly used in silicon/
Organic matter hybrid battery field.
In the first aspect of the present invention there is provided a kind of method for preparing silicon face passivation layer, methods described includes step：
(i) pre-process：One silicon wafer substrate is provided, and the silicon wafer substrate is pre-processed, pretreated silicon is obtained
Plate substrate；
(ii) Passivation Treatment：By the pretreated silicon wafer substrate of previous step, place is passivated with aqueous oxidizing agent solution
Reason, and washed, so as to form passivation layer；With
(III) optional drying：The silicon wafer substrate is dried, so that drying, formation are positioned at the silicon wafer substrate
The passivation layer on surface.
In another preference, pretreated silicon wafer substrate is obtained in step (i), step is carried out at once or directly
(ii) Passivation Treatment.
In another preference, the interval time between step (i) and step (ii) is 0-15 minutes, preferably 0-5
Minute, it is more preferably 0-1 minutes.
In another preference, the silicon wafer substrate includes p-type and n-type.
Also include pre-processing the silicon wafer substrate in another preference, in step (i), so as to provide through pre- place
The silicon wafer substrate of reason.
In another preference, the solution for pre-processing silicon wafer substrate includes：H2SO4-H2O2Solution, HCl-H2O2-H2O
Solution, and hydrofluoric acid solution.
In another preference, H2SO4-H2O2The volume ratio of solution is 1:10, preferably 1:5, it is more preferably 1:3.
In another preference, described pretreatment condition includes：
In H2SO4-H2O2The temperature soaked in solution is 100-130 DEG C；With
In H2SO4-H2O2The time soaked in solution is 5-60 minutes, and preferably 10-50 minutes, be more preferably 10-30
Minute.
In another preference, HCl-H2O2-H2The volume ratio of three kinds of materials of O solution is 1:1:6-1:2:8.
In another preference, described pretreatment condition includes：
In HCl-H2O2-H2The temperature soaked in O solution is 65-80 DEG C；With
In HCl-H2O2-H2The time soaked in O solution is 5-60 minutes, and preferably 10-50 minutes, be more preferably 10-
30 minutes.
In another preference, HF in hydrofluoric acid solution：H2O volume ratio is 1:2-1:10.
In another preference, described pretreatment condition includes：
The temperature soaked in hydrofluoric acid solution is 20-25 DEG C；With
The time soaked in a solution of hydrofluoric acid is 10-240 seconds, and preferably 20-200 seconds, be more preferably 30-180 seconds.
The silicon wafer substrate is pre-processed in another preference, in step (i) and comprised the following steps successively：
(i-1) H is used2SO4-H2O2Solution soaks the base material；
(i-2) HCl-H is used2O2-H2O solution soaks the base material；
(i-3) base material is soaked with hydrofluoric acid solution；With
(i-4) with base material described in deionized water rinsing, so as to remove substrate surface residue.
In another preference, the aqueous oxidizing agent solution includes hydrogen peroxide, nitric acid and/or nitrate, the concentrated sulfuric acid, high chlorine
Acid, dichromic acid and/or bichromate, permanganic acid and/or permanganate, perbenzoic acid or its combination.
In another preference, described aqueous oxidizing agent solution includes the following any aqueous solution of oxidant concentration：
Hydrogen peroxide 5-50wt%；
Nitric acid and nitrate 5-70wt%；
Concentrated sulfuric acid 70-98wt%；
Perchloric acid 40-72wt%；
Dichromic acid and its salt 5-10wt%；
Permanganic acid and its salt 1-4wt%；Or
Perbenzoic acid 50-80wt%.
In another preference, step (i i) the Passivation Treatment temperature is 0-100 DEG C；Preferably 15-50 DEG C.
In another preference, step (i i) the Passivation Treatment time range is 1-240 seconds, preferably 1-120
Second.
In another preference, make the silicon chip is washed with deionized in step (III), so as to remove surface residue.
In another preference, drying described in step (III) includes：Silicon face is dried up or air-dried with nitrogen.
In the second aspect of the present invention there is provided a kind of silicon face passivation layer, the passivation layer is located at silicon wafer substrate surface,
And the passivation layer is by SiOxConstitute or the passivation layer contains SiOx, wherein 1≤x≤2, and the roughness of the passivation layer
For 0.8-4nm.
In another preference, SiO in the passivation layerxContent be 99.9-100wt%.
In another preference, the passivation layer thickness scope be 0.1-10nm, preferably 0.5-5nm, more preferably for
0.6-4nm。
In another preference, the passivation layer silicon wafer polishing face roughness be 1.0-3.5nm, more preferably 1.5-3nm,
Most preferably 2.0-3nm.
In another preference, described roughness refers to roughness of the passivation layer in silicon wafer polishing face.
In another preference, the contact angle θ of the passivation layer is met：0°≤θ≤50°.
In another preference, the microsecond of the average minority carrier lifetime of the passivation layer >=13, preferably >=20 microsecond, more preferably for
20-40 microseconds (are such as detected) in the way of embodiment 1.
In another preference, the average minority carrier lifetime A1 of the passivation layer and being averaged for undressed similar silicon wafer substrate
The ratio between minority carrier life time A0 A1/A0 >=150%, preferably >=200% (is such as detected) in the way of embodiment 1.
In another preference, described silicon face passivation layer is prepared with the method described in first aspect present invention.
In the third aspect of the present invention there is provided a kind of composite, the composite contains silicon wafer substrate, Yi Jiwei
In the silicon face passivation layer described in the second aspect of the present invention in the silicon wafer substrate.
In the fourth aspect of the present invention there is provided a kind of product, the product contains as described in respect of the second aspect of the invention
Silicon face passivation layer is made up of the composite described in the third aspect of the present invention.
In another preference, described product includes solar cell, is preferably comprised silicon/organic hybrid solar-electricity
Pond.
It should be understood that within the scope of the present invention, above-mentioned each technical characteristic of the invention and have in below (eg embodiment)
It can be combined with each other between each technical characteristic of body description, so as to constitute new or preferred technical scheme.As space is limited, exist
This no longer tires out one by one states.
Brief description of the drawings：
Fig. 1 shows the SiO quickly prepared with salpeter solution of the embodiment of the present invention 1xThe AFM of passivation layer
Scanning figure.
Fig. 2 shows the minority carrier life time distribution map of silicon chip after being passivated soon with salpeter solution of the embodiment of the present invention 1.
Fig. 3 shows the minority carrier life time column distribution map of silicon chip after being passivated soon with salpeter solution of the embodiment of the present invention 1.
Embodiment
The present inventor is by long-term in-depth study extensively, by largely screening and testing, and is found that first a kind of non-
Often simple but extremely effective silicon face passivating method.The silicon face SiO prepared with this methodxPassivation layer have uniformity it is good,
The design features such as densification, thinner thickness, larger roughness.It is surprising that this silicon face passivation layer energy pole of the invention
It effectively improves the contact of silicon face and organic matter, suppresses electronics and is combined, so that the photovoltaic property of hybrid battery is improved, therefore
Had a good application prospect in photoelectric field.The present invention is completed on this basis.
Term
As used herein, term " surface passivation ", " Passivation Treatment ", " passivation " are used interchangeably, and refer both to use oxidant
The mode of action of the aqueous solution to processed material.
Passivation layer
As used herein, " passivation layer ", " passivating film ", " dielectric passivation layer " are used interchangeably, and refer both to be used for silicon substrate
Play the film of passivation.
As used herein, " passivation layer of the invention ", " silicon face passivation layer of the present invention ", " present media passivation layer " can
Used interchangeably, refers both to film being prepared with the inventive method, positioned at silicon substrate surface, playing passivation.
In the present invention, the warp obtained is located in advance after specific pretreatment (or cleaning treatment) on silicon wafer substrate surface
The silicon wafer substrate of reason is passivated processing with suitable oxidant again, you being formed has good, fine and close, thinner thickness of uniformity etc.
The passivation layer of the invention of advantage.The composition of the passivation layer of the present invention is substantially or completely SiOx, wherein 1≤x≤2.Certainly,
The passivation layer of the present invention can also contain a small amount of impurity, especially for passivation effect without the impurity substantially damaged.
Preferably, SiOx content is 99-100wt% in passivation layer of the present invention, is more preferably 99.9-100%.
Typically, passivation layer thickness scope of the present invention is 0.1-10nm, preferably 0.5-5nm, is more preferably 0.6-
4nm。
Typically, passivation layer of the present invention silicon wafer polishing face roughness be 1.0-3.5nm, more preferably 1.5-3nm, most preferably
Ground 2.0-3nm.
Typically, passivation layer of the invention has excellent hydrophilic characteristics, is met with the contact angle θ of water droplet：0°≤θ≤
50°。
Preparation method
Present invention also offers SiO as described in the present inventionxThe preparation method of passivation layer, generally includes following steps：
(i) pre-process：One silicon wafer substrate is provided, and the silicon wafer substrate is pre-processed, pretreated silicon is obtained
Plate substrate；
(ii) Passivation Treatment：By the pretreated silicon wafer substrate of previous step, place is passivated with aqueous oxidizing agent solution
Reason, and washed, so as to form passivation layer；With
(III) optional drying：The silicon wafer substrate is dried, so that drying, formation are positioned at the silicon wafer substrate
The passivation layer on surface.
In another preference, the pretreated silicon wafer substrate obtained in step (i) carries out step at once or directly
(ii) Passivation Treatment.
In another preference, the interval time between step (i) and step (ii) is 0-15 minutes, preferably 0-5
Minute, it is more preferably 0-1 minutes.
In another preference, the silicon wafer substrate includes p-type and n-type.
Also include pre-processing the silicon wafer substrate in another preference, in step (i), so as to provide through pre- place
The silicon wafer substrate of reason.
In another preference, the solution for pre-processing silicon wafer substrate includes：H2SO4-H2O2Solution, HCl-H2O2-H2O
Solution, and hydrofluoric acid solution.
In another preference, H2SO4-H2O2The volume ratio of solution is 1:10, preferably 1:5, it is more preferably 1:3.
In another preference, described pretreatment condition includes：
In H2SO4-H2O2The temperature soaked in solution is 100-130 DEG C；With
In H2SO4-H2O2The time soaked in solution is 5-60 minutes, and preferably 10-50 minutes, be more preferably 10-30
Minute.
In another preference, HCl-H2O2-H2The volume ratio of three kinds of materials of O solution is 1:1:6-1:2:8.
In another preference, described pretreatment condition includes：
In HCl-H2O2-H2The temperature soaked in O solution is 65-80 DEG C；With
In HCl-H2O2-H2The time soaked in O solution is 5-60 minutes, and preferably 10-50 minutes, be more preferably 10-
30 minutes.
In another preference, HF in hydrofluoric acid solution：H2O volume ratio is 1:2-1:10.
In another preference, described pretreatment condition includes：
The temperature soaked in hydrofluoric acid solution is 20-25 DEG C；With
The time soaked in a solution of hydrofluoric acid is 10-240 seconds, and preferably 20-200 seconds, be more preferably 30-180 seconds.
The silicon wafer substrate is pre-processed in another preference, in step (i) and comprised the following steps successively：
(i-1) H is used2SO4-H2O2Solution soaks the base material；
(i-2) HCl-H is used2O2-H2O solution soaks the base material；
(i-3) base material is soaked with hydrofluoric acid solution；With
(i-4) with base material described in deionized water rinsing, so as to remove substrate surface residue.
In another preference, the aqueous oxidizing agent solution includes hydrogen peroxide, nitric acid and/or nitrate, the concentrated sulfuric acid, high chlorine
Acid, dichromic acid and/or bichromate, permanganic acid and/or permanganate, perbenzoic acid or its combination.
In another preference, described aqueous oxidizing agent solution includes the following any aqueous solution of oxidant concentration：
Hydrogen peroxide 5-50wt%；
Nitric acid and nitrate 5-70wt%；
Concentrated sulfuric acid 70-98wt%；
Perchloric acid 40-72wt%；
Dichromic acid and its salt 5-10wt%；
Permanganic acid and its salt 1-4wt%；Or
Perbenzoic acid 50-80wt%.
In another preference, step (ii) the Passivation Treatment temperature is 0-100 DEG C；Preferably 15-50 DEG C.
In another preference, step (ii) the Passivation Treatment time range is 1-240 seconds, preferably 1-120 seconds.
In another preference, make the silicon chip is washed with deionized in step (III), so as to remove surface residue.
In another preference, drying described in step (III) includes：Silicon face is dried up or air-dried with nitrogen.
Main advantages of the present invention include：
(a) SiO of the present inventionxPassivation layer uniformity is good, densification, and chemical passivation performance is good；Thinner thickness；Have simultaneously larger
Roughness；With more excellent hydrophily, be conducive to water soluble organic substance semiconductor in the film preparation of silicon face.
(b) SiO of the inventionxPassivation layer preparation method is simple, quick, controllable, cost is low.
(c) passivation layer of the present invention can improve the contact of silicon face and organic matter in the use of photoelectric field, suppress electricity
Son is compound, the photovoltaic property of hybrid battery is improved, with preferable application prospect.
With reference to specific embodiment, the present invention is expanded on further.It should be understood that these embodiments are merely to illustrate the present invention
Rather than limitation the scope of the present invention.The experimental method of unreceipted actual conditions in the following example, generally according to conventional strip
Part, or according to the condition proposed by manufacturer.Unless otherwise indicated, otherwise percentage and number are percentage by weight and weight
Number.
Universal method
Roughness is determined：The roughness and surface topography of each sample are determined by afm scan.
Contact angle determination：Sample is generally using outline drawing as assay, and the principle of profile image analytical method is, by liquid
Drip in solid sample surface, obtain the outline drawing picture of drop by microlens and camera, then with Digital Image Processing and
Some algorithms calculate the contact angle meter of the drop in image.
The method for calculating contact angle is typically based on a specific mathematical modeling such as drop, can be considered as one of ball or cone
Point, then by measuring specific parameter such as wide/height or calculating contact angle values by being directly fitted.Young-
Laplace equations describe the inside and outside pressure differential of a closure interface and the curvature at interface and the relation of interfacial tension, can be used to standard
The appearance profile of one axisymmetric drop really is described, so as to calculate its contact angle.
Embodiment 1
Silicon face passivation layer No.1
N-type (monocrystalline, FZ, (100)) silicon chip is immersed in H2SO4-H2O220min (wherein dense H in the cleaning fluid of composition2SO4
With H2O2Volume ratio be 1：3), silicon chip is cleaned at a temperature of 100 DEG C, surface organic residue is removed.
Afterwards, silicon chip is immersed in HCl-H2O2-H220min (V in the cleaning fluid of O compositionsHCl：VH2O2：VH2O=1：1：
7), temperature control during cleaning removes surface metal residue at 65 DEG C.
Then, silicon chip is immersed in 60 seconds, HF in dilute hydrofluoric acid solution：H2O volume ratio is 1：8, treatment temperature is 25
DEG C, remove the silicon oxide layer of silicon face autoxidation.
Finally, with deionized water rinsing, surface residue, the silicon chip pre-processed are removed.
Above-mentioned pretreated silicon chip is placed at salpeter solution (V immediatelyHNO3：VH2O=1：4) in, at normal temperatures, leaching
Bubble 3 seconds, is finally dried up with deionized water rinsing several times with nitrogen, obtains the SiO positioned at silicon wafer substrate surfacexPassivation layer.
As a result
Tested with conventional method, as a result as illustrated in fig. 1-3.
The SiOxThe surface of passivation layer is as shown in figure 1, roughness is 1.21nm, compared to the SiO after autoxidation 1hxLayer
(0.59nm), roughness is big, and surface is uniform, and thickness is about 1.45nm, and the contact angle of passivation layer surface water droplet is 37.5 °.
Fig. 2 reflects the silicon face minority carrier life time distribution situation after passivation, minority carrier life time distribution uniform, most of (>=
70%) 20 μ s have been exceeded.
Fig. 3 further illustrates SiOxFew subcase of silicon face after passivation, average minority carrier lifetime is 21.10 μ s, long-range
In the μ s of minority carrier life time 10.73 after autoxidation 1h.
Spin coating prepares PEDOT on silicon chip after passivation:PSS films, are placed on 140 DEG C of warm table, dry 10 minutes,
Then the upper silver electrode of pn-junction front evaporation after the drying, overleaf titanium/silver electrode on magnetron sputtering is prepared into silicon/organic miscellaneous
Change solar cell.After measured, the silicon/organic hybrid solar cell has excellent photoelectric transformation efficiency 11.55%, compared to based on
Autoxidation obtains SiOxThe hybrid battery efficiency 9.5% of layer, improves 21.58%.
The above results show, described SiOxPassivation layer is particularly suitable for hybrid battery.
Embodiment 2
Silicon face passivation layer No.2
N-type silicon chip is immersed in H2SO4-H2O215min (wherein dense H in the cleaning fluid of composition2SO4With H2O2Volume ratio be
1：3), silicon chip is cleaned at a temperature of 100 DEG C.
Afterwards, silicon chip is immersed in HCl-H2O2-H2(ratio of three kinds of materials is by 1 by 15min in the cleaning fluid of O compositions：1：
6), temperature control during cleaning removes surface metal residue at 70 DEG C.
Then, silicon chip is immersed in 30 seconds, HF in dilute hydrofluoric acid solution：H2O volume ratio is 1：7, treatment temperature is 25
℃。
Deionized water rinsing is finally used, surface residue, the silicon chip pre-processed is removed.
Above-mentioned pretreated silicon chip is placed at hydrogen peroxide solution (H immediately2O2Volume ratio with deionized water is 1：2)
In, at normal temperatures, soak 3 seconds, finally dried up with nitrogen with deionized water rinsing several times, obtain positioned at silicon wafer substrate surface
SiOxPassivation layer.
As a result
Tested, as a result shown with conventional method, the SiOxThe roughness on the surface of passivation layer is 0.95nm, compared to
SiO after autoxidation 1hxLayer (0.59nm), roughness is big, and surface is uniform, and thickness is 1.37nm, passivation layer surface and water
The contact angle of drop is 35 °.
Silicon face minority carrier life time distribution situation after passivation, minority carrier life time distribution uniform, most of (>=70%) exceedes
12 μ s.Further illustrate SiOxFew subcase of silicon face after passivation, average minority carrier lifetime is 14 μ s, much larger than nature oxygen
Change the μ s of minority carrier life time 10.73 after 1h.
PEDOT in spin coating on silicon chip after passivation:PSS solution, is placed on 130 DEG C of warm table, dries 10 minutes, so
Upper silver electrode is deposited in pn-junction front after the drying afterwards, and overleaf titanium/silver electrode on magnetron sputtering, is prepared into silicon/organic hybrid
Solar cell.After measured, the silicon/organic hybrid solar cell has excellent photoelectric transformation efficiency 10.45%, compared to based on certainly
So oxidation obtains SiOxThe hybrid battery efficiency 9.5% of layer, improves 10%.
The above results show, described SiOxPassivation layer is particularly suitable for hybrid battery.
Embodiment 3
Silicon face passivation layer No.3
P-type silicon chip is immersed in H2SO4-H2O215min (wherein dense H in the cleaning fluid of composition2SO4With H2O2Volume ratio be
1：3), silicon chip is cleaned at a temperature of 100 DEG C.
Afterwards, silicon chip is immersed in HCl-H2O2-H230min (V in the cleaning fluid of O compositionsHCl：VH2O2：VH2O=1：1：
8), temperature control during cleaning removes surface metal residue at 80 DEG C.
Then, silicon chip is immersed in 60 seconds, HF in dilute hydrofluoric acid solution：H2O volume ratio is 1：8, treatment temperature is 25
℃。
Finally, with deionized water rinsing, surface residue, the silicon chip pre-processed are removed.
Above-mentioned pretreated silicon chip is placed in the concentrated sulfuric acid, hydrogen peroxide mixed solution (V immediatelyH2SO4：VH2O2=1：8) in,
At normal temperatures, soak 1 second, finally dried up with nitrogen with deionized water rinsing several times,
As a result
Tested, as a result shown with conventional method, the SiOxThe roughness on the surface of passivation layer is 1.95nm, compared to
SiO after autoxidation 1hxLayer (0.59nm), roughness is big, and surface is uniform, and thickness is 1.56nm, the water of passivation layer surface
It is 20.3 ° to drip contact angle.
Silicon face minority carrier life time distribution situation after passivation, minority carrier life time distribution uniform has largely exceeded 24 μ s.It is flat
Equal minority carrier life time is 27 μ s, much larger than the μ s of minority carrier life time 9.65 after autoxidation 1h.
The above results show, described SiOxPassivation layer is particularly suitable for hybrid battery.
Embodiment 4
Silicon face passivation layer No.4 (comparative example 1)
N-type (monocrystalline, FZ, (100)) silicon chip is immersed in H2SO4-H2O220min (wherein dense H in the cleaning fluid of composition2SO4
With H2O2Volume ratio be 1：3), silicon chip is cleaned at a temperature of 100 DEG C, surface organic residue is removed.
Afterwards, silicon chip is immersed in HCl-H2O2-H220min (V in the cleaning fluid of O compositionsHCl：VH2O2：VH2O=1：1：
7), temperature control during cleaning removes surface metal residue at 65 DEG C.
Finally, with deionized water rinsing, surface residue, the silicon chip pre-processed are removed.
Above-mentioned pretreated silicon chip is placed at salpeter solution (V immediatelyHNO3：VH2O=1：4) in, at normal temperatures, leaching
Bubble 3 seconds, is finally dried up with deionized water rinsing several times with nitrogen, obtains the SiO positioned at silicon wafer substrate surfacexPassivation layer.
As a result
The SiOxThe roughness on the surface of passivation layer is 2.93nm, compared to the SiO after autoxidation 1hxLayer (0.59nm),
Roughness is big, and surface is uneven, and thickness is about 6.5nm, and the contact angle of passivation layer surface water droplet is 40.5 °.
Silicon face minority carrier life time distribution after passivation is more uneven, and most of (≤70%) is less than 9 μ s, average minority carrier lifetime
For 8 μ s, less than the μ s of minority carrier life time 10.73 after autoxidation 1h.
The above results show, if lacking the 3rd step (hydrofluoric acid solution immersion) in pre-treatment step, then by follow-up side
Silicon face passivation layer performance is greatly lowered made from method.
Embodiment 5
Silicon face passivation layer No.5 (comparative example 2)
N-type (monocrystalline, FZ, (100)) silicon chip is immersed in H2SO4-H2O220min (wherein dense H in the cleaning fluid of composition2SO4
With H2O2Volume ratio be 1：3), silicon chip is cleaned at a temperature of 100 DEG C, surface organic residue is removed.
Afterwards, with deionized water rinsing, surface residue, the silicon chip pre-processed are removed.
Above-mentioned pretreated silicon chip is placed at salpeter solution (V immediatelyHNO3：VH2O=1：4) in, at normal temperatures, leaching
Bubble 3 seconds, is finally dried up with deionized water rinsing several times with nitrogen, obtains the SiO positioned at silicon wafer substrate surfacexPassivation layer.
As a result
The SiOxThe roughness on the surface of passivation layer is 2.65nm, compared to the SiO after autoxidation 1hxLayer (0.59nm),
Roughness is big, and surface is uneven, and thickness is about 5.5nm, and the contact angle of passivation layer surface water droplet is 42.5 °.
Silicon face minority carrier life time minority carrier life time distribution after passivation is more uneven, and most of (≤70%) has been less than 8 μ s, puts down
Equal minority carrier life time is 7.4 μ s, less than the μ s of minority carrier life time 10.73 after autoxidation 1h.
The above results show, if lacking second step (HCl-H in pre-treatment step2O2-H2O solution soaks) and the 3rd step
(hydrofluoric acid solution immersion), then be greatly lowered by silicon face passivation layer performance made from subsequent processes.
Embodiment 6
Silicon face passivation layer No.6 (comparative example 3)
N-type (monocrystalline, FZ, (100)) silicon chip is directly placed at salpeter solution (VHNO3：VH2O=1：4) in, in normal temperature
Under, soak 3 seconds, finally dried up with nitrogen with deionized water rinsing several times, obtain the SiO positioned at silicon wafer substrate surfacexPassivation
Layer.
As a result
The SiOxThe roughness on the surface of passivation layer is 2.15nm, compared to the SiO after autoxidation 1hxLayer (0.59nm),
Roughness is big, and surface is uneven, and thickness is about 4.2nm, and the contact angle of passivation layer surface water droplet is 45.5 °.
Silicon face minority carrier life time minority carrier life time distribution after passivation is more uneven, and most of (≤70%) has been less than 8 μ s, puts down
Equal minority carrier life time is 7.0 μ s, less than the μ s of minority carrier life time 10.73 after autoxidation 1h.
The above results show, if lacking pre-treatment step, by silicon face passivation layer performance made from subsequent processes
It is greatly lowered.
To each silicon face passivation layer made above, tested with conventional method, be as a result listed in table 1.
Each silicon face passivation layer and its performance test prepared by the embodiment 1-6 of table 1
All documents referred in the present invention are all incorporated as reference in this application, independent just as each document
It is incorporated as with reference to such.In addition, it is to be understood that after the above-mentioned instruction content of the present invention has been read, those skilled in the art can
To be made various changes or modifications to the present invention, these equivalent form of values equally fall within the model that the application appended claims are limited
Enclose.
Claims (11)
1. a kind of method for preparing silicon face passivation layer, it is characterised in that methods described includes step：
(i) pre-process：One silicon wafer substrate is provided, and the silicon wafer substrate is pre-processed, pretreated silicon chip base is obtained
Material；
(ii) Passivation Treatment：By the pretreated silicon wafer substrate of previous step, processing is passivated with aqueous oxidizing agent solution, and
Washed, so as to form passivation layer；With
(III) optional drying：The silicon wafer substrate is dried, so that drying, formation are positioned at the silicon wafer substrate surface
Passivation layer；
Wherein, the aqueous oxidizing agent solution include hydrogen peroxide, nitric acid and/or nitrate, the concentrated sulfuric acid, perchloric acid, dichromic acid and/or
Bichromate, permanganic acid and/or permanganate, perbenzoic acid or its combination；
And the passivation layer is by SiOxConstitute or the passivation layer contains SiOx, wherein 1≤x≤2；
Also, step (ii) the Passivation Treatment temperature is 15-50 DEG C.
2. preparation method as claimed in claim 1, it is characterised in that the solution for pre-processing silicon wafer substrate includes：H2SO4-
H2O2Solution, HCl-H2O2-H2O solution, and hydrofluoric acid solution.
3. preparation method as claimed in claim 1 or 2, it is characterised in that located in advance to the silicon wafer substrate in step (i)
Reason comprises the following steps successively：
(i-1) H is used2SO4-H2O2Solution soaks the base material；
(i-2) HCl-H is used2O2-H2O solution soaks the base material；
(i-3) base material is soaked with hydrofluoric acid solution；With
(i-4) with base material described in deionized water rinsing, so as to remove substrate surface residue.
4. a kind of silicon face passivation layer, it is characterised in that the passivation layer is located at silicon wafer substrate surface, and the passivation layer by
SiOxConstitute or the passivation layer contains SiOx, wherein SiO in 1≤x≤2, and the passivation layerxContent be 99-100wt%,
And the roughness of the passivation layer in the silicon wafer polishing face is 0.8-4nm.
5. passivation layer as claimed in claim 4, it is characterised in that the passivation layer thickness scope is 0.1-10nm；And/or
Roughness of the passivation layer in silicon wafer polishing face is 1.0-3.5nm.
6. passivation layer as claimed in claim 4, it is characterised in that the passivation layer thickness scope is 0.5-5nm.
7. passivation layer as claimed in claim 4, it is characterised in that the contact angle θ of the passivation layer and water droplet is met：0°≤θ≤
50°。
8. passivation layer as claimed in claim 4, it is characterised in that described passivation layer is to use any institute in claim 1-3
Prepared by the method stated.
9. a kind of composite, it is characterised in that described composite contains silicon wafer substrate, and positioned at the silicon wafer substrate
On silicon face passivation layer as claimed in claim 4.
10. a kind of solar cell, it is characterised in that it is blunt that the solar cell contains silicon face as claimed in claim 4
Change layer or be made up of the composite described in claim 9.
11. solar cell as claimed in claim 10, it is characterised in that the solar cell be silicon/organic hybrid too
Positive energy battery.
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| CN201655813U (en) * | 2010-04-20 | 2010-11-24 | 常州天合光能有限公司 | Passive film for crystalline silicon solar battery |
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| CN201655813U (en) * | 2010-04-20 | 2010-11-24 | 常州天合光能有限公司 | Passive film for crystalline silicon solar battery |
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