CN104143525B - Through-silicon-via back metal flattening method - Google Patents
Through-silicon-via back metal flattening method Download PDFInfo
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- CN104143525B CN104143525B CN201310169389.8A CN201310169389A CN104143525B CN 104143525 B CN104143525 B CN 104143525B CN 201310169389 A CN201310169389 A CN 201310169389A CN 104143525 B CN104143525 B CN 104143525B
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- 229910052751 metal Inorganic materials 0.000 title claims abstract description 132
- 239000002184 metal Substances 0.000 title claims abstract description 132
- 238000000034 method Methods 0.000 title claims abstract description 45
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 153
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 153
- 239000010703 silicon Substances 0.000 claims abstract description 153
- 239000000758 substrate Substances 0.000 claims abstract description 143
- 238000005498 polishing Methods 0.000 claims abstract description 30
- 239000003792 electrolyte Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 9
- 238000003487 electrochemical reaction Methods 0.000 claims description 8
- 239000003292 glue Substances 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 4
- 239000007921 spray Substances 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 55
- 239000011241 protective layer Substances 0.000 description 15
- 230000004888 barrier function Effects 0.000 description 13
- 238000005516 engineering process Methods 0.000 description 10
- 238000005530 etching Methods 0.000 description 8
- 239000007789 gas Substances 0.000 description 8
- 238000000151 deposition Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- BLIQUJLAJXRXSG-UHFFFAOYSA-N 1-benzyl-3-(trifluoromethyl)pyrrolidin-1-ium-3-carboxylate Chemical compound C1C(C(=O)O)(C(F)(F)F)CCN1CC1=CC=CC=C1 BLIQUJLAJXRXSG-UHFFFAOYSA-N 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Present invention discloses a kind of through-silicon-via back metal flattening methods, comprising steps of providing a silicon substrate, silicon substrate has several metal bumps exposed from the back side of silicon substrate；And the metal bump exposed from the back side of silicon substrate is planarized in a manner of unstressed electrochemical polish, so that the height for the metal bump exposed from the back side of silicon substrate flushes.The present invention by using the flat silicon substrate back side of mode of unstressed electrochemical polish metal bump, the removal thickness of metal bump accurately is controlled especially by control polishing voltage and or current or silicon substrate rotation speed and horizontal movement velocity, to realize the planarization of the metal bump at the silicon substrate back side.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing technology field more particularly to a kind of through-silicon-via back metal are flat
Smoothization method.
Background technique
As complete electronic set system constantly develops to light, thin, small direction, the integrated level of integrated circuit is required also more next
It is higher.Currently, the integrated level for improving integrated circuit mainly takes reduction characteristic size, enables and integrated more in given area
It is integrated to belong to two dimension for more elements.However, the structure when integrated circuit is increasingly complicated, the required function having is become stronger day by day
When, the limitation of two-dimentional integrated technology application gradually highlights.Therefore, new integrated technology need to be sought to improve integrated circuit
Integrated level.
Three-dimensional integration technology based on through-silicon-via (TSV) technology, which has become, improves the integrated level of integrated circuit most instantly
A kind of noticeable new technology.Three-dimensional integration technology realizes the interconnection of stacked chips in integrated circuit using TSV.TSV can
Make chip density that three-dimensional stacks is maximum, the interconnection line between chip is most short, outer dimension is minimum, and can be significantly
Improve the performance of chip speed and low-power consumption.
TSV structure manufacture craft mainly includes the formation of through-hole, silicon substrate is thinned and TSV bonding.Specifically, in silicon substrate
Front production through-hole, through-hole extends to the back side of silicon substrate, dielectric layer and barrier layer is sequentially depositing in through-hole, then logical
Metal is filled in hole；By the thinning back side of silicon substrate to the dielectric layer for exposing via bottoms；Finally successively remove via bottoms
Dielectric layer and barrier layer, the metals of via bottoms exposes from the back side of silicon substrate, to be electrically connected with another layer of chip,
To realize the interconnection of chip chamber.
In above-mentioned TSV structure manufacturing process, silicon substrate thinning back side generallys use mechanical lapping and mutually ties with wet etching
The mode of conjunction.Specifically, first be tentatively thinned using mechanical lapping, be scraped since mechanical lapping can generate surface of silicon
Trace, after mechanical lapping, surface of silicon situation be not very well, it is then desired to again using wet etching to surface of silicon into
Row processing carries out a degree of be thinned to silicon substrate while improving surface of silicon and exposes the media of via bottoms
Layer.Then, dielectric layer and the barrier layer of via bottoms are successively removed using chemical mechanical grinding (CMP).
Uniformity when due to silicon substrate thinning back side and flatness control is difficult to it is accurate, and silicon substrate not
The hole depth difference that through-hole is formed with region, after above-mentioned each processing step, the metal pillar that exposes from the silicon substrate back side
Height can be inconsistent.CMP is generallyd use to polish metal pillar or make metal pillar using the method that unclassified stores is cut
Height is consistent.However, either above-mentioned any method can all generate stronger mechanical stress, and the dielectric layer machine around through-hole
Tool intensity is weaker, is easy to damage the dielectric layer of through-hole shoulder in grinding or cutting process or it is made to generate defect,
And then the electrical property of through-hole is influenced, performance of integrated circuits and service life reduction after making encapsulation.In addition to the stress problem of through-hole shoulder,
Dish-shaped defect is also inevitably generated after CMP grinding.
Summary of the invention
The purpose of the present invention is to provide a kind of through-silicon-via back metal flattening method, this method realization penetrates silicon
Through-hole back metal will not damage the dielectric layer in through-silicon-via while planarization, integrate electricity after improving encapsulation
The performance on road and service life.
To achieve the above object, through-silicon-via back metal flattening method provided by the invention, comprising steps of providing
One silicon substrate, silicon substrate have several metal bumps exposed from the back side of silicon substrate；And with the side of unstressed electrochemical polish
The formula planarization metal bump exposed from the back side of silicon substrate, so that the height for the metal bump exposed from the back side of silicon substrate
Degree flushes.
In one embodiment, expose described in being planarized in a manner of unstressed electrochemical polish from the back side of silicon substrate
The step of metal bump, further comprises: 1) by silicon substrate be placed in it is rotatable, be vertically movable and horizontally movable chuck on；
2) anode of a polishing power supply and silicon substrate are conducted and makes the cathode of the polishing power supply and is used for the back spraying to silicon substrate
Penetrate the nozzle electrical connection of electrolyte；And it 3) sprays electrolyte to silicon by nozzle under the power supply of the polishing power supply and serves as a contrast
The back side at bottom, so that with the metal exposed from the back side of silicon substrate electrochemical reaction occurs for electrolyte.
In one embodiment, further comprise between the step 1) and step 2): one carrying tablet of setting wherein should
The surface of carrying tablet is coated with conductive layer, is coated with conductive glue on conductive layer, wherein it includes by silicon substrate that the carrying tablet, which is arranged,
The front opposite with the back side be pasted on the conductive layer of carrying tablet by the conductive glue of carrying tablet so that the polishing power supply
Anode be electrically connected with the conductive layer of carrying tablet.The material of conductive layer and the material of metal bump are identical.
In one embodiment, the step 3) further comprises: exposing electrolyte with the back side from silicon substrate
During electrochemical reaction occurs for metal, the removal thickness of metal bump is controlled by control polishing voltage and or current,
It include: the shape appearance figure for obtaining the metal bump at the silicon substrate back side；Set the object height value of metal bump；By the back side of silicon substrate
Several regions are divided into, the average value of the removal thickness of metal bump in each region is calculated；Mobile card in preset speed
Disk makes a region at the silicon substrate back side face nozzle；Duty ratio table is looked into, according to the removal thickness of the metal bump in the region
Average value obtains duty ratio corresponding with the average value, wherein the duty ratio table is the removal thickness previously according to metal bump
The one-to-one relationship of angle value and duty ratio and establish；Preset pulse voltage and/or electric current are supplied to silicon substrate and nozzle,
The virtual voltage and/or electric current for polishing metal bump in the region are equal to be averaged with the removal thickness of the metal bump in the region
It is worth corresponding duty ratio multiplied by preset pulse voltage and/or electric current.
In one embodiment, the step 3) further comprises: exposing electrolyte with the back side from silicon substrate
During electrochemical reaction occurs for metal, metal bump is controlled by controlling rotation speed and the horizontal movement velocity of chuck
Removal thickness, comprising: obtain the silicon substrate back side metal bump shape appearance figure；Set the object height value of metal bump；It will
The back side of silicon substrate is divided into several regions, calculates the average value of the removal thickness of metal bump in each region；Look into revolving speed
Table turns according to the reality that the average value of the removal thickness of metal bump in each region obtains chuck corresponding with the average value
Speed, wherein the revolution counter is the one-to-one relationship previously according to the removal thickness value of metal bump and the actual speed of chuck
And establish；The horizontal movement velocity and revolving speed of corresponding each region setting chuck；It will be opposite with each region on same Radius
The actual speed for the chuck answered obtains a rotating ratio compared with the revolving speed of setting, and calculates all areas on same Radius
Mean speed ratio；By the horizontal movement velocity of the setting of chuck corresponding with region each on same Radius multiplied by with the region
Corresponding mean speed ratio, obtains the real standard movement speed of chuck corresponding with the region；When the silicon substrate back side
When one region faces nozzle, supply preset voltage and or current to silicon substrate and nozzle, at the same drive chuck with the area
The corresponding actual speed in domain and real standard movement speed are rotated and are moved horizontally.
In conclusion the present invention is convex by using the metal at the flat silicon substrate back side of mode of unstressed electrochemical polish
It rises, accurately to control metal especially by control polishing voltage and or current or silicon substrate rotation speed and horizontal movement velocity
The removal thickness of protrusion, to realize the planarization of the metal bump at the silicon substrate back side.
Detailed description of the invention
Fig. 1 to Fig. 8 B discloses the section of each processing step of an embodiment of through-silicon-via back metal exposure method
Structural schematic diagram.
Fig. 9 discloses the flow chart of an embodiment of through-silicon-via back metal flattening method according to the present invention.
Figure 10 to Figure 11 discloses an embodiment of through-silicon-via back metal flattening method according to the present invention
The schematic diagram of the section structure of processing step.
Specific embodiment
By the technology contents that the present invention will be described in detail, reached purpose and efficacy, below in conjunction with embodiment and cooperates figure
Formula is described in detail.
Before the present invention will be described in detail through-silicon-via back metal flattening method, first to through-silicon-via back-side gold
Belong to disclosing and be explained.After through-silicon-via back metal discloses, through-silicon-via back metal is planarized using the present invention,
Flush through-silicon-via back metal.Through-silicon-via back metal discloses method and is not limited to following methods, Xia Shufang
Method is only used as a representative embodiment to be explained.
Refering to fig. 1 to Fig. 8 B, through-silicon-via back metal discloses method and includes the following steps:
Firstly, as shown in Figure 1, providing silicon substrate 100 and carrying tablet 200.Silicon substrate 100 has positive and opposite with front
The back side, the front of silicon substrate 100 is formed with through-hole and integrated circuit device, and through-hole extends to the back side of silicon substrate 100, logical
The inner wall in hole is sequentially depositing dielectric layer 101 and barrier layer 102, and metal 103 is then filled into through-hole.Wherein, it is preferred that medium
The material of layer 101 is silica, and the material on barrier layer 102 is tantalum, tantalum nitride, titanium, titanium nitride or several successively shapes in them
At multilayer film, the material of metal 103 is copper.The upper surface of carrying tablet 200 is coated with conductive layer 201, coats on conductive layer 201
There is conductive glue 202.Preferably, the material of conductive layer 201 is copper.
As shown in Fig. 2, silicon substrate 100 is inverted, make the face down of silicon substrate 100, the back side of silicon substrate 100 upward,
And be pasted onto the front of silicon substrate 100 on the conductive layer 201 of carrying tablet 200 by conductive glue 202, to make carrying tablet
200 carrying silicon substrates 100.
As shown in figure 3, be tentatively thinned to the back side of silicon substrate 100.It generallys use mechanical lapping or chemical machinery is ground
Silicon substrate 100 is thinned to 50-250 microns by the method for mill, and the thickness after being thinned is according to the depth of through-hole and other parameters
Depending on difference requires.
As shown in figure 4, the back side to silicon substrate 100 is further thinned, until the gold of a part deposited at via bottoms
Belong to 103, barrier layer 102 and dielectric layer 101 from the back side of silicon substrate 100 protrusion, wherein 101 quilt of dielectric layer at via bottoms
It is exposed.Specifically, the back side of silicon substrate 100 is carried out after being tentatively thinned, then, the back side of silicon substrate 100 is carried out wet
Method etching is further thinned the back side of silicon substrate 100 while improving 100 back side uniformity of silicon substrate and roughness,
At this point, the dielectric layer 101 at via bottoms still has certain distance.The etching liquid of wet etching can be, for example, KOH, HF
With the mixed liquor of nitric acid, TMAH solvent.Before dielectric layer 101 at via bottoms is exposed, stop wet etching.So
Afterwards, dry vapor etching is carried out to the back side of silicon substrate 100.Since spontaneous generation chemistry is anti-at normal temperature for xenon difluoride and silicon
It answers, it is therefore advantageous to, using the mixed of xenon difluoride gas or the same nitrogen of xenon difluoride gas, hydrogen fluoride gas or vapor
It closes gas and gas phase etching is carried out to the back side of silicon substrate 100, until the metal 103 of a part deposited at via bottoms, blocking
Layer 102 and dielectric layer 101 are raised from the back side of silicon substrate 100.The metal 103 of a part deposited at via bottoms, barrier layer
102 and dielectric layer 101 can be controlled from the height H of the back side protrusion of silicon substrate 100 using the method for terminal point control,
In, when detecting dielectric layer 101, the back side of silicon substrate 100 is flushed with the dielectric layer 101 deposited at via bottoms.Gas phase is carved
It can be using this time point as the reference point of etching technics terminal, according to the gold of a part deposited at via bottoms during erosion
Belong to 103, barrier layer 102 and dielectric layer 101 is actually needed raised height and determines to continue to the time of etching, continuing to carve
During erosion, gas flow and other technological parameters are remained unchanged.It is logical to control by controlling the period for continuing to etch
Height of the metal 103, barrier layer 102 and the dielectric layer 101 of a part deposited at the bottom of hole from the back side protrusion of silicon substrate 100
H.Dry vapor etching can only remove silicon substrate 100, and not react with dielectric layer 101, can be good at protecting medium
Layer 101 is injury-free.
As shown in figure 5, first protective layer 104 is in subsequent technique in the first protective layer of backside deposition 104 of silicon substrate 100
Middle protection silicon substrate 100 is not etched.First protective layer 104 can be passivation layer, the material of passivation layer can be SiC, SiN,
SiCN or several multilayer films sequentially formed in them.
As shown in fig. 6, depositing the second protective layer 105 on first protective layer 104 at the back side of silicon substrate 100.Second protects
The thickness of sheath 105 is served as a contrast not less than the metal 103, barrier layer 102 and dielectric layer 101 of a part deposited at via bottoms from silicon
The height H of the back side protrusion at bottom 100.Second protective layer 105 can be photoresist layer.
As shown in fig. 7, removal is deposited on the second protective layer 105 at via bottoms, the back side for being deposited on silicon substrate 100 is removed
Second protective layer 105 of the part outside via bottoms retains.
As shown in Fig. 8 to Fig. 8 B, is successively removed using the method for gas phase etching or plasma etching and be deposited on via bottoms
First protective layer 104, dielectric layer 101 and the barrier layer 102 at place are deposited on metal 103 at via bottoms from silicon substrate 100
Expose at the back side.After Fig. 8 is successively removal is deposited on the first protective layer 104, dielectric layer 101 and barrier layer 102 at via bottoms
100 back side of silicon substrate top view.Fig. 8 A is the sectional view of a-quadrant in Fig. 8.Fig. 8 B is the sectional view of B area in Fig. 8.By
The precision that the uniformity and flatness at 100 back side of silicon substrate are controlled in each technique in above-mentioned 100 thinning back side of silicon substrate
Not enough, and in the different zones of silicon substrate 100 the hole depth difference of through-hole is formed, after above-mentioned each processing step, from
The height for the metal bump that the back side of silicon substrate 100 is exposed is inconsistent.Due to being deposited on second protective layer at 100 back side of silicon substrate
105 thickness not less than a part deposited at via bottoms metal 103, barrier layer 102 and dielectric layer 101 from silicon substrate
The height H of 100 back side protrusion, from the back side of silicon substrate 100 expose metal bump height it is inconsistent in other words for from
The depth that the metal phase that the back side of silicon substrate 100 is exposed is recessed for the second protective layer 105 is inconsistent.Metal 103 is from silicon substrate
100 being uneven for back side protrusion to subsequent TSV bonding technology can bring adverse effect, therefore, need to be to from silicon substrate 100
The back side expose metal bump carry out planarization process, make from the back side of silicon substrate 100 expose metal bump flush.
As shown in figure 9, disclose an embodiment of through-silicon-via back metal flattening method according to the present invention
Flow chart, the through-silicon-via back metal flattening method include the following steps:
Step S001: providing silicon substrate 100, which is completed the exposure of through-silicon-via back metal, silicon substrate
100 with several metal bumps exposed from the back side of silicon substrate 100；And
Step S002: it is convex that the metal exposed from the back side of silicon substrate 100 is planarized in a manner of unstressed electrochemical polish
It rises, so that the height for the metal bump exposed from the back side of silicon substrate 100 flushes.
Through-silicon-via back metal flattening method of the present invention, can be without machinery by using unstressed electrochemical polish
Stress planarizes the metal bump exposed from the back side of silicon substrate 100, makes metal 103 from the back side of silicon substrate 100 protrusion
Height it is consistent.Unstressed electrochemical polish be based on electrochemical polish principle, comprising: 1) by silicon substrate 100 be placed in it is rotatable, can
In vertical shift and horizontally movable chuck；2) anode of a polishing power supply and silicon substrate 100 are conducted and makes the polishing
The cathode of power supply is electrically connected with the nozzle for the back side jet electrolytic liquid to silicon substrate 100；And 3) in the confession of polishing power supply
Under electricity, spray electrolyte to the back side of silicon substrate 100 by nozzle, so that electrolyte exposes with from the back side of silicon substrate 100
Metal 103 occur electrochemical reaction.By control polishing voltage and or current, the rotation speed of chuck and move horizontally speed
The removal thickness of the control metal bump such as degree or polishing time, to realize the planarization of metal bump.Two kinds will be enumerated below
The removal thickness for how controlling metal bump is described in detail in method.
Method one controls the removal thickness of metal bump by control polishing voltage and or current, in the embodiment
In, polishing power supply used is the pulse power, it specifically includes:
The shape appearance figure for obtaining the metal bump at 100 back side of silicon substrate can be used contactless measuring method and obtain
The shape appearance figure of the metal bump at 100 back side of silicon substrate；
Set the object height value of metal bump；
The back side of silicon substrate 100 is divided into several regions, calculates the removal thickness of metal bump in each region
Average value, for example, the back side of silicon substrate 100 can be divided into the border circular areas that several radiuses are 0.5mm；
Chuck is moved in preset speed, and a region at 100 back side of silicon substrate is made to face nozzle；
Duty ratio table is looked into, is obtained according to the average value of the removal thickness of the metal bump in the region corresponding with the average value
Duty ratio, wherein duty ratio table is built previously according to the removal thickness value of metal bump and the one-to-one relationship of duty ratio
Vertical；
Preset pulse voltage and/or electric current are supplied to silicon substrate 100 and nozzle, polishes the reality of metal bump in the region
Border voltage and or current is equal to duty ratio corresponding with the removal average value of thickness of the metal bump in the region multiplied by default
Pulse voltage and/or electric current.
Method two controls the removal thickness of metal bump by controlling rotation speed and the horizontal movement velocity of chuck,
It specifically includes:
The shape appearance figure for obtaining the metal bump at 100 back side of silicon substrate can be used contactless measuring method and obtain
The shape appearance figure of the metal bump at 100 back side of silicon substrate；
Set the object height value of metal bump；
The back side of silicon substrate 100 is divided into several regions, calculates the removal thickness of metal bump in each region
Average value, for example, the back side of silicon substrate 100 can be divided into the border circular areas that several radiuses are 0.5mm；
Revolution counter is looked into, is obtained according to the average value of the removal thickness of metal bump in each region corresponding with the average value
Chuck actual speed, wherein revolution counter be previously according to metal bump removal thickness value and chuck actual speed one
One corresponding relationship and establish；
The horizontal movement velocity and revolving speed of corresponding each region setting chuck；
By the actual speed of chuck corresponding with region each on same Radius compared with the revolving speed of setting, one turn is obtained
Speed ratio, and calculate the mean speed ratio of all areas on same Radius；
By the horizontal movement velocity of the setting of chuck corresponding with region each on same Radius multiplied by with the region phase
Corresponding mean speed ratio, obtains the real standard movement speed of chuck corresponding with the region；
When a region at 100 back side of silicon substrate faces nozzle, preset voltage and or current is supplied to silicon substrate
100 and nozzle, while driving chuck with actual speed corresponding with the region and the rotation of real standard movement speed and horizontal
It is mobile.
By using the above method one or method two, metal 103 removes at the via bottoms in each region thickness value
Can be precisely controlled, to ensure that the height one of metal 103 in different zones from the back side protrusion of silicon substrate 100
It causes, as shown in Figure 10.
In the unstressed electrochemical polishing process of above-mentioned method one and method two, since the back side of silicon substrate 100 is heavy
Product has the first protective layer 104 and the second protective layer 105, and polishing electric current can only be conducted by the electrolyte at 100 back side of silicon substrate, and
The electrolyte at 100 back side of silicon substrate is in film-form, and resistance is higher, reduces polishing efficiency, and loop voltage is higher, and then lead
It causes to the more demanding of polishing power supply.In order to improve polishing efficiency, in the above method one and method two, it is preferred that by power supply
Anode be electrically connected with the conductive layer 201 of carrying tablet 200 so that polishing electric current passes through metal 103, the conducting resinl in through-hole
Water 202 and conductive layer 201 conduct, and reduce loop resistance, improve polishing efficiency.
In general, for the needs of subsequent technique, it can be further by the part in addition to via bottoms at 100 back side of silicon substrate
The second protective layer 105 removal, as shown in figure 11.
In conclusion through-silicon-via back metal flattening method of the present invention passes through above embodiment and correlative type
Illustrate, specifically, it is full and accurate disclose the relevant technologies, implement those skilled in the art accordingly.And it is described above real
It applies example to be used only to illustrate the present invention, rather than is used to limit interest field of the invention, of the invention, it should be by power of the invention
Benefit requires to define.
Claims (4)
1. a kind of through-silicon-via back metal flattening method, which is characterized in that comprising steps of
A silicon substrate is provided, the silicon substrate has several metal bumps exposed from the back side of silicon substrate；And
The metal bump exposed from the back side of silicon substrate is planarized in a manner of unstressed electrochemical polish, so as to serve as a contrast from silicon
The height for the metal bump that the back side at bottom is exposed flushes, wherein it is described planarized in a manner of unstressed electrochemical polish it is described from
The step of metal bump that the back side of silicon substrate is exposed, further comprises:
1) by silicon substrate be placed in it is rotatable, be vertically movable and horizontally movable chuck on；
2) anode of a polishing power supply and silicon substrate are conducted and makes the cathode of the polishing power supply and is used for the back to silicon substrate
The nozzle of face jet electrolytic liquid is electrically connected；And
3) it is described polishing power supply power supply under, spray electrolyte to the back side of silicon substrate by nozzle so that electrolyte and
From the back side of silicon substrate expose metal occur electrochemical reaction, wherein the step 3) further comprises: make electrolyte with
During electrochemical reaction occurs for the metal exposed from the back side of silicon substrate, controlled by control polishing voltage and or current
The removal thickness of metal bump processed；
Wherein the step of removal thickness by control polishing voltage and or current to control metal bump further wraps
It includes:
Obtain the shape appearance figure of the metal bump at the silicon substrate back side；
Set the object height value of metal bump；
The back side of silicon substrate is divided into several regions, calculates the average value of the removal thickness of metal bump in each region；
Chuck is moved in preset speed, and a region at the silicon substrate back side is made to face nozzle；
Duty ratio table is looked into, account for corresponding with the average value is obtained according to the average value of the removal thickness of the metal bump in the region
Empty ratio, wherein the duty ratio table is built previously according to the removal thickness value of metal bump and the one-to-one relationship of duty ratio
Vertical；And
Preset pulse voltage and/or electric current are supplied to silicon substrate and nozzle, polishes the virtual voltage of metal bump in the region
And/or electric current is equal to duty ratio corresponding with the removal average value of thickness of the metal bump in the region multiplied by preset pulse
Voltage and or current.
2. through-silicon-via back metal flattening method according to claim 1, which is characterized in that in the step 1)
Further comprise between step 2):
One carrying tablet is set,
Wherein the surface of the carrying tablet is coated with conductive layer, is coated with conductive glue on conductive layer,
Wherein, it includes being pasted onto the front opposite with the back side of silicon substrate by the conductive glue of carrying tablet that the carrying tablet, which is arranged,
On the conductive layer of carrying tablet, so that the anode of the polishing power supply is electrically connected with the conductive layer of carrying tablet.
3. through-silicon-via back metal flattening method according to claim 2, which is characterized in that the conductive layer
Material is identical as the material of metal bump.
4. a kind of through-silicon-via back metal flattening method, which is characterized in that comprising steps of
A silicon substrate is provided, the silicon substrate has several metal bumps exposed from the back side of silicon substrate；And
The metal bump exposed from the back side of silicon substrate is planarized in a manner of unstressed electrochemical polish, so as to serve as a contrast from silicon
The height for the metal bump that the back side at bottom is exposed flushes, wherein it is described planarized in a manner of unstressed electrochemical polish it is described from
The step of metal bump that the back side of silicon substrate is exposed, further comprises:
1) by silicon substrate be placed in it is rotatable, be vertically movable and horizontally movable chuck on；
2) anode of a polishing power supply and silicon substrate are conducted and makes the cathode of the polishing power supply and is used for the back to silicon substrate
The nozzle of face jet electrolytic liquid is electrically connected；And
3) it is described polishing power supply power supply under, spray electrolyte to the back side of silicon substrate by nozzle so that electrolyte and
Electrochemical reaction occurs for the metal exposed from the back side of silicon substrate, and the step 3) further comprises: make electrolyte with from silicon
During electrochemical reaction occurs for the metal that the back side of substrate is exposed, by controlling the rotation speed of chuck and moving horizontally speed
It spends to control the removal thickness of metal bump；
The step of the removal thickness of metal bump is controlled described in wherein by controlling rotation speed and the horizontal movement velocity of chuck
Suddenly further comprise:
Obtain the shape appearance figure of the metal bump at the silicon substrate back side；
Set the object height value of metal bump；
The back side of silicon substrate is divided into several regions, calculates the average value of the removal thickness of metal bump in each region；
Revolution counter is looked into, card corresponding with the average value is obtained according to the average value of the removal thickness of metal bump in each region
The actual speed of disk, wherein the revolution counter be previously according to metal bump removal thickness value and chuck actual speed one
One corresponding relationship and establish；
The horizontal movement velocity and revolving speed of corresponding each region setting chuck；
By the actual speed of chuck corresponding with region each on same Radius compared with the revolving speed of setting, a revolving speed is obtained
Than, and calculate the mean speed ratio of all areas on same Radius；
By the horizontal movement velocity of the setting of chuck corresponding with region each on same Radius multiplied by corresponding with the region
Mean speed ratio, obtain the real standard movement speed of chuck corresponding with the region；And
When a region at the silicon substrate back side faces nozzle, preset voltage and or current is supplied to silicon substrate and nozzle, together
When drive chuck with actual speed corresponding with the region and real standard movement speed rotation and move horizontally.
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