CN104143507A - Wafer edge chip flattening method - Google Patents

Wafer edge chip flattening method Download PDF

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Publication number
CN104143507A
CN104143507A CN201310167821.XA CN201310167821A CN104143507A CN 104143507 A CN104143507 A CN 104143507A CN 201310167821 A CN201310167821 A CN 201310167821A CN 104143507 A CN104143507 A CN 104143507A
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ground
grinding head
wafer
downforce
grinding
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CN201310167821.XA
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CN104143507B (en
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王坚
杨贵璞
王晖
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ACM (SHANGHAI) Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625With simultaneous mechanical treatment, e.g. mechanico-chemical polishing

Abstract

The invention discloses a wafer edge chip flattening method. The method comprises the steps that a wafer to be ground is provided, and a plurality of chips to be ground are distributed on the wafer to be ground; the wafer to be ground is adsorbed to a grinding head, the grinding head is provided with an edge area and a center area, the downward pressure in the edge area of the grinding head is exerted on the edge area of the wafer to be ground, and the downward pressure in the center area of the grinding head is exerted on the center area of the wafer to be ground; the grinding head to which the wafer to be ground is adsorbed is moved to a grinding cushion; the downward pressure in the edge area of the grinding head is set to range from 4.5 psi to 6.0 psi, the downward pressure in the center area of the grinding head is set to range from 3.5 psi to 4.5 psi, the revolving speed of a rotary table is set to range from 100 rpm to 150 rpm, and the chips to be ground are ground to be with the thickness changing from the initial value to the first set value; the downward pressure in the edge area of the grinding head is set to range from 0.8 psi to 1.5 psi, the downward pressure in the center area of the grinding head is set to range from 0.7 psi to 1.2 psi, the revolving speed of the rotary table is set to range from 100 rpm to 150 rpm, and the chips to be ground are ground to be with the thickness changing from the first set value to the target value.

Description

Crystal round fringes chip flattening method
Technical field
The present invention relates to ic manufacturing technology field, relate in particular to a kind of crystal round fringes chip flattening method.
Background technology
In current integrated circuit fabrication process, cmp (CMP) is still important planarization.The up-and-down wafer of method effects on surface that cmp adopts chemical reaction and mechanical lapping to combine carries out planarization, its technical process is as follows: first by wafer adsorption to be ground under grinding head, then to grinding head, apply downward pressure, the face to be ground of wafer is pressed on grinding pad, then the surperficial turntable that posts grinding pad rotates under the driving of motor, meanwhile, grinding head also carries out rotating in same direction, in grinding head and turntable rotation, lapping liquid is fed on grinding pad by lapping liquid supply pipe, under the effect of the centrifugal force that lapping liquid produces in turntable rotation, be distributed on grinding pad, the grinding of realization to wafer.Yet along with integrated number of elements in the chip unit are on wafer constantly increases, the characteristic size of element constantly diminishes, to chip planarization, realize chip surface uniformity, conforming difficulty further strengthens.
Conventionally, after adopting existing chemical and mechanical grinding method to grind wafer, easily there is inhomogeneous, inconsistent phenomenon in the chip surface that is positioned at crystal round fringes region, as shown in Figure 6, for the actual pattern after wafer 100 cmps, the fringe region that can find out wafer 100 is uneven, and this kind of phenomenon can cause adverse effect to follow-up photoetching process.As shown in Figure 7, during photoetching, at the surperficial spin coating photoresist of wafer 100, form one deck photoresist layer, afterwards photoresist layer is exposed and development step, with the photoresist layer to wafer 100 surfaces by the design transfer on mask plate 110.In exposure process, the surface of wafer 100 is more smooth, and the pattern that is transferred to the photoresist layer on wafer 100 surfaces will be more clear.If the surface of wafer 100 is uneven among a small circle, pattern cannot be transferred on wafer 100 clearly, thereby cause exposing unsuccessfully, finally cause the chip on wafer unavailable.As shown in Figure 8, wafer 100 central areas are because its surface is very smooth, and chip exposure is normal, and wafer frontside edge region is because its surface is uneven, and chip exposes unsuccessfully.Therefore the chip planarization that, how to improve wafer frontside edge region is a urgent need to solve the problem.
Summary of the invention
The object of this invention is to provide a kind of crystal round fringes chip flattening method, the method can improve the planarization of crystal round fringes chip, realizes chip surface uniformity, consistency.
For achieving the above object, a kind of crystal round fringes chip flattening method provided by the invention, comprises the steps: to provide wafer to be ground, and some chips to be ground distribute on wafer to be ground; By wafer adsorption to be ground under grinding head, grinding head has fringe region and central area, downforce in the fringe region of grinding head acts on the fringe region of wafer to be ground, and the downforce in the central area of grinding head acts on the central area of wafer to be ground; Absorption is needed to the grinding head of grinding crystal wafer to be moved on grinding pad; The downforce arranging in the fringe region of grinding head is 4.5-6.0psi, and the downforce in the central area of grinding head is 3.5-4.5psi, and the rotating speed of turntable is 100-150rpm, and the thickness of chip to be ground is ground to the first set point from initial value; And the downforce arranging in the fringe region of grinding head is 0.8-1.5psi, the downforce in the central area of grinding head is 0.7-1.2psi, and the rotating speed of turntable is 100-150rpm, and the thickness of chip to be ground is ground to desired value from the first set point.
In one embodiment, downforce in the fringe region of grinding head is set is 4.5-6.0psi, downforce in the central area of grinding head is 3.5-4.5psi, the rotating speed of turntable is 100-150rpm, by the thickness of chip to be ground after initial value is ground to the step of the first set point, and the downforce in the fringe region of grinding head is set is 0.8-1.5psi, downforce in the central area of grinding head is 0.7-1.2psi, the rotating speed of turntable is 100-150rpm, before the thickness of chip to be ground is ground to the step of desired value from the first set point, further comprise: the downforce arranging in the fringe region of grinding head is 2-3.5psi, downforce in the central area of grinding head is 1.8-3.0psi, the rotating speed of turntable is 100-150rpm, by one time period of grinding wafer to be ground.This time period is 5~10 seconds.
In one embodiment, the area in crystal round fringes to be ground region accounts for 6%~25% of total wafer area to be ground.
In one embodiment, grinding pad has the zone line between fringe region, central area and fringe region and central area, and the time that the time that described trimmer stops in fringe region and the central area of grinding pad stops than the zone line at grinding pad is long.
In one embodiment, trimmer is at the uniform velocity non-in fringe region to the translational speed in the radius of central area of grinding pad.The velocity variations track that trimmer moves is sine curve or cosine curve.
In sum, crystal round fringes chip flattening method of the present invention grinds by treating stage by stage grinding crystal wafer, and in the first grinding stage, fringe region and the downforce in central area of grinding head are larger, both can improve uniformity and consistency that grinding rate also can improve chip surface to be ground, especially can improve uniformity and the consistency of chip surface of the fringe region of wafer to be ground.In the second grinding stage, fringe region and the downforce in central area of grinding head are less, can further improve uniformity and the consistency of chip surface of the fringe region of wafer to be ground.
Accompanying drawing explanation
Fig. 1 has disclosed according to the section of structure before the crystal round fringes chip cmp in the specific embodiment of the invention.
Fig. 2 has disclosed according to the section of structure after the crystal round fringes chip cmp in the specific embodiment of the invention.
Fig. 3 is the structural representation of chemical mechanical polishing device.
Fig. 4 is the cross-sectional view of grinding head.
Fig. 5 has disclosed according to the flow chart of an embodiment of crystal round fringes chip flattening method of the present invention.
Fig. 6 is the pattern schematic diagram after adopting existing method to wafer cmp.
The schematic diagram of Fig. 7 for the wafer in Fig. 6 is carried out to photoetching.
Fig. 8 is the schematic diagram after the wafer photolithography in Fig. 7.
Embodiment
By describing technology contents of the present invention in detail, being reached object and effect, below in conjunction with embodiment and coordinate graphic detailed description in detail.
Consult Fig. 1 and Fig. 2, disclosed according to the forward and backward section of structure of crystal round fringes chip cmp in the specific embodiment of the invention.In the present embodiment, the chip structure on wafer is aluminum interconnecting construction, take aluminum interconnecting construction as example, and crystal round fringes chip flattening method of the present invention is described in detail.The forming process of aluminum interconnecting construction comprises: the material that first deposits the first tack coat 220, the first tack coats 220 on silicon substrate 210Huo Qian road interlayer dielectric layer is generally titanium or titanium nitride; Then depositing metal layers 230 on the first tack coat 220, the material of metal level 230 is aluminium; Then the material that deposits the second tack coat 240, the second tack coats 240 on metal level 230 is generally titanium or titanium nitride; Then the second tack coat 240, metal level 230 and the first tack coat 220 are carried out to etching, form groove; Then in groove and the second tack coat 240 plated metal interlayer dielectric layers 250.The surface of the metal interlamination medium layer 250 of deposition is often uneven, and as shown in Figure 1, for carrying out smoothly of subsequent technique, next needs metal interlamination medium layer 250 planarizations.Conventional method is the method for cmp.Yet existing chemical and mechanical grinding method can only guarantee the metal interlamination medium layer 250 planarization effects of the chip in crystal circle center region, and the metal interlamination medium layer 250 planarization effects of the chip in crystal round fringes region are poor.Crystal round fringes chip flattening method provided by the invention can solve the problem of metal interlamination medium layer 250 planarization weak effects of the chip in existing crystal round fringes region.
Consult Fig. 3 and Fig. 4, for implementing the chemical mechanical polishing device of crystal round fringes chip flattening method of the present invention, comprise grinding head 310, trimmer 320, lapping liquid supply pipe 330, grinding pad 340 and turntable, because the concrete structure of this chemical mechanical polishing device is identical with existing chemical mechanical polishing device with function and be well known to those skilled in the art, therefore repeat no more, only grinding head 310 be described further.Grinding head 310 comprises spacing ring 311, barrier film 312 and interior rubber tube 313.Grinding head 310 has a plurality of concentric circular regions, in the present embodiment, grinding head 310 has three concentric circular regions, is respectively first area 314, second area 315 and the 3rd region 316, can be by each region is applied to the effect that different downforce is adjusted grinding.Downforce in first area 314 acts on the fringe region of grinding pad 340 and wafer to be ground by spacing ring 311, therefore, first area 314 may also be referred to as the fringe region of grinding head 310, in the present invention, the area in crystal round fringes to be ground region accounts for 6%~25% of total wafer area to be ground.Downforce in second area 315 by barrier film 312 act on wafer to be ground except extra-regional central area, edge, therefore, second area 315 may also be referred to as the central area of grinding head 310.Downforce in the 3rd region 316 acts on crystal column surface to be ground by interior rubber tube 313, and the abrasive action that this downforce is treated grinding crystal wafer is less, is mainly used in detecting wafer to be ground and whether is adsorbed in grinding head 310 times.
Consult Fig. 5, disclosed according to the flow chart of an embodiment of crystal round fringes chip flattening method of the present invention, the method specifically comprises the steps:
S001: wafer to be ground is provided, and some chips to be ground distribute on wafer to be ground;
S002: by wafer adsorption to be ground in grinding head 310 times;
S003: absorption is needed to the grinding head 310 of grinding crystal wafer and move on grinding pad 340;
S004: the downforce arranging in the fringe region of grinding head 310 is 4.5-6.0psi, downforce in the central area of grinding head 310 is 3.5-4.5psi, the rotating speed of turntable is 100-150rpm, the thickness of chip to be ground is ground to the first set point from initial value, for example, the initial value of metal interlamination medium layer 250 is 10000 dusts, in this step, the thickness of metal interlamination medium layer 250 is ground to 7500 dusts from 10000 dusts;
S005: the downforce arranging in the fringe region of grinding head 310 is 0.8-1.5psi, downforce in the central area of grinding head 310 is 0.7-1.2psi, the rotating speed of turntable is 100-150rpm, the thickness of chip to be ground is ground to desired value from the first set point, for example, the thickness of metal interlamination medium layer 250 is ground to target thickness 4500 dusts from 7500 dusts.
Preferably, for fear of the fringe region of grinding head 310 and the downforce in central area, change fast at short notice and treat grinding crystal wafer and cause damage, after step S004, and before step S005, also comprise a transition step: the downforce arranging in the fringe region of grinding head 310 is 2-3.5psi, downforce in the central area of grinding head 310 was 1.8-3.0psi, and the rotating speed of turntable is 100-150rpm, by grinding wafer to be ground 5~10 seconds.
Wafer to be ground is in process of lapping, grinding head 310 and trimmer 320 except with turntable rotating Vortex also move left and right, in order to prevent grinding head 310 and trimmer 320 collisions, set grinding head 310 consistent with the movement locus that trimmer 320 moves left and right, be that grinding head 310 is when move right, trimmer 320 also moves right, and when grinding head 310 is moved to the left, trimmer 320 is also moved to the left.In addition, because wafer to be ground is in process of lapping, grinding head 310 and trimmer 320 all move in the radius region at edge to the center of grinding pad 340, As time goes on, the fringe region of grinding pad 340 and central area can be thicker than the zone line between the fringe region of grinding pad 340 and central area, thereby affect the planarization effect of chip to be ground.For head it off, during grinding, the time that the time that trimmer 320 stops in fringe region and the central area of grinding pad 340 stops than the zone line at grinding pad 340 is long.Trimmer 320 is at the uniform velocity non-at the fringe region of grinding pad 340 to the translational speed in the radius of central area, and the velocity variations track that trimmer 320 moves is sine curve or cosine curve.
From the above, crystal round fringes chip flattening method of the present invention grinds by treating stage by stage grinding crystal wafer, and in the first grinding stage, fringe region and the downforce in central area of grinding head 310 are larger, both can improve uniformity and consistency that grinding rate also can improve chip surface to be ground, especially can improve uniformity and the consistency of chip surface of the fringe region of wafer to be ground.In the second grinding stage, fringe region and the downforce in central area of grinding head 310 are less, can further improve uniformity and the consistency of chip surface of the fringe region of wafer to be ground.
In sum, crystal round fringes chip flattening method of the present invention illustrates by above-mentioned execution mode and correlative type, concrete, full and accurate exposure correlation technique, those skilled in the art can be implemented according to this.And the above embodiment is just used for illustrating the present invention, rather than be used for limiting of the present invention, interest field of the present invention, should be defined by claim of the present invention.

Claims (7)

1. a crystal round fringes chip flattening method, is characterized in that, comprises step:
Wafer to be ground is provided, and some chips to be ground distribute on wafer to be ground;
By wafer adsorption to be ground under grinding head, grinding head has fringe region and central area, downforce in the fringe region of grinding head acts on the fringe region of wafer to be ground, and the downforce in the central area of grinding head acts on the central area of wafer to be ground;
Absorption is needed to the grinding head of grinding crystal wafer to be moved on grinding pad;
The downforce arranging in the fringe region of grinding head is 4.5-6.0psi, and the downforce in the central area of grinding head is 3.5-4.5psi, and the rotating speed of turntable is 100-150rpm, and the thickness of chip to be ground is ground to the first set point from initial value; And
The downforce arranging in the fringe region of grinding head is 0.8-1.5psi, and the downforce in the central area of grinding head is 0.7-1.2psi, and the rotating speed of turntable is 100-150rpm, and the thickness of chip to be ground is ground to desired value from the first set point.
2. crystal round fringes chip flattening method according to claim 1, it is characterized in that, downforce in the fringe region of grinding head is set is 4.5-6.0psi, downforce in the central area of grinding head is 3.5-4.5psi, the rotating speed of turntable is 100-150rpm, by the thickness of chip to be ground after initial value is ground to the step of the first set point, and the downforce in the fringe region of grinding head is set is 0.8-1.5psi, downforce in the central area of grinding head is 0.7-1.2psi, the rotating speed of turntable is 100-150rpm, before the thickness of chip to be ground is ground to the step of desired value from the first set point, further comprise: the downforce arranging in the fringe region of grinding head is 2-3.5psi, downforce in the central area of grinding head is 1.8-3.0psi, the rotating speed of turntable is 100-150rpm, by one time period of grinding wafer to be ground.
3. crystal round fringes chip flattening method according to claim 2, is characterized in that, the described time period is 5~10 seconds.
4. crystal round fringes chip flattening method according to claim 1, is characterized in that, the area in described crystal round fringes to be ground region accounts for 6%~25% of total wafer area to be ground.
5. crystal round fringes chip flattening method according to claim 1, it is characterized in that, described grinding pad has the zone line between fringe region, central area and fringe region and central area, and the time that the time that described trimmer stops in fringe region and the central area of grinding pad stops than the zone line at grinding pad is long.
6. crystal round fringes chip flattening method according to claim 5, is characterized in that, described trimmer is at the uniform velocity non-in fringe region to the translational speed in the radius of central area of grinding pad.
7. crystal round fringes chip flattening method according to claim 6, is characterized in that, the velocity variations track that described trimmer moves is sine curve or cosine curve.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107052984A (en) * 2017-06-14 2017-08-18 北京半导体专用设备研究所(中国电子科技集团公司第四十五研究所) Crystal round fringes site flatness optimization method in CMP process
CN112198416A (en) * 2020-09-28 2021-01-08 上海华力集成电路制造有限公司 Layer removing method for improving chip flatness
CN112677031A (en) * 2020-12-23 2021-04-20 华虹半导体(无锡)有限公司 Method for carrying out CMP treatment on copper metal layer
CN113084692A (en) * 2021-04-27 2021-07-09 上海芯物科技有限公司 Chemical mechanical polishing method and chemical mechanical polishing apparatus
CN114473842A (en) * 2020-11-11 2022-05-13 中国科学院微电子研究所 Grinding disc, chemical mechanical polishing device, system and method

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CN101417407A (en) * 2007-10-25 2009-04-29 中芯国际集成电路制造(上海)有限公司 Chemical mechanical grinding method
JP2010067805A (en) * 2008-09-11 2010-03-25 Seiko Epson Corp Grinding device, grinding method, and method of manufacturing semiconductor device

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US6213847B1 (en) * 1998-05-20 2001-04-10 Nec Corporation Semiconductor wafer polishing device and polishing method thereof
CN1447394A (en) * 2002-03-25 2003-10-08 联华电子股份有限公司 Chemical-mechanical grinding head possessing floating obstruct ring
JP2008062353A (en) * 2006-09-08 2008-03-21 Disco Abrasive Syst Ltd Grinding method and grinding device
CN101417407A (en) * 2007-10-25 2009-04-29 中芯国际集成电路制造(上海)有限公司 Chemical mechanical grinding method
JP2010067805A (en) * 2008-09-11 2010-03-25 Seiko Epson Corp Grinding device, grinding method, and method of manufacturing semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107052984A (en) * 2017-06-14 2017-08-18 北京半导体专用设备研究所(中国电子科技集团公司第四十五研究所) Crystal round fringes site flatness optimization method in CMP process
CN112198416A (en) * 2020-09-28 2021-01-08 上海华力集成电路制造有限公司 Layer removing method for improving chip flatness
CN114473842A (en) * 2020-11-11 2022-05-13 中国科学院微电子研究所 Grinding disc, chemical mechanical polishing device, system and method
CN112677031A (en) * 2020-12-23 2021-04-20 华虹半导体(无锡)有限公司 Method for carrying out CMP treatment on copper metal layer
CN112677031B (en) * 2020-12-23 2023-03-10 华虹半导体(无锡)有限公司 Method for carrying out CMP treatment on copper metal layer
CN113084692A (en) * 2021-04-27 2021-07-09 上海芯物科技有限公司 Chemical mechanical polishing method and chemical mechanical polishing apparatus

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Address after: 201203 building 4, No. 1690, Cailun Road, free trade zone, Pudong New Area, Shanghai

Patentee after: Shengmei semiconductor equipment (Shanghai) Co., Ltd

Address before: 201203 Shanghai Zhangjiang High Tech Park of Pudong New Area Cailun Road No. 4 1690

Patentee before: ACM (SHANGHAI) Inc.