CN104135244A - Method and device for compensating for resistance process deviation, resistors and RC oscillators - Google Patents

Abstract

The invention is suitable for the field of integrated circuits, and provides a method and a device for compensating for a resistance process deviation, zero-temperature-coefficient resistors and RC oscillators. The method comprises the following steps: generating a first RC oscillation signal and a second RC oscillation signal; generating a count value according to the first RC oscillation signal and the second RC oscillation signal, wherein the count value comprises resistance process deviation information; computing a resistance process deviation value according to the count value; and compensating for the resistors according to the resistance process deviation value in order that the resistors have zero temperature coefficients. A clock of one RC oscillator is used for counting a clock of another RC oscillator, the resistance process deviation value is computed through a computing unit by using the count value reflecting relative process deviation information between the resistors having reverse temperature coefficients, and a resistor of a third RC oscillator is compensated by using the resistance process deviation value, so that the resistor of the third RC oscillator is changed into the zero-temperature-coefficient resistor reliably and effectively, and the temperature compensating aim is fulfilled.

Description

A kind of compensation method, device, resistance and RC oscillator of resistance process deviation

Technical field

The invention belongs to integrated circuit fields, relate in particular to a kind of resistance process deviation compensation method, device, zero-temperature coefficient resistance and there is the RC oscillator of temperature compensation characteristic.

Background technology

Digital circuit in digital-to-analogue mixed signal chip needs frequency clock signal accurately conventionally, and clock signal is produced by oscillator at chip internal.RC oscillator structure is simple, and integrated level is high, functional, thereby has obtained studying widely and applying.

In conventional RC oscillator, by the current system via resistance control, electric capacity being charged or discharged operates.In the time that the voltage on electric capacity reaches the upper limit (or higher than certain threshold value), switching device shifter starts electric capacity to discharge; In the time that the voltage on electric capacity reaches lower limit (or lower than certain threshold value), switching device shifter starts electric capacity to charge, so the voltage on electric capacity produces and swings back and forth between upper voltage limit and lower voltage limit, forms oscillator signal.Charging and discharging speed to electric capacity is controlled via the electric current of resistance.

But, in CMOS technique all there is larger technique dispersiveness in MOS device, electric capacity, resistance, and all with temperature coefficient, the frequency that causes RC oscillator to produce is often accurate not, need in the chip of high accuracy clock signal just inapplicablely at some, especially the temperature coefficient of resistance is normally difficult to uncared-for on the impact of clock.

Prior art conventionally adopts (or in parallel) composition resistance R of connecting of resistance R 1 and the resistance R 2 with opposite temperature coefficients, by the ratio of resistance R 1 and the resistance of resistance R 2 is rationally set, thereby realizes the object of zero-temperature coefficient resistance.

Suppose that resistance R 1 is for positive temperature coefficient, resistance R 2 is negative temperature coefficient, so:

R1＝R1 ₀(1+α1(T-T ₀))，R2＝R2 ₀(1-α2(T-T ₀)) (1)

Wherein, T ₀for rated temperature (conventionally choosing 25 DEG C), R1 ₀, R2 ₀be respectively resistance R 1, resistance R 2 at rated temperature T ₀resistance under (conventionally choosing 25 DEG C), is called specified resistance, and the temperature coefficient of resistance R 1 is positive temperature coefficient α 1, and the temperature coefficient of resistance R 2 is negative temperature coefficient-α 2.

Design object is that, for arbitrary temp T, R1 and R2 sum are constant R0 (temperature independent), that is: R1+R2=R ₀.According to this constraints, equation (1) is converted, obtain:

${R1}_0=\frac{R_0\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2},{R2}_0=\frac{R_0\mathrm{\α}1}{\mathrm{\α}1+\mathrm{\α}2},\frac{{R2}_0}{{R1}_0}=\frac{\mathrm{\α}1}{\mathrm{\α}2}---\left(2\right)$

Visible resistance R 1 is distributed all-in resistance R according to the ratio of temperature coefficient completely with resistance R 2 ₀(R ₀=R1+R2), therefore must ensure specified resistance R2 ₀with specified resistance R1 ₀ratio must under any circumstance all equal α 1 α 2, guarantee all-in resistance is zero-temperature coefficient.

But because resistance R 1 and resistance R 2 are made by different kind of material, its process deviation is often independent of one another, therefore its ratio coefficient can not ensure always constant under process deviation, the most serious in the situation that, even can reach ± 40% deviation, have a strong impact on the performance of resistance and application circuit.

Summary of the invention

The object of the embodiment of the present invention is to provide a kind of compensation method of resistance process deviation, is intended to solve the resistance deviation causing due to the technique dispersiveness in integrated circuit at present, thereby affects the performance of its application circuit, especially affects the problem of clock accuracy.

The embodiment of the present invention is achieved in that a kind of compensation method of resistance process deviation, and described method comprises the steps:

Generate a RC oscillator signal and the 2nd RC oscillator signal;

Generate count value according to a described RC oscillator signal and described the 2nd RC oscillator signal, described count value comprises resistance process deviation information;

Calculate resistance process deviation value according to described count value;

According to described resistance process deviation value, resistance is compensated, make resistance there is zero-temperature coefficient.

Another object of the embodiment of the present invention is to provide a kind of compensation arrangement of resistance process deviation, and described device comprises:

The one RC oscillator, for generating a RC oscillator signal;

The 2nd RC oscillator, for generating the 2nd RC oscillator signal;

Counter, the first input end of described counter is connected with the output of a described RC oscillator, the second input of described counter is connected with the output of described the 2nd RC oscillator, described counter is for generating count value according to a described RC oscillator signal and described the 2nd RC oscillator signal, and described count value comprises resistance process deviation information;

Computing unit, the input of described computing unit is connected with the output of described counter, for according to described count value calculated resistance process deviation value;

The 3rd RC oscillator, described the 3rd input of RC oscillator and the output of described computing unit are connected, and for according to described resistance process deviation value, resistance being compensated, make its resistance have zero-temperature coefficient;

A described RC oscillator is identical with described the 2nd RC oscillator structure, and has respectively a resistance for opposite temperature coefficients each other.

Another object of the embodiment of the present invention is the resistance of the zero-temperature coefficient that a kind of compensation method that adopts above-mentioned resistance process deviation is provided, and adopts the RC oscillator with temperature compensation characteristic of the resistance of this zero-temperature coefficient.

The embodiment of the present invention utilizes the clock of a RC oscillator to count the clock of another RC oscillator, and this count value that has reflected the relative process deviation information between the resistance with opposite temperature coefficients is calculated to resistance process deviation value by computing unit, again this resistance process deviation value is compensated the resistance of the 3rd RC oscillator, reliably vanishing temperature coefficient of resistance effectively of the resistance that makes the 3rd RC oscillator, realized temperature-compensating object, and resistance after compensation all can be accurately under any process deviation, stably work.

Brief description of the drawings

The flow chart of the compensation method of the resistance process deviation that Fig. 1 provides for the embodiment of the present invention;

Count window schematic diagram in the compensation method of the resistance process deviation that Fig. 2 provides for the embodiment of the present invention;

The structure chart of the compensation arrangement of the resistance process deviation that Fig. 3 provides for the embodiment of the present invention;

The structure chart of the 3rd RC oscillator in the compensation arrangement of the resistance process deviation that Fig. 4 provides for the embodiment of the present invention.

Embodiment

In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.

The embodiment of the present invention utilizes the clock of a RC oscillator to count the clock of another RC oscillator, and this count value that has reflected the relative process deviation information between the resistance with opposite temperature coefficients is calculated to resistance process deviation value by computing unit, again this resistance process deviation value is compensated the resistance of the 3rd RC oscillator, reliably vanishing temperature coefficient of resistance effectively of the resistance that makes the 3rd RC oscillator, has realized temperature-compensating object.

Below in conjunction with specific embodiment, realization of the present invention is described in detail:

Fig. 1 shows the flow process of the compensation method of the resistance process deviation that the embodiment of the present invention provides, and for convenience of explanation, only shows part related to the present invention.

As one embodiment of the invention, the compensation method of this resistance process deviation comprises the steps:

In step S101, generate a RC oscillator signal F _clk1with the 2nd RC oscillator signal F _clk2, a RC oscillator signal and corresponding resistance R 1, the R2 of the 2nd RC oscillator signal have contrary temperature coefficient;

In embodiments of the present invention, with reference to the structure of figure 3, generate the first clock signal F by a RC oscillator 201 and the 2nd RC oscillator 202 respectively _clk1with second clock signal F _clk2, expression formula is:

$F_{\mathrm{clk}1}=\frac{1}{R1\·C}=\frac{1}{{R1}_0[1+\mathrm{\α}1\·(T-T_0)]\·C}$

$F_{\mathrm{clk}2}=\frac{1}{R2\·C}=\frac{1}{{R2}_0[1-\mathrm{\α}2\·(T-T_0)]\·C}$

Wherein, T ₀for rated temperature (conventionally choosing 25 DEG C), R1 ₀, R2 ₀be respectively resistance R 1, the resistance of resistance R 2 under rated temperature (conventionally choosing 25 DEG C), be called specified resistance, the temperature coefficient of resistance R 1 is positive temperature coefficient α 1, and the temperature coefficient of resistance R 2 is negative temperature coefficient-α 2.

Because resistance process deviation testing process is only carried out once in the chip stage of dispatching from the factory, and be under rated temperature, i.e. T=T ₀, therefore frequency of oscillation is also the frequency of oscillation under rated resistance condition, expression formula is as follows:

$F_{\mathrm{clk}1}=\frac{1}{{R1}_{0}C},F_{\mathrm{clk}2}=\frac{1}{{R2}_{0}C}---\left(3\right)$

After testing process finishes, can close a RC oscillator 201 and the 2nd RC oscillator 202 by closing the modes such as enable signal, make it no longer bring power consumption to chip.

Should be noted that:

For example, in order to allow the non-ideal factor (time delay of inverter, the time delay of comparator, speed of charge pump etc.) little of ignoring on the impact of frequency of oscillation, the RC oscillator 201 detecting for resistance process deviation and the frequency of the 2nd RC oscillator 202 should arrange suitably lowlyer, conventionally for example, at tens kHz rank, 32kHz.

In step S102, according to a RC oscillator signal F _clk1with the 2nd RC oscillator signal F _clk2generate count value q, this count value comprises process deviation information;

As one embodiment of the invention, the concrete steps of step S102 are:

First, set p second clock signal F _clk2cycle be gate time window;

Secondly, in this gate time window to the first clock signal F _clk1cycle count, generate count value q.

In embodiments of the present invention, with reference to figure 2, set p second clock signal F _clk2cycle be gate time window, in this time window to the first clock signal F _clk1count, suppose that inside counting value is during this period of time q, that is to say, at p second clock signal F _clk2cycle inside counting q the first clock signal F _clk1in the cycle, therefore there is equation: p × T _clk2=q × T _clk1.

Be to be understood that ground, as one embodiment of the invention, both can be with second clock signal F _clk2cycle be the reference cycle, also can be with the first clock signal F _clk1cycle be the reference cycle, that is, set multiple the first clock signal F _clk1cycle be gate time window, in this gate time window to second clock signal F _clk2cycle count, generate count value.

Conventionally, counting error is ± 1, therefore needs only gate time long enough, and count results will be enough large so, and precision will be enough high so.This counting mode almost can reach arbitrary accuracy, and is only the simple series connection of several d type flip flops on realizing.

In step S103, calculate resistance process deviation value ρ % according to count value q;

As one embodiment of the invention, the step that calculates resistance process deviation value ρ % according to count value q is specially:

According to RC frequency of oscillation expression formula and count value, obtain the relational equation of count value and rated value of resistance;

The relational equation of bringing preset resistance process deviation information into described count value and rated value of resistance, obtains the relational equation of resistance process deviation information and count value;

Utilize the relational equation of this resistance process deviation information and count value, and make a RC oscillator signal and temperature coefficient of resistance ratio corresponding to the 2nd RC oscillator signal fix, calculate described resistance process deviation value.

Describe by specific embodiment below:

The expression formula (3) drawing according to step S101:

The equation drawing with step S102: p × T _clk2=q × T _clk1

So have: $\frac{F_{\mathrm{clk}1}}{F_{\mathrm{clk}2}}=\frac{q}{p}=\frac{{R2}_0}{{R1}_0}---\left(4\right)$

In fact,, due to process deviation, suppose the specified resistance R1 of resistance R 1 ₀deviation ε 1%, the specified resistance R2 of resistance R 2 ₀deviation ε 2%, and count value deviation is Δ q, equation (4) can be changed to so:

$\frac{q+\mathrm{\Δq}}{p}=\frac{{R2}_0(1+\mathrm{\ϵ}2\%)}{{R1}_0(1+\mathrm{\ϵ}1\%)}---\left(5\right)$

Wherein, ε 1% and ε 2% can be that positive number can be also negative, and count value deviation delta q can be also positive number or negative, and simultaneous equation (4) and equation (5) obtain:

Therefore, convert to derive calculate by equation, this count results has embodied the information of resistance process deviation.

Utilize equation (6) to regulate the specified resistance of resistance R 1 or resistance R 2, make R2 ₀with R1 ₀ratio cc 1 α 2 to maintain fixed value constant, thereby ensure that all-in resistance is zero-temperature coefficient.

Supposing need to be to R1 ₀the percentage regulating is ρ %, meets:

Recycling equation (6) solves: be that resistance process deviation value is ρ %, and this resistance process deviation value is only relevant with counting deviate with count value, irrelevant with ambient temperature.

In step S104, according to resistance process deviation value, target resistance R3 is compensated, make target resistance R3 there is zero-temperature coefficient.

This target resistance R3 comprises the first sub-resistance R 1' and the second sub-resistance R 2', both are the structure of serial or parallel connection, and there is contrary each other temperature coefficient, its structure is with reference to figure 4, R3'=R1'+R2', for example, carries out corresponding ratio adjusting to a sub-resistance (, the resistance R 1' of the 3rd RC oscillator 300) wherein by this resistance process deviation value, make the all-in resistance R1'+R2' of the 3rd RC oscillator 300 constant, there is zero-temperature coefficient.

Proof procedure is as follows:

In the ideal case, there is not process deviation in resistance:

$F_{\mathrm{clk}3}=\frac{1}{({R1}^{\′}+{R2}^{\′})C^{\′}}=\frac{1}{[{{R1}^{\′}}_0(1+\mathrm{\α}1(T-T_0))+{{R2}^{\′}}_0(1-\mathrm{\α}2(T-T_0))]\×C^{\′}}$

Due to: ${{R1}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2},{{R2}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}1}{\mathrm{\α}1+\mathrm{\α}2}$

Bringing above formula into obtains: $F_{\mathrm{clk}3}=\frac{1}{{R^{\′}}_0{C}^{\′}}---\left(9\right)$

Therefore, known according to equation (9), the clock signal F of the 3rd RC oscillator 300 _clk3temperature independent, the all-in resistance R1'+R2' of the 3rd RC oscillator 300 is constant, has zero-temperature coefficient.

Under non-ideality, resistance is before calibration:

${{R1}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}1\%),{{R2}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}1}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}2\%)$

Bring F into _clk3expression formula, have:

$F_{\mathrm{clk}3}=\frac{1}{{R^{\′}}_0{C}^{\′}}\×\frac{\mathrm{\α}1+\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2+\mathrm{\α}1\mathrm{\ϵ}2\%+\mathrm{\α}2\mathrm{\ϵ}1\%+\mathrm{\α}1\mathrm{\α}2(T-T_0)(\mathrm{\ϵ}1\%-\mathrm{\ϵ}2\%)}---\left(10\right)$

Visible now expression formula is very complicated, and and temperature correlation.Unless ε 1%=ε 2%, two kinds of dissimilar resistance process deviations just equate, at this moment F _clk3just temperature independent, otherwise F _clk3to there is relation with temperature, not reach the object of temperature-compensating.

Further, according to resistance process deviation value ρ %, resistance R 1' is regulated, has so:

${{R1}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}1\%)(1+\mathrm{\ρ}\%),{{R2}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}1}{{{R2}^{\′}}_0}=\frac{{R^{\′}}_0\mathrm{\α}1}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}2\%)$

Bring F into _clk3expression formula, and utilize equation (8), obtain:

$F_{\mathrm{clk}3}=\frac{1}{{R^{\′}}_0(1+\mathrm{\ϵ}2\%)\×C^{\′}}\text{---}\left(11\right)$

Known according to equation (11), frequency of oscillation F _clk3temperature independent, realize the object of temperature-compensating.

Although now the frequency of oscillator is no longer expected but become but this deviation is droop, when dispatching from the factory, does a frequency calibration and just eliminated.

In embodiments of the present invention, because the minimum value of Δ q is ± 1, and consider counting itself exist ± 1 uncertainty, if require resistance R 1' adjust minimum step be 0.5%, have so: therefore obtain q>400, have according to equation (4) in design process, conventionally allow F _clk1≈ F _clk2, can simplify like this implementation detail, so p>400; If further consider that whole process deviation scope inside counting device does not allow to overflow, need so to stay some allowances, it is much of that counter 203 is got 10bits (maximum count value 1023).

As one embodiment of the invention, can also, after step S103, before step S104, resistance process deviation value be stored in nonvolatile memory, to call when needed.

The embodiment of the present invention utilizes the clock of a RC oscillator to count the clock of another RC oscillator, and this count value that has reflected the relative process deviation information between the resistance with opposite temperature coefficients is calculated to resistance process deviation value by computing unit, again this resistance process deviation value is compensated the resistance of the 3rd RC oscillator, reliably vanishing temperature coefficient of resistance effectively of the resistance that makes the 3rd RC oscillator, realized temperature-compensating object, and resistance after compensation all can be accurately under any process deviation, stably work.

And, by adjusting the count value in equation (8), can improve accuracy of detection, count value is larger, also more accurate to the calculating of resistance process deviation, that is to say as long as count value is enough large, also just enough accurate to the calculating of coefficient ρ % so, and this coefficient is for the size of regulating resistance R1', as long as regulate this link also to do enough meticulously, so synthetic zero-temperature coefficient resistance, its temperature coefficient is also just more close to " zero-temperature coefficient ".

Fig. 3 shows the structure of the compensation arrangement of the resistance process deviation that the embodiment of the present invention provides, and for convenience of explanation, only shows part related to the present invention.

As one embodiment of the invention, the compensation arrangement of this resistance process deviation can be encapsulated in any chip thinks that chip provides stable clock signal accurately.

The compensation arrangement of this resistance process deviation comprises:

The one RC oscillator 201, for generating a RC oscillator signal;

The 2nd RC oscillator 202, for generating the 2nd RC oscillator signal;

Counter 203, the first input end of counter 203 is connected with the output of a RC oscillator 201, and the second input of counter 203 is connected with the output of the 2nd RC oscillator 202, and counter 203 is for according to a RC oscillator signal F _clk1with the 2nd RC oscillator signal F _clk2generate count value, this count value comprises resistance process deviation information;

Computing unit 204, the input of computing unit 204 is connected with the output of counter 203, for according to count value calculated resistance process deviation value;

The input of the 3rd RC oscillator 300, the three RC oscillators 300 is connected with the output of computing unit 204, for according to described resistance process deviation value, resistance being compensated, makes its resistance have zero-temperature coefficient.

As one embodiment of the present invention, the compensation arrangement of this resistance process deviation can also comprise:

Nonvolatile memory 205, for memory resistor process deviation value, is convenient to call, and the input of nonvolatile memory 205 is connected with the output of computing unit 204, and the output of nonvolatile memory 205 is connected with the input of the 3rd RC oscillator 300.

In embodiments of the present invention, in dashed rectangle 200, form the testing circuit of resistance process deviation, the one RC oscillator 201 and the 2nd RC oscillator 202 are for carrying out the detection of resistance process deviation, and the 3rd RC oscillator 300 is master oscillator, produce target frequency and use to chip.

Wherein, a RC oscillator 201 is identical with the structure of the 2nd RC oscillator 202, and the 3rd RC oscillator 300 can be identical with the structure of a RC oscillator 201 or the 2nd RC oscillator 202, also can be different.

In embodiments of the present invention, a RC oscillator 201 comprises resistance R 1 and capacitor C, and output frequency is the 2nd RC oscillator 202 comprises resistance R 2 and capacitor C, and output frequency is the 3rd RC oscillator 300 comprise the first sub-resistance R 1', the second sub-resistance R 2' and capacitor C ', its all-in resistance R3'=R1'+R2', output frequency is F _clk3.

Wherein resistance R 1 and R1' are same resistance, might as well establish its temperature coefficient for just, and resistance R 2 and R2' are another resistance, might as well establish its temperature coefficient for negative.Electric capacity (C or C') in three RC oscillators is all the electric capacity of same type, capacitance can be different, but should choose MIM (Metal-Insulator-Metal as far as possible, be metal-dielectric-metal) electric capacity or MOM (Metal-Oxide-Metal, be metal-titanium dioxide silicon-metal) electric capacity, because its linearity is good, temperature coefficient is very little, can ignore the temperature characterisitic impact of frequency of oscillation.

In all expression formulas, T ₀for rated temperature (conventionally choosing 25 DEG C), R1 ₀, R2 ₀be respectively resistance R 1, the resistance of resistance R 2 under rated temperature (conventionally choosing 25 DEG C), be called specified resistance, the temperature coefficient of resistance R 1 is positive temperature coefficient α 1, and the temperature coefficient of resistance R 2 is negative temperature coefficient-α 2.

Because resistance process deviation testing process is only carried out once in the chip stage of dispatching from the factory, and be under rated temperature, i.e. T=T ₀, therefore frequency of oscillation is also the frequency of oscillation under rated resistance condition, expression formula is as follows:

$F_{\mathrm{clk}1}=\frac{1}{{R1}_{0}C},F_{\mathrm{clk}2}=\frac{1}{{R2}_{0}C}---\left(3\right)$

After testing process finishes, can close a RC oscillator 201 and the 2nd RC oscillator 202 by closing the modes such as enable signal, make it no longer bring power consumption to chip.

Should be noted that:

For example, in order to allow the non-ideal factor (time delay of inverter, the time delay of comparator, speed of charge pump etc.) little of ignoring on the impact of frequency of oscillation, the RC oscillator 201 detecting for resistance process deviation and the frequency of the 2nd RC oscillator 202 should arrange suitably lowlyer, conventionally for example, at tens kHz rank, 32kHz.

In embodiments of the present invention, counter 203 is accepted the input of two frequencies, and one of them is as with reference to clock, for example F in Fig. 2 _clk2, another is as being counted clock, for example F in Fig. 2 _clk1, and reference clock and be counted clock and can exchange.

So first, set p second clock signal F _clk2cycle be gate time window;

Secondly, in this gate time window to the first clock signal F _clk1cycle count, generate count value q.

In embodiments of the present invention, with reference to figure 2, set p second clock signal F _clk2cycle be gate time window, in this time window to the first clock signal F _clk1count, suppose that inside counting value is during this period of time q, that is to say, at p second clock signal F _clk2cycle inside counting q the first clock signal F _clk1in the cycle, therefore there is equation: p × T _clk2=q × T _clk1.

Be to be understood that ground, as one embodiment of the invention, both can be with second clock signal F _clk2cycle be the reference cycle, also can be with the first clock signal F _clk1cycle be the reference cycle, that is, set multiple the first clock signal F _clk1cycle be gate time window, in this gate time window to second clock signal F _clk2cycle count, generate count value.

Conventionally, counting error is ± 1, therefore needs only gate time long enough, and count results will be enough large so, and precision will be enough high so.This counting mode almost can reach arbitrary accuracy, and is only the simple series connection of several d type flip flops on realizing.

As one embodiment of the invention, the step that calculates resistance process deviation value ρ % according to count value q is specially:

According to RC frequency of oscillation expression formula and count value, obtain the relational equation of count value and rated value of resistance;

The relational equation of bringing preset resistance process deviation information into described count value and rated value of resistance, obtains the relational equation of resistance process deviation information and count value;

Utilize the relational equation of this resistance process deviation information and count value, and make a RC oscillator signal and temperature coefficient of resistance ratio corresponding to the 2nd RC oscillator signal fix, calculate described resistance process deviation value.

Describe by specific embodiment below:

The expression formula (3) drawing according to step S101:

The equation drawing with step S102: p × T _clk2=q × T _clk1

So have: $\frac{F_{\mathrm{clk}1}}{F_{\mathrm{clk}2}}=\frac{q}{p}=\frac{{R2}_0}{{R1}_0}---\left(4\right)$

In fact,, due to process deviation, suppose the specified resistance R1 of resistance R 1 ₀deviation ε 1%, the specified resistance R2 of resistance R 2 ₀deviation ε 2%, and count value deviation is Δ q, equation (4) can be changed to so:

$\frac{q+\mathrm{\Δq}}{p}=\frac{{R2}_0(1+\mathrm{\ϵ}2\%)}{{R1}_0(1+\mathrm{\ϵ}1\%)}---\left(5\right)$

Wherein, ε 1% and ε 2% can be that positive number can be also negative, and count value deviation delta q can be also positive number or negative, and simultaneous equation (4) and equation (5) obtain:

Therefore, convert to derive calculate by equation, this count results has embodied the information of resistance process deviation.

Utilize equation (6) to regulate the specified resistance of resistance R 1 or resistance R 2, make R2 ₀with R1 ₀ratio cc 1 α 2 to maintain fixed value constant, thereby ensure that all-in resistance is zero-temperature coefficient.

Supposing need to be to R1 ₀the percentage regulating is ρ %, meets:

Recycling equation (6) solves: be that resistance process deviation value is ρ %, and this resistance process deviation value is only relevant with counting deviate with count value, irrelevant with ambient temperature.

According to resistance process deviation value, target resistance R3 is compensated, make target resistance R3 there is zero-temperature coefficient.This target resistance R3 comprises the first sub-resistance R 1' and the second sub-resistance R 2', both are the structure of serial or parallel connection, and there is contrary each other temperature coefficient, taking the structure of the 3rd RC oscillator 300 of Fig. 4 as example, the 3rd RC oscillator 300 comprises resistance R 1', R2', capacitor C ', and inverter A1 and A2 and clock output buffer A3, its all-in resistance R3'=R1'+R2', by this resistance process deviation value to a sub-resistance wherein (for example, the resistance R 1' of the 3rd RC oscillator 300) carry out corresponding ratio adjusting, make the all-in resistance R1'+R2' of the 3rd RC oscillator 300 constant, there is zero-temperature coefficient.

Proof procedure is as follows:

In the ideal case, there is not process deviation in resistance:

$F_{\mathrm{clk}3}=\frac{1}{({R1}^{\′}+{R2}^{\′})C^{\′}}=\frac{1}{[{{R1}^{\′}}_0(1+\mathrm{\α}1(T-T_0))+{{R2}^{\′}}_0(1-\mathrm{\α}2(T-T_0))]\×C^{\′}}$

Due to: ${{R1}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2},{{R2}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}1}{\mathrm{\α}1+\mathrm{\α}2}$

Bringing above formula into obtains: $F_{\mathrm{clk}3}=\frac{1}{{R^{\′}}_0{C}^{\′}}---\left(9\right)$

Therefore, known according to equation (9), the clock signal F of the 3rd RC oscillator 300 _clk3temperature independent, the all-in resistance R1'+R2' of the 3rd RC oscillator 300 is constant, has zero-temperature coefficient.

Under non-ideality, resistance is before calibration:

${{R1}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}1\%),{{R2}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}1}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}2\%)$

Bring F into _clk3expression formula, have:

$F_{\mathrm{clk}3}=\frac{1}{{R^{\′}}_0{C}^{\′}}\×\frac{\mathrm{\α}1+\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2+\mathrm{\α}1\mathrm{\ϵ}2\%+\mathrm{\α}2\mathrm{\ϵ}1\%+\mathrm{\α}1\mathrm{\α}2(T-T_0)(\mathrm{\ϵ}1\%-\mathrm{\ϵ}2\%)}---\left(10\right)$

Visible now expression formula is very complicated, and and temperature correlation.Unless ε 1%=ε 2%, two kinds of dissimilar resistance process deviations just equate, at this moment F _clk3just temperature independent, otherwise F _clk3to there is relation with temperature, not reach the object of temperature-compensating.

Further, according to resistance process deviation value ρ %, resistance R 1' is regulated, has so:

${{R1}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}2}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}1\%)(1+\mathrm{\ρ}\%),{{R2}^{\′}}_0=\frac{{R^{\′}}_0\mathrm{\α}1}{\mathrm{\α}1+\mathrm{\α}2}(1+\mathrm{\ϵ}2\%)$

Bring F into _clk3expression formula, and utilize equation (8), obtain:

$F_{\mathrm{clk}3}=\frac{1}{{R^{\′}}_0(1+\mathrm{\ϵ}2\%)\×C^{\′}}---\left(11\right)$

Known according to equation (11), frequency of oscillation F _clk3temperature independent, realize the object of temperature-compensating.

Although now the frequency of oscillator is no longer expected but become but this deviation is droop, when dispatching from the factory, does a frequency calibration and just eliminated.

In embodiments of the present invention, because the minimum value of Δ q is ± 1, and consider counting itself exist ± 1 uncertainty, if require resistance R 1' adjust minimum step be 0.5%, have so: therefore obtain p>400, have according to equation (4) in design process, conventionally allow F _clk1≈ F _clk2, can simplify like this implementation detail, so p>400; If further consider that whole process deviation scope inside counting device does not allow to overflow, need so to stay some allowances, it is much of that counter 203 is got 10bits (maximum count value 1023).

In chip application process, directly read resistance process deviation result from nonvolatile memory 205, and for one of them resistance of the 3rd RC oscillator 300 is adjusted to R1' or R2', make resistance (R1'+R2') the vanishing temperature coefficient of resistance of the 3rd RC oscillator 300, thereby RC oscillator 3 is exported temperature independent frequency of oscillation F _clk3.

Another object of the embodiment of the present invention is also the resistance of the zero-temperature coefficient that a kind of compensation method that adopts above-mentioned resistance process deviation is provided, and adopt the RC oscillator with temperature compensation characteristic of the resistance of this zero-temperature coefficient, it is worth emphasizing that, the resistance of this zero-temperature coefficient can be widely used in various chips, including but not limited to the RC oscillator with zero-temperature coefficient.

The embodiment of the present invention utilizes the clock of a RC oscillator to count the clock of another RC oscillator, and this count value that has reflected the relative process deviation information between the resistance with opposite temperature coefficients is calculated to resistance process deviation value by computing unit, again this resistance process deviation value is compensated the resistance of the 3rd RC oscillator, reliably vanishing temperature coefficient of resistance effectively of the resistance that makes the 3rd RC oscillator, realized temperature-compensating object, and resistance after compensation all can be accurately under any process deviation, stably work.

And, by adjusting the count value in equation (8), can improve accuracy of detection, count value is larger, also more accurate to the calculating of resistance process deviation, that is to say as long as count value is enough large, also just enough accurate to the calculating of coefficient ρ % so, and this coefficient is for the size of regulating resistance R1', as long as regulate this link also to do enough meticulously, so synthetic zero-temperature coefficient resistance, its temperature coefficient is also just more close to " zero-temperature coefficient ".

These are only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims (9)

1. a compensation method for resistance process deviation, is characterized in that, described method comprises the steps:

Generate a RC oscillator signal and the 2nd RC oscillator signal;

Generate count value according to a described RC oscillator signal and described the 2nd RC oscillator signal, described count value comprises resistance process deviation information;

Calculate resistance process deviation value according to described count value;

According to described resistance process deviation value, resistance is compensated, make resistance there is zero-temperature coefficient.

2. the method for claim 1, is characterized in that, the described step according to a described RC oscillator signal and described the 2nd RC oscillator signal generation count value is specially:

The cycle of setting multiple described the 2nd RC oscillator signals or a described RC oscillator signal is gate time window;

In described gate time window, the cycle of a described RC oscillator signal or described the 2nd RC oscillator signal is counted, generate count value.

3. the method for claim 1, is characterized in that, the described step that calculates resistance process deviation value according to described count value is specially:

According to the frequency expression formula of RC oscillator and described count value, obtain the relational equation of count value and rated value of resistance;

The relational equation of bringing preset resistance process deviation information into described count value and rated value of resistance, obtains the relational equation of resistance process deviation information and count value;

Utilize the relational equation of described resistance process deviation information and count value, and make a described RC oscillator signal and temperature coefficient of resistance ratio corresponding to the 2nd RC oscillator signal fix, calculate described resistance process deviation value.

4. the method for claim 1, it is characterized in that, after the described step that calculates resistance process deviation value according to described count value, before described step resistance being compensated according to described resistance process deviation value, described method can also comprise the steps:

Store described resistance process deviation value.

5. a compensation arrangement for resistance process deviation, is characterized in that, described device comprises:

The one RC oscillator, for generating a RC oscillator signal;

The 2nd RC oscillator, for generating the 2nd RC oscillator signal;

Counter, the first input end of described counter is connected with the output of a described RC oscillator, the second input of described counter is connected with the output of described the 2nd RC oscillator, described counter is for generating count value according to a described RC oscillator signal and described the 2nd RC oscillator signal, and described count value comprises resistance process deviation information;

Computing unit, the input of described computing unit is connected with the output of described counter, for according to described count value calculated resistance process deviation value;

The 3rd RC oscillator, described the 3rd input of RC oscillator and the output of described computing unit are connected, and for according to described resistance process deviation value, resistance being compensated, make its resistance have zero-temperature coefficient;

A described RC oscillator is identical with described the 2nd RC oscillator structure, and has respectively a resistance for opposite temperature coefficients each other.

6. device as claimed in claim 5, it is characterized in that, described counter is that multiple triggers are in series, be gate time window by setting the cycle of multiple described the 2nd RC oscillator signals or a described RC oscillator signal, and in described gate time window, a described RC oscillator signal or described the 2nd RC oscillator signal cycle are counted, generate count value.

7. device as claimed in claim 5, is characterized in that, described device also comprises:

Nonvolatile memory, for storing described resistance process deviation value, the input of described nonvolatile memory is connected with the output of described computing unit, and the output of described nonvolatile memory is connected with the input of described the 3rd RC oscillator.

8. a resistance for zero-temperature coefficient, is characterized in that, described resistance adopts the method as described in claim 1 to 4 any one to carry out resistance technique deviation compensation.

9. a RC oscillator with temperature compensation characteristic, described oscillator comprises the resistance of zero-temperature coefficient as claimed in claim 8.