CN104124961B - Logic inverter circuit based on memory resistors - Google Patents
Logic inverter circuit based on memory resistors Download PDFInfo
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- CN104124961B CN104124961B CN201410359201.0A CN201410359201A CN104124961B CN 104124961 B CN104124961 B CN 104124961B CN 201410359201 A CN201410359201 A CN 201410359201A CN 104124961 B CN104124961 B CN 104124961B
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Abstract
The invention discloses a logic inverter circuit based on memory resistors. The logic inverter circuit based on the memory resistors comprises a sixth memory resistor, a seventh memory resistor, a three state gate and a third resistor, wherein an input end of the sixth memory resistor is used as an input end of the logic inverter circuit, an input end of the seventh memory resistor is connected with supply voltage, a control end of the three state gate is connected with an output end of the sixth memory resistor, an input end of the three state gate is connected with an output end of the seventh memory resistor, an output end of the three state gate is grounded through the third resistor, and the output end of the seventh memory resistor is used as an output end of the logic inverter circuit. The logic inverter circuit based on the memory resistors can achieve a logical processing function of an existing gate circuit, improves reliability and flexibility of an electronic device, and simultaneously reduces cost, is superior to a traditional logic gate circuit based on COMS in the aspects of integration degrees, power dissipation, speed and the like, achieves unification of storage and processing of information, and facilitates overcoming of bottleneck problems caused by separation of the processing and the storage of the information in an existing computer system structure.
Description
Technical field
The invention belongs to digital circuit technique field, based on memristor patrol more particularly, to a kind of
Collect not circuit.
Background technology
Coming out that day from computer, scientist and technical staff just dream of that computer is also some day
Can work as human brain.The first memristor in the world is developed from U.S.'s in April, 2008 HP Lab,
Thus since confirming the existence of " the 4th kind of electronic component " memristor, memristor passes through simplified package
The outstanding behaviours that can provide internal memory and logic function receives the concern of scientist, simulates brain with it
Synapse just becomes the target of many scientists struggle.The one of Univ Michigan-Ann Arbor USA in 2009
Individual research group is made for a kind of memristor circuit simulating brain synapse it was confirmed before relative to memristor
Device can be used for the imagination that computer neutral net makes.Correlative theses is published in 2012 " nanometer bulletin "
On (K.H.Kim, S.Gaba, W.Lu, etc., Nano Lett, 12,389-395,2012) magazine.Memristor
It is a kind of computer components, internal memory and logic function can be provided in a simplified package.Before this, due to can
By property and repeatability problem, shown is all the circuit of only minority memristor, and research worker this
Secondary displaying is then based on silicon memristor system can be with cmos compatible VHD memory array.Grind
Study carefully group's bi-material silicon extremely common in current computer chip and silver as memristor
Make raw material.Simulated by the method filling silicon silver mixture in the crossover sites of two metal electrodes
The working method of brain synapse: metal electrode therein is equivalent to two neurons, and is filled in centre
Silicon silver mixture be then equivalent to synapse.This device is considered to provide one allows memristor store data
New method.When the time interval that two electrodes apply the signal of telecommunication is 20 milliseconds, electric current is at two
The time being obstructed between electrode is exactly 40 milliseconds, and signal can be temporarily stored in memristor without losing.This with
The mode of brain synapse transmission information is very much like.It is this that this lead study author claims memristor to be through
Mode carrys out the behavior of analog neuron synapse.Although this equipment is at present also in the experimental stage, but its table
Understand that the mankind the most before go a step further to producing the computer worked as brain.
The characteristic of memristor is by the relationship description between electric charge and magnetic flux, and magnetic flux is counting
Definition on is the voltage integration about the time.Relation between electric charge and magnetic flux can be used to generally
Including any kind of both-end element, every both-end element meeting this relation is all this type, claims
For memristor system, the resistance of the latter depends on the internal state of system.A lot of systems broadly fall into memristor
System, as internal state depends on temperature, the molecule etc. that resistance changes with atomic structure difference.Base
It is all the special case of memristor system in the memristor that impurity drift and state are excessive.Along with the miniaturization of device,
Memristor shows the characteristic different from common COMS device, this is because at nanoscale, electronics
Dynamic characteristic with ion may be largely dependent upon the historic state of system, except non-easily
The property lost storage medium should outward, this system also has other the most promising application, as made neural shape
State device comes learning by imitation biology adaptivity, idiopathic behavior；In conjunction with the distinctive storage of memristor
With disposal ability, make nm logic device, make the storage of information carry out with processing, the present invention simultaneously
It it is i.e. application based on memristor logic processing capability.
In the higher performance that faces the future calculates the leap of system, convention computer architecture realizes in technology
The storage of information and process are to separate, and face the challenge of a lot of important bottleneck problem, including storage wall
Problem (Derrien, S.；Raj opadhye, S., 2000IEEE Symposium on FPCCM, 329-330), merit
Consumption problem, integrity problem etc., existing logic gates is mainly based upon the gate circuit of COMS, collection
One-tenth degree is low, power consumption is high and power down is easily lost.
Summary of the invention
For the defect of prior art, it is an object of the invention to provide a kind of logic based on memristor
Not circuit, it is intended to solve that existing gate circuit integrated level based on COMS is low, power consumption is high and falls
The problem that electricity is easily lost.
For achieving the above object, the invention provides a kind of logic inverter circuit based on memristor, bag
Include: the 6th memristor, the 7th memristor, triple gate, the 3rd resistance；Described 6th memristor defeated
Enter the end input as described not circuit；The input of described 7th memristor connects supply voltage；
The Enable Pin of described triple gate is connected to the outfan of described 6th memristor, the input of described triple gate
End is connected to the outfan of described 7th memristor, and the outfan of described triple gate is by described 3rd electricity
Resistance ground connection；The outfan of described 7th memristor is as the outfan of described not circuit.
Further, described logic inverter circuit also includes: the second electric pressure converter and the 4th resistance；
The input end of clock of described second electric pressure converter connects CLK clock signal, described second voltage conversion
The input of device is connected to the input of described 6th memristor, the output of described second electric pressure converter
End is connected to the outfan of described 6th memristor；Described 4th resistance is connected to described 6th memristor
Input and ground between.
The present invention uses memristor as the core texture of gate circuit, can not only realize existing gate circuit
Logical process function, improves reliability and the motility of electronic equipment, reduces cost simultaneously, also
It is better than traditional logic gates based on COMS at aspects such as integrated level, power consumption, speed, it is achieved
The storage of information and the unification of process, be conducive to overcoming information processing in computer nowadays system structure
The bottleneck problem caused is separated with storage.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the AND circuit that the embodiment of the present invention provides；
Fig. 2 is the schematic diagram of the OR circuit that the embodiment of the present invention provides；
Fig. 3 is the schematic diagram of the not circuit that the embodiment of the present invention provides；
Fig. 4 is adulterating and line instance graph with door integrated circuit of embodiment of the present invention offer；
Fig. 5 is that the embodiment of the present invention provides or door integrated circuit adulterates and line instance graph；
Fig. 6 is that the ungated integrated circuit that the embodiment of the present invention provides adulterates and line instance graph；
Fig. 7 A is the input pulse schematic diagram of the not circuit that the embodiment of the present invention provides；
Fig. 7 B is the output pulse schematic diagram of the not circuit that the embodiment of the present invention provides.
Detailed description of the invention
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with accompanying drawing
And embodiment, the present invention is further elaborated.Should be appreciated that described herein specifically
Embodiment only in order to explain the present invention, is not intended to limit the present invention.
In embodiments of the present invention, memristor as with or, the core component of non-three kinds of gate circuits,
There is provided the carrier of different densities with control output end voltage.Wherein this memristor is by mixed semiconductor's material
Material composition, including doped semiconductor and the intrinsic semiconductor of high-impedance state of low resistance state.Memristor resistance by
Relationship description between magnetic flux and electric charge:Single linear impurity drift memristor by
Two can form by continually varying resistant series, and its impedance is then doped region and two, intrinsic region series electrical
Resistance sum, it may be assumed thatWherein D is memristor total length, and about 10 receive
Rice, w is the length of doped region, RonBeing conduction impedance, its value is less than 100 ohm, RoffIt is to close
Closing impedance, its value is about several kilohms.After being biased, hole drift inside memristor, can be produced
Moving, i.e. impurity and the interfacial linear movement in undoped region, its sign equation is:
Wherein η represents the polarity of memristor, and forward is 1, is reversed-1. μDFor the average mobility of impurity,
It it is the build-in attribute of intrinsic material.Above-mentioned sign equation describes memristor physical composition, impedance, line
Property the content such as impurity drift, when to apply frequency between two electrodes of memristor be 2KHz, amplitude is 2V
Sinusoidal signal time, memristor shows distinctive ' 8 ' the font Li Saru loop lines of memristor system.Start
Time memristor be in high-impedance state (HRS) and increase along with the voltage applied, impurity and undoped region separating surface
Moving to lower electrode, now memristor shows strong ohm property, and resistance is gradually reduced, when removing
During the bias at memristor the two poles of the earth, memristor still keeps original low resistance state, i.e. ' remembers ' original
Resistance.If apply negative bias at memristor the two poles of the earth, impurity and undoped region separating surface are to upper strata
Electrode moves, and now memristor shows Schottky characteristic, i.e. high-impedance state.The present invention is based on recalling
These good characteristics of resistance device, have devised information storage and process the logic gates blended.
As it is shown in figure 1, AND circuit based on memristor includes: first memristor the 101, second memristor
Device the 102, the 3rd memristor 103, one-way conduction element and the first resistance Rs；First memristor 101
Input as the first input end of AND circuit, the input of the second memristor 102 as with door
Second input of circuit；The outfan of one end of one-way conduction element and the first memristor 101 and the
The outfan of two memristors 102 connects, the other end of one-way conduction element and the 3rd memristor 103
Input connects；One end of first resistance Rs is connected to one-way conduction element and the 3rd memristor 103 connects
The connection end connect, the other end ground connection of the first resistance Rs；The outfan of the 3rd memristor 103 as with
The outfan of gate circuit.
In embodiments of the present invention, AND circuit also includes: the first electric pressure converter 104, the first voltage
The input end of clock of transducer 104 connects CLK clock signal, the first of the first electric pressure converter 104
Input is connected to the input of the first memristor 101, the second input of the first electric pressure converter 104
End is connected to the input of the second memristor 102, and the outfan of the first electric pressure converter 104 is connected to
The outfan of the 3rd memristor 103.Original in order to ensure that the 3rd memristor 103 can return in time
State, the first electric pressure converter 104 should be sent out when the next clock signal that logic input triggers arrives
Going out and overturn pulse, and the first resistance Rs is limit volt resistance, resistance is typically at several kilohms.
As one embodiment of the present of invention, one-way conduction element can be diode D1, diode
The anode of D1 and the outfan of the outfan of the first memristor 101 and the second memristor 102 connect, and two
The negative electrode of pole pipe D1 and the input of the 3rd memristor 103 connect.
As in figure 2 it is shown, logic sum gate circuit based on memristor includes: the 4th memristor the 301, the 5th
Memristor 302 and the second resistance R1；The input of the 4th memristor 301 is as the first of OR circuit
Input, the input of the 5th memristor 302 is as the second input of OR circuit；Second resistance
One end of R1 is connected with the outfan of the 4th memristor 301 and the outfan of the 5th memristor 302, the
The other end of two resistance R1 is as the outfan of OR circuit.
As it is shown on figure 3, logic inverter circuit based on memristor includes: the 6th memristor the 501, the 7th
Memristor 502, triple gate D2 and the 3rd resistance Rt1；The input of the 6th memristor 501 is as non-
The input of gate circuit；The input of the 7th memristor 502 connects supply voltage VDD；Triple gate
The Enable Pin of D2 is connected to the outfan of the 6th memristor 501, and the input of triple gate D2 is connected to
The outfan of the 7th memristor 502, the outfan of triple gate D2 passes through the 3rd resistance Rt1 ground connection；
The outfan of the 7th memristor 502 is as the outfan of not circuit.
In embodiments of the present invention, logic inverter circuit also includes: the second electric pressure converter 503 and
Four resistance Rs1；The input end of clock connection CLK clock signal of the second electric pressure converter 503, second
The input of electric pressure converter 503 is connected to the input of the 6th memristor 501, the second voltage conversion
The outfan of device 503 is connected to the outfan of the 6th memristor 501；4th resistance Rs1 is connected to
Between input and the ground of six memristors 501.
In the embodiment of the present invention, in order to overcome existing gate circuit integrated level based on COMS, power consumption,
And the problem such as power down easily loss, change logic inverter circuit based on memristor and can not only realize existing door electricity
The logical process function on road, is also better than traditional at aspects such as integrated level, power consumption, speed, reliabilities
Logic gates based on COMS, it is achieved that the storage of information and the unification of process, is conducive to overcoming
The bottleneck problem of memory access in computer nowadays system structure.It addition, logic gates is by brand-new memristor
Material is made, and combines the storage of memristor information and the advantage processed, simple in construction, and integrated level is high,
Technological process is succinct.Simultaneously this gate circuit can realize with or, non-, XOR and or or non-,
With the basic logic operations such as non-.Additionally, utilize the nonlinear characteristic of memristor, it is possible to achieve processor
Information storage and the unification processed, solve data from structure and process the bottleneck with storage speed gap.
Logic inverter based on the memristor electricity provided for the further description embodiment of the present invention
Road, existing as follows with line Examples detail with integrated circuit doping:
Fig. 4 shows and the doping of door integrated circuit and line instance graph；With the input of door integrated circuit with
Metal electrode 201 is connected, and metal electrode lower end is connected with titanium dioxide Lacking oxygen Vo+ doped region 202,
Lower floor is intrinsic silica titanium 204, isolates with silicon dioxide 203,202,204 between zones of different
The memristor constituted forms the upset of unidirectional local through N-epitaxial layer, N-type substrate, N-cathode layer 207
Circuit, after through channel resistance 205 by ground connection 208, whole circuit is made in on a piece of lining base 206.
Two input high level voltage scopes are 1.0V-1.5V, and low level voltage scope is 0V-0.5V,
The threshold voltage ranges 1.5V-2.0V that memristor height low resistance state converts, when two inputs with door are same
Time input high level time, the 3rd memristor is acted on by highfield, impurity and undoped area limit
Moving towards lower floor's electrode B E, now this memristor is become low resistance state from high-impedance state, is output as high level,
Simultaneously under the triggering of next clock signal and input end signal, the first electric pressure converter produces upset
On the lower electrode being applied to the 3rd memristor of voltage reversal, the upper electrode of this memristor is through limit
Volt resistance eutral grounding, turnover voltage is more than 2.0V, and now the 3rd memristor returns to original state；When
Input time at least an input is for low level, owing to a high level voltage is less than 1.5V, is produced
Raw undertension is to be the 3rd memristor upset, the i.e. voltage drop of this memristor levels electrode generation
Very big, it is output as low level.
Fig. 5 shows or door integrated circuit adulterates and line instance graph, and OR circuit is by the memristor of low resistance state
Device composes in parallel, and when input is low level simultaneously, is output as low level, is otherwise output as high electricity
Flat, its logical expression is: F=A+B. input is connected with metal electrode 401 respectively with outfan,
Logic input 1 input with logic 2 lower ends be connected respectively the titanium dioxide Vo+ in doped with oxygen room, 402,
Lower floor is intrinsic silica titanium 404, isolates 403 with silicon dioxide, last memristor lower floor between zones of different
Electrode connects outfan by channel resistance 405.This example high level and low level voltage scope and example
One is identical, and owing to being heavy doping memristor, Lacking oxygen Vo+ content is high, has a high potential just to input
Can pass memristor potential barrier, output output level can be readily possible to detect.If two inputs
When being all low level, output voltage is then low level.
Fig. 6 shows ungated integrated circuit doping and line instance graph, the input of ungated integrated circuit
Being connected with metal electrode 601 respectively with outfan, logic inputs 1 lower end and connects the two of doped with oxygen room
Titanium oxide Vo+, 602, lower floor is intrinsic silica titanium 603, between zones of different with silicon dioxide isolate 610,
Last memristor lower electrode is by channel resistance 607 ground connection, and memristor lower floor connects P+ diffusion region 604,
P+ diffusion region 604, P+ region 605, N-type trap 606 constitute triple gate, wherein 604 make for voltage
Energy region, 605 is current lead-through district.Input applies electric field through memristor to P+ diffusion region 604
Control whether P+ region turns on.When input is for high level, the 6th memristor is reversed, simultaneously tri-state
Door cut-off, power end connects outfan through the 7th memristor, owing to this memristor is low resistance state, pressure drop
Less, therefore outfan is low level, simultaneously when next clock signal arrives, the first voltage conversion
Device produces a turnover voltage signal, is that the 6th memristor recovers original high-impedance state；Work as input voltage
During for low level, being low level after the 6th memristor, triple gate Enable Pin is effectively started working,
Terminating a high resistance measurement Rt under triple gate, now output end voltage is the pressure drop of Rt two ends, for high electricity
Flat.
Fig. 7 A and Fig. 7 B respectively illustrates input and the output pulse of not circuit, at input high level
During for the period square pulse of 3.6V, being output as low level and be about 0.1V, vice versa, and this demonstrates
The not circuit logic function that the embodiment of the present invention provides is correct.
In embodiments of the present invention, it is achieved that present information in processing basic with or, non-three kinds patrol
Collect gate circuit, owing to using memristor as the core texture of gate circuit, existing door electricity can not only be realized
The logical process function on road, improves reliability and the motility of electronic equipment, reduces cost simultaneously,
Also it is better than traditional logic gates based on COMS at aspects such as integrated level, power consumption, speed, real
Show the storage of information and the unification of process, be conducive to overcoming in computer nowadays system structure at information
Managing and separate, with storage, the bottleneck problem caused, the application for electronic technology opens new epoch.
As it will be easily appreciated by one skilled in the art that and the foregoing is only presently preferred embodiments of the present invention,
Not in order to limit the present invention, all made within the spirit and principles in the present invention any amendment, etc.
With replacement and improvement etc., should be included within the scope of the present invention.
Claims (2)
1. a logic inverter circuit based on memristor, it is characterised in that including: the 6th memristor,
7th memristor, triple gate, the 3rd resistance；
The input of described 6th memristor is as the input of described not circuit；Described 7th memristor
The input of device connects supply voltage；
The Enable Pin of described triple gate is connected to the outfan of described 6th memristor, described triple gate
Input is connected to the outfan of described 7th memristor, and the outfan of described triple gate is by described the
Three resistance eutral groundings；
The outfan of described 7th memristor is as the outfan of described not circuit.
2. logic inverter circuit as claimed in claim 1, it is characterised in that also include: the second electricity
Pressure converter and the 4th resistance；
The input end of clock of described second electric pressure converter connects CLK clock signal, described second voltage
The input of transducer is connected to the input of described 6th memristor, described second electric pressure converter
Outfan is connected to the outfan of described 6th memristor；
Described 4th resistance is connected between input and the ground of described 6th memristor.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410359201.0A CN104124961B (en) | 2012-07-09 | 2012-07-09 | Logic inverter circuit based on memory resistors |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410359201.0A CN104124961B (en) | 2012-07-09 | 2012-07-09 | Logic inverter circuit based on memory resistors |
| CN201210234665.XA CN102811051B (en) | 2012-07-09 | 2012-07-09 | Memristor-based logical gate circuit |
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| CN201210234665.XA Division CN102811051B (en) | 2012-07-09 | 2012-07-09 | Memristor-based logical gate circuit |
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| CN104124961B true CN104124961B (en) | 2017-01-11 |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104571949B (en) * | 2014-12-22 | 2017-07-07 | 华中科技大学 | Realize calculating processor and its operating method merged with storage based on memristor |
| CN105356876B (en) * | 2015-11-16 | 2018-01-26 | 华中科技大学 | Logic gates based on memristor |
| CN105845173B (en) * | 2016-03-23 | 2018-11-30 | 华中科技大学 | A kind of logic gates of the superlattices phase change cells based on magnetic field triggering |
| CN111046617B (en) * | 2019-12-23 | 2024-04-09 | 杭州电子科技大学 | Memristor-based three-value digital logic gate circuit |
| CN112332813B (en) * | 2020-11-17 | 2023-08-11 | 杭州电子科技大学 | CMOS hybrid type edge memristor D trigger circuit with asynchronous setting and resetting |
| CN112865786A (en) * | 2020-12-31 | 2021-05-28 | 杭州电子科技大学 | Digital NOT gate implementation method based on ternary memristor |
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| US7902857B1 (en) * | 2010-04-08 | 2011-03-08 | The United States Of America As Represented By The Secretary Of The Air Force | Reconfigurable electronic circuit |
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| CN102265397A (en) * | 2008-12-23 | 2011-11-30 | 惠普开发有限公司 | Memristive device and methods of making and using same |
| US7902857B1 (en) * | 2010-04-08 | 2011-03-08 | The United States Of America As Represented By The Secretary Of The Air Force | Reconfigurable electronic circuit |
| CN102412827A (en) * | 2011-11-02 | 2012-04-11 | 北京大学 | Method for realizing logic operation by utilizing RRAM devices |
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Inventor after: Chen Jincai Inventor after: Yu Guosheng Inventor after: Zhou Gongye Inventor after: Jiu Xiangshui Inventor after: Lu Ping Inventor before: Chen Jincai Inventor before: Yu Guosheng Inventor before: Zhou Gongye |
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