CN104122977A - Method for storing data and storage system - Google Patents
Method for storing data and storage system Download PDFInfo
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- CN104122977A CN104122977A CN201410330397.0A CN201410330397A CN104122977A CN 104122977 A CN104122977 A CN 104122977A CN 201410330397 A CN201410330397 A CN 201410330397A CN 104122977 A CN104122977 A CN 104122977A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention relates to the technical field of data storage and discloses a method for storing data and a storage system. In the scheme, after partial data in an internal storage are moved into a Cache, in the process of writing the partial data in the Cache in a nonvolatile storage, the internal storage is set to be in a self-refresh state. Because the internal storage cannot be accessed in the self-refresh state, the power consumption of the internal storage can be negligible, and the power consumption of the internal storage is lowered.
Description
Technical field
The present invention relates to technical field of data storage, particularly a kind of method and storage system of storing data.
Background technology
In actual applications, storage system need to be carried out a large amount of read-write operations to disk, and still, the mechanical read or write speed of disk is far smaller than the read or write speed of storage system.In order to coordinate the greatest differences of both data rates, in storage system, be provided with core buffer, wherein, in internal memory, be cached with the data of frequent use.
Main frame is from storage system reading out data time, and storage system checks whether the data that main frame reads are stored among internal memory, if be buffered among internal memory, directly sense data replies to main frame from internal memory; If be not buffered among internal memory, after obtaining data, hard disk request replies to again main frame.When main frame is write data to storage system, storage system is first write direct data among internal memory, and replies to immediately main frame, informs that this write operation completes.And then data are write to hard disk among internal memory.
Although internal memory has greatly improved the speed reading and writing data,, due to the interior volatile storage medium that saves as, if the unexpected power-off of power supply, being buffered in the data that also do not store hard disk in internal memory into will lose.
During for fear of the unexpected power-off of power supply, there is the problem of losing in the data that are stored in internal memory, storage system all can configure standby power supply, and standby power supply is CPU (Central Processing Unit, central processing unit), write buffer memory and hard disk provides electric energy.In the time there is power-off, the electric energy that controller provides according to standby power supply stores the data that are buffered in internal memory in hard disk into.
At present, in the time that standby power supply provides electric energy, controller is conventionally in frequency reducing state, and normal power consumption is about 57W left and right.But storage system is conventionally with 12 root memory bars now, every root memory bar typical case power consumption is in 6W left and right, and when standby power supply power supply, the power consumption of all internal memories is 72W left and right.The power consumption of internal memory is considerably beyond the power consumption of controller, become the consumer of standby power supply maximum, seriously reduce controller and stored the data that are buffered in internal memory into effective time in hard disk, that is to say, in prior art, had the defect that internal memory energy consumption is larger.
Summary of the invention
The embodiment of the present invention provides a kind of method and storage system of storing data, in order to solve in prior art the larger defect of internal memory energy consumption after storage system power down.
The concrete technical scheme that the embodiment of the present invention provides is as follows:
First aspect, provides a kind of method of storing data, and described method is carried out by the controller in storage system, and described storage system comprises controller and nonvolatile memory, and described method comprises:
In the time determining described storage system power down, the partial data in described internal memory is moved in cache memory Cache;
Described partial data in described Cache is write to described nonvolatile memory;
The described partial data in described Cache is write in the process of described nonvolatile memory, arrange in described and save as self-refresh state, wherein, can not be accessed in the described interior process that has self-refresh state.
In conjunction with first aspect, in the possible implementation of the first, described in the described partial data in described Cache is write to described nonvolatile memory after, described method also comprises:
Judge whether the data in described internal memory all write described nonvolatile memory;
In the case of determining that the data in described internal memory all do not write described nonvolatile memory, described internal memory is exited to described self-refresh state, and carry out and described partial data in described internal memory is moved to the step in Cache.
In conjunction with the possible implementation of the first of first aspect, in the possible implementation of the second, described method also comprises:
In the case of determining that the data in described internal memory all write described nonvolatile memory, close described storage system.
In conjunction with first aspect, or first aspect first to the possible implementation of the second, in the third possible implementation, described partial data in described internal memory is moved in Cache, specifically comprise:
Fixed address space is set in described internal memory, and wherein, described fixed address space can be accessed by described Cache; Described partial data in described internal memory is copied to described fixed address space, and described partial data is copied to described Cache from described fixed address space;
Or
Adopt direct memory access dma mode to move in Cache the partial data in described internal memory.
In conjunction with first aspect, or first aspect first to the third possible implementation, in the 4th kind of possible implementation, described before the described partial data in described Cache is write to described nonvolatile memory, also comprise:
By the run time version buffer memory in described internal memory, to described Cache, described run time version is for writing described nonvolatile memory by data;
Described partial data in described Cache is write to described nonvolatile memory, specifically comprise;
Based on the described run time version in described Cache, the described partial data in described Cache is write to described nonvolatile memory.
Second aspect, provides a kind of storage system, comprising:
Controller, in the time determining described storage system power down, moves the partial data in described internal memory in cache memory Cache; Described partial data in described Cache is write to described nonvolatile memory; The described partial data in described Cache is write in the process of described nonvolatile memory, arrange in described and save as self-refresh state, wherein, can not be accessed in the described interior process that has self-refresh state;
Nonvolatile memory, for storing the data of described internal memory.
In conjunction with second aspect, in the possible implementation of the first, described controller also for:
Judge whether the data in described internal memory all write described nonvolatile memory;
In the case of determining that the data in described internal memory all do not write described nonvolatile memory, described internal memory is exited to described self-refresh state, and carry out and described partial data in described internal memory is moved to the step in Cache.
In conjunction with the possible implementation of the first of second aspect, in the possible implementation of the second, described controller also for:
In the case of determining that the data in described internal memory all write described nonvolatile memory, close described storage system.
In conjunction with second aspect, or second aspect first to the possible implementation of the second, in the third possible implementation, described controller specifically for:
Fixed address space is set in described internal memory, and wherein, described fixed address space can be accessed by described Cache; Described partial data in described internal memory is copied to described fixed address space, and described partial data is copied to described Cache from described fixed address space;
Or
Adopt direct memory access dma mode to move in Cache the partial data in described internal memory.
In conjunction with second aspect, or second aspect first to the third possible implementation, in the 4th kind of possible implementation, described controller specifically for:
By the run time version buffer memory in described internal memory, to described Cache, described run time version is for writing described nonvolatile memory by data;
Described controller, in the time that the described partial data in described Cache is write to described nonvolatile memory, is specially;
Based on the described run time version in described Cache, the described partial data in described Cache is write to described nonvolatile memory.
The method of the storage data that the embodiment of the present invention provides, in the time of definite storage system power down, moves the partial data in internal memory in Cache; By the partial data write non-volatile memory in Cache; By in the process of the partial data write non-volatile memory in Cache, in arranging, save as self-refresh state, wherein, inside existing can not be accessed in the process of self-refresh state, in this scheme, after the data in internal memory are write to Cache, make internal memory enter self-refresh state, due to can not be accessed in the interior process that has self-refresh state, in this process, the power consumption of internal memory be negligible.Thereby reduced after storage system power down, in the process of storage data, the power consumption of internal memory, has extended controller and has stored the data that are buffered in internal memory into effective time in hard disk.
Brief description of the drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, will the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below.
A kind of process flow diagram of storing data that Fig. 1 provides for the embodiment of the present invention;
The process flow diagram of another storage data that Fig. 2 provides for the embodiment of the present invention;
The structural representation of a kind of storage system that Fig. 3 provides for the embodiment of the present invention.
Embodiment
Object, technical scheme and the advantage of the embodiment of the present invention are clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiment.
Below in conjunction with accompanying drawing, the preferred embodiment of the present invention is elaborated.
Said preferred embodiment can being applied in following scene below, as: storage system power down, the in the situation that storage system being powered at standby power supply, carried out by the controller in storage system, data in internal memory are write to the nonvolatile memory in storage system, and the nonvolatile memory in storage system can be hard disk, disk etc.
Consult shown in Fig. 1, a kind of method of storing data is provided in the embodiment of the present invention, the detailed process of the method is as follows:
Step 100: controller, in the time of definite storage system power down, is moved the partial data in internal memory in Cache;
Step 110: controller is by the partial data write non-volatile memory in Cache;
Step 120: controller, by the process of the partial data write non-volatile memory in Cache, saves as self-refresh state in arranging, wherein, inside existing can not be accessed in the process of self-refresh state.
In the embodiment of the present invention, triggering has the data-moving in internal memory to the trigger condition of Cache multiple, for example, can be the power-off signal receiving, and certainly, in actual applications, may be also other trigger condition, describes in detail no longer one by one at this.
In the embodiment of the present invention, in step 100, said partial data can be all data in internal memory, can be also a part of data in internal memory, is specially how many data, depends on the size of data in EMS memory, and the size of Cache.
For example, the size of the data in internal memory is 30M, and the size of Cache is 10M, and the partial data in step 100 is just a part of data in internal memory, if the 30M data of storing in internal memory all will be stored to nonvolatile memory, circulate and carry out 3 step 100-120.If the size of data in internal memory is 10M, and the size of Cache is 10M, the partial data in step 100 is just the total data in internal memory, if the 10M data of storing in internal memory all will be stored to nonvolatile memory, carries out 1 step 100-120 just passable.
In the embodiment of the present invention, in internal memory, to move to the data of nonvolatile memory can be dirty data, dirty data comprises polytype, for example, can be dirty business datum, or, also can be dirty system data, certainly, in practical application, may be also the data of other types, describe in detail no longer one by one at this.
Cache in the embodiment of the present invention can be an independently device, also can be arranged in other hardware, for example, be arranged in CPU, or be positioned in FPGA (Field-Programmable Gate Array, field-programmable gate array) (being the SRAM in FPGA).
In actual applications, because the storage space of Cache is limited, the size of all data in possible internal memory is far longer than the size of the storage space of Cache, at this moment, can not once all data in internal memory be all copied in Cache, therefore, in the embodiment of the present invention, by after in the partial data write non-volatile memory in Cache, the method for storage data also comprises the steps:
Step 130: whether all controller judges the data write non-volatile memory in internal memory, if so, performs step 140; Otherwise internal memory is exited self-refresh state by controller, and return to execution step 100.
Step 140: close storage system;
In the embodiment of the present invention, in the case of determining the inwhole write non-volatile memories of data in internal memory, internal memory is exited to self-refresh state, and continue to carry out the partial data in internal memory is moved to the step in Cache, if the data in internal memory are not all when write non-volatile memory, internal memory is exited to self-refresh state, and again perform step 100-120.If re-executed after step 100-120, in internal memory, still there are data not all when write non-volatile memory, also internal memory will be exited to self-refresh state, re-execute step 100-120, until the whole write non-volatile memories of data in internal memory, this is a process that circulation is carried out.
That is to say, each time by the data Replica in internal memory to Cache, all to make internal memory enter self-refresh state, reduce the power consumption of internal memory, and in specified data after Cache is stored to nonvolatile memory, if while not being stored to the data in nonvolatile memory in addition in internal memory, also to continue these remaining data to be stored to nonvolatile memory, and now, want access memory, therefore, control internal memory and exit self-refresh state, to make the internal memory can be accessed, again remaining data is copied to Cache, now, after remaining data is copied to Cache, also to again control internal memory and enter self-refresh state, it is accessed so that internal memory is forbidden, then, remaining data is stored to nonvolatile memory from Cache.
For example, the storage space of Cache is 15MB, and the size of data in internal memory is 90MB, the storage space in the fixed address space arranging in internal memory is set to 15MB, need so storing process six times, the data of 90MB in internal memory could be stored to hard disk completely, in the time storing for the first time, first by the data Replica of 15MB in internal memory to the fixed address space of internal memory, then, to in the fixed address space of the datarams of 15MB, be copied to Cache, and control internal memory and enter self-refresh state, and the data of 15MB are stored to hard disk from Cache, owing to still having the data of 75MB from memory to hard disk, therefore, continue access memory, now, control internal memory and exit self-refresh state, then store for the second time, in the time storing for the second time with storage class for the first time seemingly, still will be first by the data Replica of 15MB in internal memory to the fixed address space of internal memory, then, to in the fixed address space of the dirty data internal memory of 15MB, be copied to Cache, and control internal memory and enter self-refresh state, and the dirty data of 15MB is stored to hard disk from Cache, due to after storage for the second time, still have the data of 60MB will be from memory to hard disk, therefore, continue access memory, store for the third time, for the third time, the 4th time, the 5th time, the 6th storing process and said process are similar, describe in detail no longer one by one at this.
In the embodiment of the present invention, for example a CPU (for example, E5-2620) there are 6 cores, the each core of CPU has the Cache of 2.5MB, CPU altogether can buffer memory 15MB data, the size of the storage space in the fixed address space arranging in internal memory is 15MB, the time that CPU is copied to Cache by the data of 15MB from internal memory is 15MB/ (1333M*8*4*0.8)=0.4ms, CPU is saved in the data of 15MB the time=15MB/75MB=200ms of hard disk from Cache, due to CPU by the data of 15MB after internal memory is copied to Cache, control internal memory and entered self-refresh state, the data of 15MB are saved in from Cache in the time 200ms of hard disk at CPU, internal memory cannot be accessed, therefore, the power consumption of internal memory has just reduced, and CPU by the data of 15MB from internal memory be copied to Cache during this period of time the power consumption of internal memory only for 0.4W, if and adopt the words of scheme of the prior art, the power consumption of internal memory is 7W, the power consumption of internal memory of the prior art is far longer than the power consumption of internal memory in the embodiment of the present invention, and then, the power-dissipation-reduced of internal memory in the embodiment of the present invention, the electric energy that controller utilizes improves.
In the embodiment of the present invention, for example FPGA has the internal SRAM of 5MB as Cache, can buffer memory 5MB data, the size of the storage space in the fixed address space arranging in internal memory is 5MB, the time that FPGA is copied to Cache by the data of 5MB from internal memory is 5MB/ (1600M*8*2*0.8)=0.24ms, FPGA is saved in the data of 5MB the time=5MB/75MB=67ms of hard disk from Cache, due to FPGA by the data of 5MB after internal memory is copied to Cache, control internal memory and entered self-refresh state, the data of 5MB are saved in from Cache in the time period of time 67ms of hard disk at FPGA, internal memory cannot be accessed, therefore, the power consumption of internal memory has just reduced, and FPGA by the data of 5MB from internal memory be copied to Cache during this period of time the power consumption of internal memory only for 0.2W, if and adopt the words of scheme of the prior art, the power consumption of internal memory is 7W, the power consumption of internal memory of the prior art is far longer than the power consumption of internal memory in the embodiment of the present invention, and then, the power-dissipation-reduced of internal memory in the embodiment of the present invention, the electric energy that controller utilizes improves.
In the embodiment of the present invention, by the partial data in internal memory move mode in Cache have multiple, for example, optional, can be in the following way:
Fixed address space is set in internal memory, and wherein, fixed address space can be accessed by Cache; Partial data in internal memory is copied to fixed address space, and partial data is copied to Cache from fixed address space.
In the embodiment of the present invention, in order to improve storage efficiency, when fixed address space is set in internal memory, storage space that can this fixed address space is set to equate with the storage space of Cache.
For example, a CPU (for example, E5-2620) has 6 cores, the each core of CPU has the Cache of 2.5MB, CPU altogether can buffer memory 15MB data, while so fixed address space being set in internal memory, storage space that can this fixed address space is set to 15MB.
In the embodiment of the present invention, when the partial data in internal memory is moved in Cache, also can be in the following way:
Adopt DMA (Direct Memory Access, direct memory access) mode to move in Cache the partial data in internal memory.
In actual applications, while carrying out every single stepping, all on the basis of run time version, could carry out, and in prior art, in order to reduce the power consumption of internal memory, by the data Replica in internal memory to Cache, internal memory has been entered to self-refresh state, internal memory cannot be accessed, and original run time version is stored in internal memory, therefore, in order to make data successfully be stored to nonvolatile memory from Cache, before by the partial data write non-volatile memory in Cache, also comprise following operation:
By the run time version buffer memory in internal memory, to Cache, run time version is used for data write non-volatile memory.
In this operation, the Cache of buffer memory run time version can be the Cache in CPU, certainly, need to use the equipment of run time version also can be other executable operations time, describes in detail no longer one by one at this.
Wherein, the Cache of buffer memory run time version can be the Cache in CPU, in Cache and internal memory, includes run time version, and what controller read is the data of the Cache in CPU, instead of data in internal memory.
In embodiments of the present invention, the run time version buffer memory in internal memory, to Cache, is specifically as follows the partial data write non-volatile memory in Cache;
Based on the run time version in Cache, by the partial data write non-volatile memory in Cache.
In the invention process, nonvolatile memory has polytype, for example, optional, can be hard disk, disk.
Further, in order to improve the efficiency of storage, nonvolatile memory can be also solid hard disk.
Can find out from said process, the storage means that the embodiment of the present invention provides, due to after system power failure, controller is by the process of the data write non-volatile memory of internal memory, first the data in internal memory are write to Cache, and make internal memory enter self-refresh state after the data in internal memory being write to Cache.Owing to being can not be accessed in the interior process that has self-refresh state, like this, the power consumption of internal memory be lower, negligible.Thereby reduced after storage system power down, in the process of storage data, the power consumption of internal memory, has extended controller and has stored the data that are buffered in internal memory into effective time in hard disk.
In order to understand better the embodiment of the present invention, below provide concrete application scenarios, for the process of storage data, make and describing in further detail, in embodiments of the present invention, taking the storage space of the Cache of CPU as 15MB, and the size of data in internal memory is that 30MB is that example describes.As shown in Figure 2:
Step 200: controller arranges fixed address space in internal memory, wherein, the storage size of this fixed address is 15MB;
In this step, fixed address space can be accessed by Cache.
Step 210: controller, in the time of definite storage system power down, is copied to the fixed address space in internal memory by the data of 15MB in internal memory and run time version;
Step 220: controller is copied to the data of the 15MB in fixed address space and run time version in the Cache of CPU;
Step 230: controller arranges internal memory and enters self-refresh state, to make the internal memory can not be accessed;
Step 240: controller is based on run time version, by the data Replica of 15MB in the Cache of CPU to solid state hard disc;
Step 250: controller judges whether the data in internal memory all write after solid state hard disc, if so, perform step 260, otherwise internal memory is exited self-refresh state by controller, and return and carry out execution step 210;
Shown in this step and Fig. 1, step 130 is similar, specifically can participate in the description to step 130, does not repeat them here.
Step 260: controller cuts out storage system;
Can find out from said process, the storage means that step 200-260 provides, due to after system power failure, controller is writing the data of internal memory in the process of solid state hard disc, first the data in internal memory are write to the Cache in CPU, and make internal memory enter self-refresh state after the Cache data in internal memory being write in CPU.Owing to being can not be accessed in the interior process that has self-refresh state, like this, the power consumption of internal memory be lower, negligible.Thereby reduced after storage system power down, in the process of storage data, the power consumption of internal memory, has extended controller and has stored the data that are buffered in internal memory into effective time in hard disk.
Based on technique scheme, to consult shown in Fig. 3, the embodiment of the present invention provides a kind of storage system, and this storage system comprises controller 30, nonvolatile memory 31, wherein:
Controller 30, for when definite storage system power down, moves the partial data in internal memory in Cache; By the partial data write non-volatile memory 31 in Cache; By in the process of the partial data write non-volatile memory 31 in Cache, in arranging, save as self-refresh state, wherein, inside existing can not be accessed in the process of self-refresh state;
Nonvolatile memory 31, for the data of stored memory.
Further, in the embodiment of the present invention, controller 30 also for:
Judge the whether all write non-volatile memory 31 of data in internal memory;
In the case of determining the inwhole write non-volatile memories 31 of data in internal memory, internal memory is exited to self-refresh state, and carry out the partial data in internal memory is moved to the step in Cache.
Further, in the embodiment of the present invention, controller 30 also for:
All write non-volatile memory 31, close storage system in the case of determining data in internal memory.
Optionally, in the embodiment of the present invention, controller 30 specifically for:
Fixed address space is set in internal memory, and wherein, fixed address space can be accessed by Cache; Partial data in internal memory is copied to fixed address space, and partial data is copied to Cache from fixed address space;
Or
Adopt direct memory access dma mode to move in Cache the partial data in internal memory.
Optionally, in the embodiment of the present invention, controller 30 specifically for:
By the run time version buffer memory in internal memory, to Cache, run time version is used for data write non-volatile memory 31;
Controller 30, when by partial data write non-volatile memory 31 in Cache, is specially;
Based on the run time version in Cache, by the partial data write non-volatile memory 31 in Cache.
A kind of storage system that the embodiment of the present invention proposes comprises controller 30 and nonvolatile memory 31, and wherein, controller 30, for when definite storage system power down, is moved the partial data in internal memory in cache memory Cache; By the partial data write non-volatile memory 31 in Cache; By in the process of the partial data write non-volatile memory 31 in Cache, in arranging, save as self-refresh state, wherein, inside existing can not be accessed in the process of self-refresh state.The storage system that the embodiment of the present invention provides, due to after system power failure, by in the process of the data write non-volatile memory 31 of internal memory, first the data in internal memory are write to Cache, and data in internal memory just make internal memory enter self-refresh state after writing to Cache.Due to can not be accessed in the interior process that has self-refresh state, like this, the power consumption of internal memory be negligible.Thereby reduced after storage system power down, in the process of storage data, the power consumption of internal memory, has extended controller and has stored the data that are buffered in internal memory into effective time in hard disk.
The present invention is with reference to describing according to process flow diagram and/or the block scheme of the method for the embodiment of the present invention, equipment (system) and computer program.Should understand can be by the flow process in each flow process in computer program instructions realization flow figure and/or block scheme and/or square frame and process flow diagram and/or block scheme and/or the combination of square frame.Can provide these computer program instructions to the processor of multi-purpose computer, special purpose computer, Embedded Processor or other programmable data processing device to produce a machine, the instruction of carrying out by the processor of computing machine or other programmable data processing device is produced for realizing the device in the function of flow process of process flow diagram or multiple flow process and/or a square frame of block scheme or multiple square frames.
These computer program instructions also can be stored in energy vectoring computer or the computer-readable memory of other programmable data processing device with ad hoc fashion work, the instruction that makes to be stored in this computer-readable memory produces the manufacture that comprises command device, and this command device is realized the function in flow process of process flow diagram or multiple flow process and/or square frame of block scheme or multiple square frame.
These computer program instructions also can be loaded in computing machine or other programmable data processing device, make to carry out sequence of operations step to produce computer implemented processing on computing machine or other programmable devices, thereby the instruction of carrying out is provided for realizing the step of the function in flow process of process flow diagram or multiple flow process and/or square frame of block scheme or multiple square frame on computing machine or other programmable devices.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit.The embodiment that the application provides is only schematic.Those skilled in the art can be well understood to, and for convenience of description and succinctly, in the above-described embodiments, the description of each embodiment is all emphasized particularly on different fields, and there is no the part that describes in detail in certain embodiment, can be referring to the associated description of other embodiment.The feature disclosing in the embodiment of the present invention, claim and accompanying drawing can independently exist also can combine existence.
Claims (10)
1. store a method for data, described method is carried out by the controller in storage system, and described storage system comprises controller and nonvolatile memory, it is characterized in that, described method comprises:
In the time determining described storage system power down, the partial data in described internal memory is moved in cache memory Cache;
Described partial data in described Cache is write to described nonvolatile memory;
The described partial data in described Cache is write in the process of described nonvolatile memory, arrange in described and save as self-refresh state, wherein, can not be accessed in the described interior process that has self-refresh state.
2. the method for claim 1, is characterized in that, described in the described partial data in described Cache is write to described nonvolatile memory after, described method also comprises:
Judge whether the data in described internal memory all write described nonvolatile memory;
In the case of determining that the data in described internal memory all do not write described nonvolatile memory, described internal memory is exited to described self-refresh state, and carry out and described partial data in described internal memory is moved to the step in Cache.
3. method as claimed in claim 2, is characterized in that, described method also comprises:
In the case of determining that the data in described internal memory all write described nonvolatile memory, close described storage system.
4. the method as described in claim 1-3 any one, is characterized in that, described partial data in described internal memory is moved in Cache, specifically comprises:
Fixed address space is set in described internal memory, and wherein, described fixed address space can be accessed by described Cache; Described partial data in described internal memory is copied to described fixed address space, and described partial data is copied to described Cache from described fixed address space;
Or
Adopt direct memory access dma mode to move in Cache the partial data in described internal memory.
5. the method as described in claim 1-4 any one, is characterized in that, described before the described partial data in described Cache is write to described nonvolatile memory, also comprises:
By the run time version buffer memory in described internal memory, to described Cache, described run time version is for writing described nonvolatile memory by data;
Described partial data in described Cache is write to described nonvolatile memory, specifically comprise;
Based on the described run time version in described Cache, the described partial data in described Cache is write to described nonvolatile memory.
6. a storage system, is characterized in that, comprising:
Controller, in the time determining described storage system power down, moves the partial data in described internal memory in cache memory Cache; Described partial data in described Cache is write to described nonvolatile memory; The described partial data in described Cache is write in the process of described nonvolatile memory, arrange in described and save as self-refresh state, wherein, can not be accessed in the described interior process that has self-refresh state;
Nonvolatile memory, for storing the data of described internal memory.
7. storage system as claimed in claim 6, is characterized in that, described controller also for:
Judge whether the data in described internal memory all write described nonvolatile memory;
In the case of determining that the data in described internal memory all do not write described nonvolatile memory, described internal memory is exited to described self-refresh state, and carry out and described partial data in described internal memory is moved to the step in Cache.
8. storage system as claimed in claim 7, is characterized in that, described controller also for:
In the case of determining that the data in described internal memory all write described nonvolatile memory, close described storage system.
9. the storage system as described in claim 6-8 any one, is characterized in that, described controller specifically for:
Fixed address space is set in described internal memory, and wherein, described fixed address space can be accessed by described Cache; Described partial data in described internal memory is copied to described fixed address space, and described partial data is copied to described Cache from described fixed address space;
Or
Adopt direct memory access dma mode to move in Cache the partial data in described internal memory.
10. the storage system as described in claim 6-9 any one, is characterized in that, described controller specifically for:
By the run time version buffer memory in described internal memory, to described Cache, described run time version is for writing described nonvolatile memory by data;
Described controller, in the time that the described partial data in described Cache is write to described nonvolatile memory, is specially;
Based on the described run time version in described Cache, the described partial data in described Cache is write to described nonvolatile memory.
Priority Applications (1)
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105740172A (en) * | 2016-01-26 | 2016-07-06 | 浪潮(北京)电子信息产业有限公司 | Block device data cache power-down protection method and system |
| WO2017016521A1 (en) * | 2015-07-30 | 2017-02-02 | 华为技术有限公司 | Electronic device capable of reducing power consumption, and method for reducing power consumption of electronic device |
| CN106569964A (en) * | 2015-10-13 | 2017-04-19 | 中兴通讯股份有限公司 | Power-off protection method, power-off protection device, power-off protection system and memory |
| WO2017113247A1 (en) * | 2015-12-30 | 2017-07-06 | 华为技术有限公司 | Method for reducing power consumption of memory and computer device |
| CN107397421A (en) * | 2016-05-18 | 2017-11-28 | 佛山市顺德区美的电热电器制造有限公司 | Cooking appliance and its startup control method |
| CN110162269A (en) * | 2018-02-14 | 2019-08-23 | 三星电子株式会社 | Storage system and solid state drive |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004362369A (en) * | 2003-06-06 | 2004-12-24 | Sony Corp | Storage device for network, its control method, and computer program |
| CN101458668A (en) * | 2008-12-19 | 2009-06-17 | 成都市华为赛门铁克科技有限公司 | Caching data block processing method and hard disk |
| CN102290094A (en) * | 2011-07-01 | 2011-12-21 | 创新科存储技术（深圳）有限公司 | Low power consumption circuit for reliably keeping self-refresh state of memory |
| JP4912490B2 (en) * | 2005-12-13 | 2012-04-11 | パナソニック株式会社 | Data processing device |
| TW201314700A (en) * | 2011-09-22 | 2013-04-01 | Toshiba Kk | Control system, control method, and computer program product |
| CN103500131A (en) * | 2013-09-18 | 2014-01-08 | 华为技术有限公司 | Storage system power-failure data backup method and storage system controller |
-
2014
- 2014-07-11 CN CN201410330397.0A patent/CN104122977B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004362369A (en) * | 2003-06-06 | 2004-12-24 | Sony Corp | Storage device for network, its control method, and computer program |
| JP4912490B2 (en) * | 2005-12-13 | 2012-04-11 | パナソニック株式会社 | Data processing device |
| CN101458668A (en) * | 2008-12-19 | 2009-06-17 | 成都市华为赛门铁克科技有限公司 | Caching data block processing method and hard disk |
| CN102290094A (en) * | 2011-07-01 | 2011-12-21 | 创新科存储技术（深圳）有限公司 | Low power consumption circuit for reliably keeping self-refresh state of memory |
| TW201314700A (en) * | 2011-09-22 | 2013-04-01 | Toshiba Kk | Control system, control method, and computer program product |
| CN103500131A (en) * | 2013-09-18 | 2014-01-08 | 华为技术有限公司 | Storage system power-failure data backup method and storage system controller |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017016521A1 (en) * | 2015-07-30 | 2017-02-02 | 华为技术有限公司 | Electronic device capable of reducing power consumption, and method for reducing power consumption of electronic device |
| US10976800B2 (en) | 2015-07-30 | 2021-04-13 | Huawei Technologies Co., Ltd. | Electronic device capable of reducing power consumption and method for reducing power consumption of electronic device |
| CN106569964A (en) * | 2015-10-13 | 2017-04-19 | 中兴通讯股份有限公司 | Power-off protection method, power-off protection device, power-off protection system and memory |
| WO2017113247A1 (en) * | 2015-12-30 | 2017-07-06 | 华为技术有限公司 | Method for reducing power consumption of memory and computer device |
| US10496303B2 (en) | 2015-12-30 | 2019-12-03 | Huawei Technologies Co., Ltd. | Method for reducing power consumption memory, and computer device |
| CN105740172A (en) * | 2016-01-26 | 2016-07-06 | 浪潮(北京)电子信息产业有限公司 | Block device data cache power-down protection method and system |
| CN107397421A (en) * | 2016-05-18 | 2017-11-28 | 佛山市顺德区美的电热电器制造有限公司 | Cooking appliance and its startup control method |
| CN110162269A (en) * | 2018-02-14 | 2019-08-23 | 三星电子株式会社 | Storage system and solid state drive |
| CN110162269B (en) * | 2018-02-14 | 2021-08-10 | 三星电子株式会社 | Storage system and solid state drive |
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