CN104111895A

CN104111895A - Method for utilizing DRAM defective products

Info

Publication number: CN104111895A
Application number: CN201410361135.0A
Authority: CN
Inventors: 黄运新
Original assignee: Ramaxel Technology Shenzhen Co Ltd
Current assignee: Ramaxel Technology Shenzhen Co Ltd
Priority date: 2014-07-25
Filing date: 2014-07-25
Publication date: 2014-10-22

Abstract

The invention discloses a method for utilizing DRAM (Dynamic Random Access Memory) defective products. The method comprises the steps of dynamically detecting wrong cells in the DRAM in the factory production, system self-checking and use processes, recording defect address information and substitute address information for searching for substitute cells for the cells, updating a new defect table, and correctly accessing errorless cells according to the information recorded in the defect table; the method is capable of realizing changing more than 80% of DRAM reject particles into usable particles by dynamically increasing the defect table to store the defect address information of DRAM chips and the substitute address information; with the development of the DRAM manufacture procedure toward nanoscale, the economic benefit can be more obvious, and errors gradually occurring in use after the DRAM particles leave the factory can be solved and the address information of the cells found to degrade in the use process can be dynamically added to the defect table, and therefore, the service life of the system can be increased.

Description

A kind of method of utilizing DRAM defective products

Technical field

The present invention relates to area information storage, relate in particular in a kind of production run the method with the DRAM defective products of bad piece.

Background technology

DRAM is indispensable main storage device in traditional PC, server, is also the indispensability of the intelligent movable equipment of rising in this world now simultaneously.Yet along with the constantly evolution downwards of process node that DRAM manufactures, the defect occurring in its manufacture process is more and more, causes the continuous decline of yield.Industry substitutes defective row and column at the Row of DRAM indoor design redundancy (OK) and Column (row) conventionally.

For example, in the Cell of 4x4 (storage unit) array, WL4 and BL8 are respectively the row, column of redundancy, suppose to have two Cell (WL1, BL2) there is defect in (WL3, BL4), shows as to read or to write function undesired, common way is the way of replacing by row, column: adopt BL8 to substitute BL2, WL4 substitutes WL3.This alternative acts is completed by address decoding circuitry: column address decoder is mapped to BL8 by the access to BL2; Row address decoder will arrive WL4 to the access map of WL3.

This traditional way can solve current most of situation: mistake Cell and relatively concentrate quantity possibility a lot, but is mainly distributed in a small amount of going or list face, and in use substantially can dynamically not increase.From the method that these ranks are alternative, can find out, the Cell service efficiency of the row, column of redundancy is very low, only has respectively 1/9 and 1/5.If Cell (WL2, BL3) makes mistakes again, can only rely on the row, column that increases more redundancy to substitute.DRAM manufacturer, for the consideration of cost, can infinitely not increase the quantity of the row, column of redundancy.Therefore, still have a certain proportion of dram chip and because of the replacement ability of the row, column that wrong Cell number or distribution have surpassed redundancy, be used as defective products discarded.This problem is along with manufacturing process node further diminishes and becomes more serious, so need a kind of method that can improve DRAM utilization factor.

In addition, this traditional way can only be carried out in the test DRAM of DRAM manufacturer particle, after selling for system manufacturer, can not make any modification.That is to say, the row, column method of substitution that this class mistake that some Cell that DRAM particle occurs in use procedure in system slowly degenerate is traditional is helpless.Once this class mistake occurs, generally can only reprocess, and changes the particle going wrong, and may cause whole product or equipment scrapping, cost is very high.

Summary of the invention

For dram chip when the plant produced Cell number of mistake or the replacement ability of the row, column that distribution has surpassed redundancy and dram chip in use the Cell of Dynamic Generation mistake cause whole DRAM to scrap, the defect that cannot normally use, the present invention realizes the object that can continue to use the defective products that above-mentioned needs scrap by the defect table that increases capable of dynamic and upgrade.

To achieve these goals, the object of the invention has been to propose a kind of method of the DRAM of utilization defective products, it is characterized in that:

Step 1.1, System self-test or automatic test machine test DRAM, searches and in DRAM, occurs wrong Ce l l recording defect address information;

Step 1.2, determines the alternative address information of the alternative Cell of the Cell that alternative step 1.1 finds;

Step 1.3, defective addresses information and alternative address information creating defect table that step 1.2 and step 1.1 are got, described defect table has at least been stored all defect address information and the alternative address information of DRAM defective products;

Step 1.4, system access DRAM, system bus is accessed DRAM mutually by address mapping unit, address mapping unit receives the address information of system bus request, inquiry defect table, according to the information in defect table, whether the address information that judges current accessed needs address to remap, if needed, by address mapping unit, by substituting replace defective address, address, realize the address translation that system bus will access and become actual flawless address, continuity and the correctness of assurance system bus reference address.

The described method of utilizing DRAM defective products, characterized by further comprising the effective address scope of calculating DRAM, the original physics Cell of DRAM sum is deducted and occurs that wrong Cell obtains effective Cell sum, realize the effective address scope of calculating DRAM, and this information is fed back to system, system is calculated effective address scope according to this information.

The described method of utilizing DRAM defective products, it is characterized in that arranging in DRAM inside a microprocessor, microprocessor is provided with DRAM self-check program, after system powers on, microprocessor automatically performs DRAM self-check program, upgrade the information of defect table, realize the effective address scope of calculating DRAM simultaneously, and this information is fed back to system.

On described microprocessor, be also provided with checking routine, whether verification there is Cell mistake in read/write DRAM process, and if there is Cell mistake, the alternative address information of recording defect address information definite alternative Cell, upgrades defect table information.

The present invention is stored the defective addresses information of dram chip and is replaced address information by dynamic increase defect list, can realize DRAM waste product particle more than %80 is become to available particle, along with DRAM processing procedure develops to nanoscale, economic benefit will be more obvious, and the mistake engendering in can solving after DRAM particle is dispatching from the factory, using, the address information of the Cell that finds in use procedure to degenerate can dynamically be joined in defect table, thereby extended the serviceable life of system.

Accompanying drawing explanation

Fig. 1 is: the system chart that utilizes the method for DRAM defective products;

Fig. 2 is: a kind of specific embodiment address translation of the present invention schematic diagram.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.

Fig. 1 is the system chart that utilizes the method for DRAM defective products, external system bus consists of address bus Address bus and data bus Data busg, address bus Address bus is connected with address mapping unit Address_remap_unit, address mapping unit Address_remap_unit is by the external system request access address lookup defect table Defect_table of address bus Address bus input, defect table Defect_table has stored all defect address and the alternative address information thereof of all dram chips in system, address mapping unit Address_remap_unit is converted into the flawless relocatable address Address_remap of actual DRAM according to the information in defect table Defect_table by the reference address of system bus request, defective address is skipped, thereby guarantee that the DRAM address space of seeing from system bus remains continuous, although total length has reduced.The address space quantity reducing just depends on defective addresses number and the distribution of DRAM.Finally, what the relocatable address Address_remap after Address_remap_unit conversion was addressed in DRAM chips by dram controller DRAM_ctrl is all there is no defect Cell, finally realizes the access of DRAM.

Fig. 2 is a kind of specific embodiment address translation of the present invention schematic diagram, and the actual physics space of DRAM is 256byte, and defect list comprises following information and effective DRAM size DRAM_SIZE information:

Defect start address

Length

Substitute address

?

DRAM just produces, and this form is defaulted as sky, DRAM_SIZE=256.

When DRAM is through test link, find that address 0x04-0x07 exists defect, renewal defect list and effectively DRAM size DRAM_SIZE information:

Defect start address	Length	Substitute address
			0x04	0x04	0xFC

Upgrade DRAM_SIZE=256-4=252 simultaneously.In order to guarantee dirigibility, substituting address acquiescence has high-end address to start to replace.External system reads DRAM_SIZE, and the effective address scope that can know DRAM is 0x0-0xFB; When external system has access to 0x04-0x07 address, by inquiry defect list information, address is remapped to 0xFC-0xFF.

When DRAM in actual use or address 0x10-0x17 in System self-test, detected again and have defect, upgrade defect list and effective DRAM size DRAM_SIZE information:

Defect start address	Length	Substitute address
			0x04	0x04	0xFC
0x10	0x08	0xF4

Upgrade DRAM_SIZE=252-8=244 simultaneously.In order to guarantee dirigibility, substituting address acquiescence has high-end address to start to replace.External system reads DRAM_SIZE, and the effective address scope that can know DRAM is 0x0-0xF3; When external system has access to 0x04-0x07 address, by inquiry defect list information, address is remapped to 0xFC-0xFF; When external system has access to 0x10-0x17 address, by inquiry defect list information, address is remapped to 0xF4-0xFB.For external system or according to continuous address access, be that effective address scope has diminished.

Above disclosed is only an embodiment of the present invention, certainly can not limit with this interest field of basis, one of ordinary skill in the art will appreciate that all or part of flow process that realizes above-described embodiment, and the equivalent variations of doing according to the claims in the present invention, still belong to the scope that the present invention is contained.

Claims

1. a method of utilizing DRAM defective products, is characterized in that:

Step 1.1, System self-test or automatic test machine test DRAM, searches and in DRAM, occurs wrong Cell recording defect address information;

2. the method for utilizing DRAM defective products according to claim 1, characterized by further comprising the effective address scope of calculating DRAM, the original physics Cell of DRAM sum is deducted and occurs that wrong Cell obtains effective Cell sum, realize the effective address scope of calculating DRAM, and this information is fed back to system, system is calculated effective address scope according to this information.

3. the method for utilizing DRAM defective products according to claim 2, it is characterized in that arranging in DRAM inside a microprocessor, microprocessor is provided with DRAM self-check program, after system powers on, microprocessor automatically performs DRAM self-check program, upgrade the information of defect table, realize the effective address scope of calculating DRAM simultaneously, and this information is fed back to system.

4. the method for utilizing DRAM defective products according to claim 3, it is characterized in that being also provided with checking routine on described microprocessor, whether verification there is Cell mistake in read/write DRAM process, if there is Cell mistake, the alternative address information of recording defect address information definite alternative Cell, upgrades defect table information.