CN104092642B - A kind of carrier phase synchronization method and device being used in non-coherent demodulation circuit - Google Patents

A kind of carrier phase synchronization method and device being used in non-coherent demodulation circuit Download PDF

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CN104092642B
CN104092642B CN201410369979.XA CN201410369979A CN104092642B CN 104092642 B CN104092642 B CN 104092642B CN 201410369979 A CN201410369979 A CN 201410369979A CN 104092642 B CN104092642 B CN 104092642B
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symbol
carrier
chip
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CN104092642A (en
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刘昊
袁斌
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Suzhou Institute, Southeast University
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Abstract

The invention discloses a kind of carrier phase synchronization method and device being used in non-coherent demodulation circuit.This method and device are full digital starting mode, are divided into phase capturing pattern, two kinds of mode of operations of phase tracking mode.It it is the phase capturing stage in the lead code cycle:Carrier frequency offset is estimated that by the delay correlation computations to lead code;Then the result and known preamble sequence of offset estimation are utilized, initial phase is estimated;Frequency plot compensation calculation is carried out to the data received.When after lead code end cycle, starting despread data, at this moment into the Phase Tracking stage:Using demodulated come the corresponding spreading code data of symbol carry out correlation computations with the data that receive, estimate the residual phase difference of each symbol, then phase compensation calculating is carried out to the data received.The carrier phase synchronization that the present invention is designed for non-coherent demodulation digital baseband, can realize carrier phase precise synchronization under conditions of low signal-to-noise ratio.

Description

A kind of carrier phase synchronization method and device being used in non-coherent demodulation circuit
Technical field
The present invention relates to the communications field, more particularly, to the compatible IEEE realized using non-coherent demodulation mode 802.15.4 the communication system of standard, the present invention is used to achieving a butt joint the carrier phase synchronization collected mail number.
Background technology
IEEE 802.15.4 standards define the physical layer and medium education of Low rate wireless personal area network (LR-WPAN) Two specification of layer.The characteristics of IEEE 802.15.4 low rates, low-power consumption and short-distance transmission, makes it be suitably applied wireless sensing Device network field.IEEE 802.15.4c physical layers define three frequency ranges, i.e. 2.4GHz frequency ranges, 868/915MHz frequency ranges and 780MHz frequency ranges.In the special 780MHz frequency ranges of China, specification defines two kinds of physical layer modulation schemes:Modulated using O-QPSK Scheme and direct sequence spread spectrum skill and use MPSK modulation schemes and direct sequence spread spectrum skill, two kinds of modulation schemes are all used Raised cosine pulse molding mode.
Due to IEEE 802.15.4 standards towards be low-power consumption, low cost application, requirement on devices volume used Small, integrated level is high, so the demodulator circuit of IEEE 802.15.4 standards is generally adopted by non-coherent demodulation mode.Rather than Coherent demodulation mode is not know frequency shift (FS) and the initial phase of carrier wave, it is desirable to have circuit to the frequency shift (FS) of carrier wave, just Beginning phase is estimated, then enters line frequency and phase compensation to complete carrier phase synchronization.
The method of current carrier phase synchronization mainly uses phase-locked loop pll and voltage controlled oscillator VCO to be carried out in RF front ends Closed loop forward carriers are synchronous, and conventional structure has the modes such as inphase quadrature ring, quadratic loop and M side's ring to realize the same of carrier phase Step, the synchronous of this class realizes that power consumption and volume are not easy to integrated all than larger using analog device at radio frequency end mostly. And mainly have two classes currently used for IEEE 802.15.4 carrier phase synchronization circuit:The first kind is in digital base band processor Estimate frequency shift (FS) and initial phase, and phase compensation is handled not in digital baseband, digital baseband does not do phase compensation in itself Computing, but the configured information of frequency plot mistake is passed into voltage controlled oscillator VCO, allow VCO to lock, so as to complete carrier wave It is phase locked.Equations of The Second Kind is that completion frequency shift (FS) and initial phase estimate line phase compensation meter of going forward side by side in digital base band processor Calculate, to complete carrier phase synchronization.Equations of The Second Kind method uses digital design, and its advantage is can to reduce RF to set The complexity and power consumption of meter, reduce the area of whole receiver, and integrated level is high, can be readily integrated into SOC points of on-chip system In area's design.
And in digital design, Nonlinear Transformation in Frequency Offset Estimation is to carry out delay correlation using the data received mostly Calculate to complete Frequency offset estimation, if in the case of low signal-to-noise ratio, the precision meeting severe exacerbation of its Frequency offset estimation, Because it does not utilize the relevant information of known preamble sequence to reduce the interference of noise, in addition its phase compensation just for In frequency offset phase compensation, initial phase estimation and the tracking of residual phase error are not all accounted for typically, so due to existing Estimated frequency error, with the increase of packet length, the phase difference of the data point of reception can be accumulated to a very big value, and this can give Demodulator circuit causes the very big bit error rate.
The content of the invention
(1) goal of the invention
The present invention provide used in a kind of direct sequence spread spectrum communication system in non-coherent demodulation circuit full digital starting, The method and device of carrier phase synchronization, in low signal-to-noise ratio environment, this method can be accurately carried out under Low SNR And device can realize the accurate estimation and tracking of carrier phase, the bit error rate of system can be significantly reduced, receiver is improved Performance.
(2) technical scheme
The present invention is a kind of carrier phase synchronization method and device being used in non-coherent demodulation circuit, and its carrier phase is same One step process is:Carrier phase synchronization is divided into two kinds of mode of operations of phase obtaining mode and phase tracking mode, in the lead code cycle In the stage, phase obtaining mode is operated in, it estimates comprising Frequency offset estimation and initial phase, in the data despreading cycle, adopts The irreducible phase errors estimation of symbol, accurate tracking phase are realized with phase tracking mode.The process of its carrier synchronization is: It is the lead code progress delay correlation computations of L data first to the length received, time delay is one in the lead code cycle Individual chip period (L is less than or equal to preamble length), what the result to calculating was obtained using known preamble sequence delays correlation Coefficient is filtered processing, and calculates the average Δ ω of the phase after processing, obtains the estimate of frequency shift (FS);According to Δ ω The data of delay L chip period of the value to receiving rotate, eliminate the influence of frequency shift (FS), i.e., each data entered Line frequency migration is calculated, then by the data after compensation with the lead code chip progress phase corresponding to L data receiving Close and calculate, the average θ of its phase is obtained to result of calculation, the estimate of initial phase is used as;In the data despreading cycle, utilize The despread corresponding chip value of symbol out carries out correlation computations with the data received of one symbol period of delay, and The phase average φ of its result is calculated, the irreducible phase errors of symbol is used as.Then according to Δ ω, θ and φ result, calculate The phase pushing figure Ψ of each data received, carries out phase compensation calculating, completes carrier phase synchronization.Wherein data phase The calculation of offset is as follows:The stage is obtained in phase, the phase pushing figure Ψ of each data is phase accumulation value (every number According to phase-accumulated calculating increment be Δ ω) with θ's and;In the Phase Tracking stage, the phase of the initial data of each symbol is inclined Shifting amount Ψ is phase accumulation value (the phase-accumulated calculating increment of each data is Δ ω), θ and φ sum, in a symbol period The phase pushing figure that the phase pushing figure Ψ of interior data is equal to a upper data adds frequency offset phase incremental change Δ ω.
(3) technique effect
The carrier phase synchronization method and device of the present invention computes and compensates for calculating comprising phase offset, is entirely numeral Change and realize, integrated level is high, and it take into account and carries out matched filtering to the data received using known preamble sequence, Reduce influence of the noise to estimated frequency error.Propose a kind of carrier residual Phase Tracking of new judgement-feedback-type simultaneously Technology eliminates the adverse effect of phase error accumulation, is emulated by MATLAB and writes RTL code, is digitized design and test Card, shows that this method can be in maximum frequency deviation as defined in IEEE 802.15.4 agreements, data packet length is 128, signal to noise ratio Under conditions of 8.5dB, the accurate synchronization of carrier wave is completed on the premise of ensureing Packet Error Ratio less than 0.01.Fig. 6 gives not There is the conventional carrier method of synchronization that using known preamble sequence the data received are carried out with matched filtering and Phase Tracking And patent document [1] methods described is with the performance comparision figure of this patent methods described, as can be seen from Figure 6 this patent is used Method can substantially reduce the bit error rate of system under identical state of signal-to-noise, improve the noise robustness of receiver, In the case of same bit error rate, this method probably has the lifting of 2.5dB performances than document [1], and more general than traditional approach have 6dB The lifting of energy.
Referenced patent document
Patent document [1]:The frequency deviation estimating method that Lv Qiangliang loyalties are rushed etc. in a kind of wireless communication system carrier synchronizations of:In State, 200910242498.1 [P] .2010.05.19.
Brief description of the drawings
Fig. 1 is the flow chart of carrier phase synchronization method of the present invention.
Fig. 2 is the general structure schematic diagram of carrier phase synchronization device of the present invention, is estimated comprising frequency compensation estimation, initial phase Meter, phase error tracking submodule, accumulator, adder, data selector, multiplier, digital oscillator NCO modules.
Fig. 3 is Frequency offset estimation sub-modular structure schematic diagram of the present invention.
Fig. 4 is initial phase estimation sub-modular structure schematic diagram of the present invention.
Fig. 5 is phase error tracking sub-modular structure schematic diagram of the present invention.
Fig. 6 is carrier phase synchronization performance of the present invention and conventional method and patent document [1] method effect contrast figure.
Embodiment
If sequence { RnFor IEEE 802.15.4 digital baseband receiving terminal the sequence after non-coherent demodulation, can To be expressed as:
Rn=Sn·Exp(j(2πΔfnTc+θ)) (1-1)
Wherein sequence { SnIt is the baseband chip sequence that transmitting terminal is sent, Δ f is frequency shift (FS), TcFor chip duration, θ is initial phase.
To the data delay correlation computations received, i.e.,
Then the sequence is multiplied by sequence { Dn, whereinClaim sequence { DnIt is known code Sequence delays correlation, then the average value of the phase of preceding L result is calculated, frequency offset phase increment Delta ω is obtained, i.e.,:
Because the auto-correlation function of spreading code is real number, soPhase angle be 0.Above formula is calculated Phase value be exactly the π Δs fT of increment Delta ω caused by frequency shift (FS)=2c, Arg () is to take phase angle mean value calculation.
Calculate after phase increment Δ ω caused by frequency shift (FS), it is possible to use following formula obtains initial phase θ, i.e.,
After leading character symbol period terminates, the cycle is de-spread into data, at this moment carrier phase synchronization device enters last phase Position tracking phase, its thinking is to be fed back to using the spread spectrum code sequence for the symbol adjudicated in phase error tracking module come complete Into Phase Tracking, calculated using following formula:
In the lead code cycle, enter applying aspect obtaining mode, the data phase offset Ψ received uses the side of being calculated as below Formula:
Ψn=θ+Δ ω × n (1-6)
The cycle is de-spread in data, into phase tracking mode, in the starting point of each symbol, the data phase received is inclined Shifting amount Ψ is calculated using following formula:
Ψn=φ+θ+Δ ω × n (1-7)
The phase pushing figure Ψ of data in symbol period adds Δ ω using the phase pushing figure of previous data, i.e.,
Ψn+1n+Δω (1-8)
After the phase pushing figure Ψ for calculating the data received, frequency plot compensation can be carried out using following formula, if Data sequence after compensation for R,n}
R,n=RnExp (- j ψ)=Sn (1-9)
Analysis process above is also the step process of whole carrier phase synchronization method, from drawing of being not difficult is analyzed above It realizes device.IEEE 802.15.4 physical layer protocol data units (PHY protocol data unit, PPDU) have 8 Symbol0 as lead code, before several symbol0 be used for complete energy measuring and automatic growth control (AGC) etc., it is remaining Lead code is used for carrying out Frequency offset estimation and initial phase estimation.The flow chart of whole digital carrier phase synchronization method is as schemed Shown in 1, device is realized as shown in Fig. 2 being divided into phase obtains mode of operation and Phase Tracking mode of operation, in the leading character cycle In, phase obtaining mode is operated in, this mainly completes Frequency offset estimation and initial phase estimation, it realizes structure drawing of device point Not as shown in Figure 3 and Figure 4, data phase offset at this moment is calculated using formula (1-6), and data phase compensation is using formula (1-9) To calculate.After leading character end cycle, the stage is de-spread into data, now carrier phase synchronization device enters phase error tracking Pattern, the phase pushing figure of the data received is calculated using formula (1-7) and formula (1-8), and data phase compensation is using formula (1- 9) calculate.
Fig. 3 is Frequency offset estimation sub-modular structure schematic diagram, and delayer therein is completed to the code of the data received Piece is delayed, and correlator mainly realizes formula (1-2) calculating.The chip value D for the known preamble that ROM table storages aren, lead code is Repeat, so ROM tables only need to store the chip value of a leading symbol, periodically circulation output.Multiplier is complete Product in an accepted way of doing sth (1-3) is calculated, and phase calculation module perfect (1-3) asks phase angle computing, and actual way of realization can be with It is to look for table or Coordinate Rotation Digital calculates CORDIC modes.Accumulator realizes the phase read group total of formula (1-3), constant divider Device realizes that (1-3) seeks phase mean value computation.
Fig. 4 is that initial phase estimates sub-modular structure schematic diagram, and the k Δs ω of accumulator perfect (1-4) therein is calculated, Delayer completes the delay of L chip of input data, and NCO completes ejkΔωCalculate, multiplier is completedCalculate, it is related Device is completedCalculate.
As being due to the form of initial phase algorithm for estimating with tracking phase error algorithm, time of work is to separate , simply PN codes sequence is different, can share a module, to simplify structure, save circuit resource and area, reduction electricity The power consumption on road.

Claims (9)

1. a kind of carrier phase synchronization method being used in non-coherent demodulation circuit, comprises the following steps:
Step S101:It is L data progress delay correlation computations, time delay to the length received within the lead code cycle For a chip period, L is less than or equal to preamble length;
Step S102:The delay correlation of lead code chip corresponding to this precalculated L data, delay standby to make Time is a chip period;
Step S103:The product of step S101 and S102 result of calculation is sought, and calculates the phase of product term, the equal of phase is obtained It is worth Δ ω, is used as the estimate of frequency shift (FS);
Step S104:Frequency offset compensation calculating is carried out to each data, the result of calculating is postponed into L unit, and calculate The correlation of lead code chip corresponding to L data of itself and this, phase is obtained to result of calculation, and obtain the average value of phase θ, is used as the estimate of initial phase;
Step S105:By step S103 and S104 results added, the phase pushing figure Ψ of each data received is calculated;
Step S106:In the data despreading cycle, receive symbol data is postponed into a symbol period, and search solution The corresponding chip value of symbol come is expanded, and the data of delay are subjected to correlation computations with corresponding chip, correlation is calculated Phase, obtain its average φ, be used as the symbol irreducible phase errors estimate in Phase Tracking stage;
Step S107:In the original position of each symbol, by step S103, S104 and S106 results added, reception is calculated The phase pushing figure Ψ of the data of the original position of each symbol arrived, inside a symbol period, the number each received According to phase pushing figure added up Δ ω for the phase pushing figure Ψ of previous data;
Step S108:According to step S105 and step S107 result of calculation, frequency plot compensation is carried out to the data received.
2. the carrier phase synchronization method being used for according to claim 1 in non-coherent demodulation circuit, it is characterised in that described Method is used for the communication system of compatibility IEEE 802.15.4 standards.
3. utilized in the carrier phase synchronization method being used for according to claim 1 in non-coherent demodulation circuit, step S103 Chip value known to lead code and its correlated results of delay carry out filter step S101 result, reach the mesh of reduction noise jamming 's.
4. the carrier phase synchronization method being used for according to claim 1 in non-coherent demodulation circuit, it is characterised in that use The chip value for the symbol adjudicated is fed back comes together to estimate that the accumulation of phase is missed with the input data after one symbol of delay Difference, to realize the tracking of phase error, irreducible phase errors is calculated using this judgement-feedback system.
5. the carrier phase synchronization device that method is realized according to claim 1, it includes:
Delayer:For completing the operation of the data delay in step S101, S104, S106;
Correlator:For completing the associative operation in step S101, S104, S106;
Multiplier:Multiplication for completing step S103, step S104 frequency offset compensation calculates operation;
Phase calculation:Phase calculation for calculation procedure S103, S104, S106 is operated;
Accumulator:Phase read group total for completing step S103, S104, S106 is operated;
Constant diviser:Phase mean value computation for completing step S103, S104, S106 is operated;
ROM tables:Result data for storing step S102;
Lead code ROM tables:Value for storing step S104 lead code chip;
PN code sequence shifting memories:For the storage and displacement of the PN chip values for completing the symbol that step S106 judgements-feedback comes;
Numerically-controlled oscillator NCO:Phase needed for for completing in step S104, S108 is calculated to sinusoidal, cosine.
6. carrier phase synchronization device according to claim 5, it is characterised in that described device is used for compatibility IEEE 802.15.4 the communication system of standard.
7. carrier phase synchronization device according to claim 5, it is characterised in that ask for phase calculation using look-up table or Coordinate Rotation Digital calculates CORDIC mode to realize.
8. carrier phase synchronization device according to claim 5, it is characterised in that numerically-controlled oscillator NCO is used and looked into Table or Coordinate Rotation Digital is looked for calculate CORDIC mode to realize.
9. carrier phase synchronization device according to claim 5, it is characterised in that initial phase is estimated and symbol last phase Position estimation error has identical structure, and simply the sequence of PN chips is different, is realized using same module is shared.
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