CN104079275A - Radio frequency switch assembly - Google Patents
Radio frequency switch assembly Download PDFInfo
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- CN104079275A CN104079275A CN201410292997.2A CN201410292997A CN104079275A CN 104079275 A CN104079275 A CN 104079275A CN 201410292997 A CN201410292997 A CN 201410292997A CN 104079275 A CN104079275 A CN 104079275A
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- nmos pipe
- inductance
- radio frequency
- switch assembly
- grounding
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Abstract
The invention discloses a radio frequency switch assembly. The radio frequency switch assembly comprises an emission channel (11), a receiving channel (22), a grounding channel (44) and a grounding channel (55). The emission channel (11) comprises an NMOS transistor M1 and an inductor L1. The receiving channel (22) comprises an NMOS transistor M3 and an inductor L3. The grounding channel (44) comprises an NMOS transistor M2 and an inductor L2. The grounding channel (55) comprises an NMOS transistor M4 and an inductor L4. According to the radio frequency switch assembly, the influence of parasitic capacitance generated by the NMOS transistors is eliminated through the method for connecting the two ends of the NMOS transistors with the inductors in parallel, the isolation degree is effectively improved, and meanwhile the radio frequency switch assembly is simple in circuit structure and low in cost.
Description
Technical field
The present invention relates to switch module technical field, more specifically relate to a kind of radio frequency switch assembly.
Background technology
Transmit-receive switch assembly is widely used in civilian, military and special dimension, and it is requisite critical component in radio communication; At present main implementation still realizes with the form of discrete component, and this has just caused, and transmitting-receiving subassembly volume is large, power consumption large, use the unfavorable factors such as inconvenient.
Traditional transmit-receive switch generally adopts PIN pipe string/parallel-connection structure, and it realizes schematic diagram as shown in Figure 1, and its operation principle is that PIN1, PIN2 are the switch of a series connection branch road, and PIN5, PIN6 send out the switch of branch road with being parallel to; PIN3, PIN4 are the switch on series connection revenue and expenditure road, and PIN7, PIN8 are the switch that is parallel to revenue and expenditure road, ground; PIN1, PIN2 conducting when signal is launched, PIN5, PIN6 cut-off, PIN3, PIN4 cut-off in revenue and expenditure road simultaneously, PIN7, PIN8 conducting are conducting to ground by leakage signal, thereby can improve the isolation of radio-frequency (RF) switch.Circuit structure in conjunction with Fig. 1 can find out, traditional transmit-receive switch circuit adopts PIN pipe to realize, and the circuit parameter of its switch isolation degree during mainly by the cut-off of PIN pipe determine, generally at 20dBc, isolation is not high.Secondly sort circuit implementation structure complexity, and circuit working also needs more complicated drive circuit, and this just causes, and transmit-receive switch assembly volume is large, power consumption is large, can not be integrated with other functional module.
Summary of the invention
(1) technical problem that will solve
The technical problem to be solved in the present invention is how to improve the isolation of switch module, simplifies circuit structure simultaneously.
(2) technical scheme
In order to solve the problems of the technologies described above, the invention provides a kind of radio frequency switch assembly, described a kind of radio frequency switch assembly comprises transmission channel 11, receive path 22, Grounding 44 and Grounding 55; Described passage 11 comprises NMOS pipe M1 and inductance L 1; Described receive path 22 comprises NMOS pipe M3 and inductance L 3; Described Grounding 44 comprises NMOS pipe M2 and inductance L 2; Described Grounding 55 comprises NMOS pipe M4 and inductance L 4;
The drain electrode of the drain electrode of described NMOS pipe M1 and described NMOS pipe M2 is all connected with transmitting terminal, and the grid of the grid of described NMOS pipe M1 and described NMOS pipe M4 is all connected with control voltage Vct1; The source electrode of the source electrode of described NMOS pipe M1 and described NMOS pipe M3 is all connected with common port 33; Described common port 33 connects antenna; Described inductance L 1 is connected in parallel on the two ends of described NMOS pipe M1; The grid of the grid of described NMOS pipe M3 and described NMOS pipe M2 is all connected with described control voltage Vct2; The drain electrode of the drain electrode of described NMOS pipe M3 and described NMOS pipe M4 is all connected with receiving terminal; Described inductance L 3 is connected in parallel on the two ends of described NMOS pipe M3; The source grounding of the source electrode of described NMOS pipe M4 and described NMOS pipe M2; Described inductance L 2 is connected in parallel on the two ends of described NMOS pipe M2; Described inductance L 4 is connected in parallel on the two ends of described NMOS pipe M4.
Preferably, described control voltage Vct2 and control voltage Vct1 single spin-echo.
Preferably, described inductance L 1, L2, L3, L4 are snakelike inductance.
(3) beneficial effect
The invention provides a kind of radio frequency switch assembly, by shunt inductance on NMOS pipe, make the equivalent parasitic capacitances of inductance and NMOS radio-frequency (RF) switch form parallel resonance, thereby greatly improved the isolation between radio frequency link, in addition, this circuit structure is simple, and power consumption is little, circuit level is high.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the electrical block diagram of traditional transmit-receive switch;
Fig. 2 is the electrical block diagram of a kind of radio frequency switch assembly of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Following examples are used for illustrating the present invention, but can not be used for limiting the scope of the invention.
Fig. 2 is the electrical block diagram of a kind of radio frequency switch assembly of the present invention; Described a kind of radio frequency switch assembly comprises transmission channel 11, receive path 22, Grounding 44 and Grounding 55; Described passage 11 comprises NMOS pipe M1 and inductance L 1; Described receive path 22 comprises NMOS pipe M3 and inductance L 3; Described Grounding 44 comprises NMOS pipe M2 and inductance L 2; Described Grounding 55 comprises NMOS pipe M4 and inductance L 4.
The drain electrode of the drain electrode of described NMOS pipe M1 and described NMOS pipe M2 is all connected with transmitting terminal, and the grid of the grid of described NMOS pipe M1 and described NMOS pipe M4 is all connected with control voltage Vct1; The source electrode of the source electrode of described NMOS pipe M1 and described NMOS pipe M3 is all connected with common port 33; Described common port 33 connects antenna; Described inductance L 1 is connected in parallel on the two ends of described NMOS pipe M1; The grid of the grid of described NMOS pipe M3 and described NMOS pipe M2 is all connected with described control voltage Vct2; The drain electrode of the drain electrode of described NMOS pipe M3 and described NMOS pipe M4 is all connected with receiving terminal; Described inductance L 3 is connected in parallel on the two ends of described NMOS pipe M3; The source grounding of the source electrode of described NMOS pipe M4 and described NMOS pipe M2; Described inductance L 2 is connected in parallel on the two ends of described NMOS pipe M2; Described inductance L 4 is connected in parallel on the two ends of described NMOS pipe M4.Described control voltage Vct2 and control voltage Vct1 single spin-echo.In Fig. 2, resistance R is conductor resistance.
Operation principle: control voltage Vct1 controls transistor M1 and M4 closes and conducting, and Vct2 controls transistor M3 and M2 closes and conducting, thereby realizes the different choice in the path of radiofrequency signal.When controlling voltage, be that Vct1 is while being high level, controlling voltage Vct2 is low level, M1 and M4 are in conducting state, M3 and M2 are in cut-off state, radiofrequency signal is launched by transmission channel 11 arrival common points 33 in the ideal case, but realize defect and the impact of the parasitic capacitance of circuit in high-frequency work situation due to circuit technology, thereby cause part radiofrequency signal in circuit can in each passage, reveal each other the problem that isolation is not high that causes, now by the method at NMOS pipe shunt inductance, make parasitic capacitance and shunt inductance generation resonance that under high frequency, NMOS pipe produces, resonance impedance is far longer than the impedance of parasitic capacitance itself, offset the impact of parasitic capacitance, improve the isolation under high frequency, the radiofrequency signal that simultaneously makes to be leaked in Grounding 55 by M4 is conducting to ground, and the radiofrequency signal of receiving terminal will be very little like this, improved the isolation of receive path and transmission channel.
When controlling voltage, be that Vct1 is while being low level, controlling voltage Vct2 is high level, M1 and M4 are in cut-off state, M3 and M2 are in conducting state, radiofrequency signal is transmitted into receive path 22 by common port 33, the impact of offsetting parasitic capacitance by being connected in parallel on the inductance at NMOS pipe two ends, and the radiofrequency signal being simultaneously leaked in Grounding 44 is conducting to ground by M2, the radiofrequency signal of transmitting terminal will be very little like this, thereby improved the isolation of receive path and transmission channel.
Described inductance L 1, L2, L3, L4 all adopt snakelike inductance, make parasitic capacitance and shunt inductance generation resonance that under high frequency, NMOS pipe produces, and resonance impedance is far longer than the impedance of parasitic capacitance itself, offsets the impact of parasitic capacitance.If operating frequency is the parasitic capacitance under f0=1320MHz is Ct, the inductance value of resonance under 1320MHz is L=Ct/ (1320*2 π) 2.A kind of radio frequency switch assembly of the present invention is realized simple, effect improved obvious, has not only greatly improved receive-transmit isolation, also the differential loss of passage is greatly improved.
Above execution mode is only for the present invention is described, but not limitation of the present invention.Although the present invention is had been described in detail with reference to embodiment, those of ordinary skill in the art is to be understood that, technical scheme of the present invention is carried out to various combinations, revises or is equal to replacement, do not depart from the spirit and scope of technical solution of the present invention, all should be encompassed in the middle of claim scope of the present invention.
Claims (3)
1. a radio frequency switch assembly, is characterized in that, described a kind of radio frequency switch assembly comprises transmission channel (11), receive path (22), Grounding (44) and Grounding (55); Described passage (11) comprises NMOS pipe M1 and inductance L 1; Described receive path (22) comprises NMOS pipe M3 and inductance L 3; Described Grounding (44) comprises NMOS pipe M2 and inductance L 2; Described Grounding (55) comprises NMOS pipe M4 and inductance L 4;
The drain electrode of the drain electrode of described NMOS pipe M1 and described NMOS pipe M2 is all connected with transmitting terminal, and the grid of the grid of described NMOS pipe M1 and described NMOS pipe M4 is all connected with control voltage Vct1; The source electrode of the source electrode of described NMOS pipe M1 and described NMOS pipe M3 is all connected with common port (33); Described common port (33) connects antenna; Described inductance L 1 is connected in parallel on the two ends of described NMOS pipe M1; The grid of the grid of described NMOS pipe M3 and described NMOS pipe M2 is all connected with described control voltage Vct2; The drain electrode of the drain electrode of described NMOS pipe M3 and described NMOS pipe M4 is all connected with receiving terminal; Described inductance L 3 is connected in parallel on the two ends of described NMOS pipe M3; The source grounding of the source electrode of described NMOS pipe M4 and described NMOS pipe M2; Described inductance L 2 is connected in parallel on the two ends of described NMOS pipe M2; Described inductance L 4 is connected in parallel on the two ends of described NMOS pipe M4.
2. a kind of radio frequency switch assembly according to claim 1, is characterized in that, described control voltage Vct2 and control voltage Vct1 single spin-echo.
3. a kind of radio frequency switch assembly according to claim 1, is characterized in that, described inductance L 1, L2, L3, L4 are snakelike inductance.
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CN201410292997.2A CN104079275A (en) | 2014-06-25 | 2014-06-25 | Radio frequency switch assembly |
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CN201410292997.2A CN104079275A (en) | 2014-06-25 | 2014-06-25 | Radio frequency switch assembly |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104868894A (en) * | 2015-03-23 | 2015-08-26 | 上海新微技术研发中心有限公司 | Radio frequency switch circuit and opening and closing method thereof |
CN105915203A (en) * | 2016-04-07 | 2016-08-31 | 杭州中科微电子有限公司 | Full CMOS single-pole double-throw switch circuit |
CN108206515A (en) * | 2016-12-16 | 2018-06-26 | 江苏安其威微电子科技有限公司 | The esd protection circuit of MIM capacitor |
CN110299351A (en) * | 2018-03-23 | 2019-10-01 | 台湾积体电路制造股份有限公司 | Semiconductor package part and forming method thereof |
CN112465134A (en) * | 2020-11-26 | 2021-03-09 | 重庆邮电大学 | Pulse neural network neuron circuit based on LIF model |
CN113364510A (en) * | 2021-05-10 | 2021-09-07 | 上海航天电子有限公司 | Structure and method for improving satellite-borne VDES load receiving and transmitting isolation |
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2014
- 2014-06-25 CN CN201410292997.2A patent/CN104079275A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104868894A (en) * | 2015-03-23 | 2015-08-26 | 上海新微技术研发中心有限公司 | Radio frequency switch circuit and opening and closing method thereof |
CN105915203A (en) * | 2016-04-07 | 2016-08-31 | 杭州中科微电子有限公司 | Full CMOS single-pole double-throw switch circuit |
CN108206515A (en) * | 2016-12-16 | 2018-06-26 | 江苏安其威微电子科技有限公司 | The esd protection circuit of MIM capacitor |
CN110299351A (en) * | 2018-03-23 | 2019-10-01 | 台湾积体电路制造股份有限公司 | Semiconductor package part and forming method thereof |
US11315891B2 (en) | 2018-03-23 | 2022-04-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of forming semiconductor packages having a die with an encapsulant |
US12021047B2 (en) | 2018-03-23 | 2024-06-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor packages having a die, an encapsulant, and a redistribution structure |
CN112465134A (en) * | 2020-11-26 | 2021-03-09 | 重庆邮电大学 | Pulse neural network neuron circuit based on LIF model |
CN112465134B (en) * | 2020-11-26 | 2022-05-03 | 重庆邮电大学 | Pulse neural network neuron circuit based on LIF model |
CN113364510A (en) * | 2021-05-10 | 2021-09-07 | 上海航天电子有限公司 | Structure and method for improving satellite-borne VDES load receiving and transmitting isolation |
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Inventor after: Ma Xiaogang Inventor after: Wu Lei Inventor after: Zhang Jiying Inventor before: Ma Xiaogang Inventor before: Zhang Jiying |
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Free format text: CORRECT: INVENTOR; FROM: MA XIAOGANG ZHANG JIYING TO: MA XIAOGANG WU LEI ZHANG JIYING |
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Application publication date: 20141001 |