CN104065291B - There is the neutral-point voltage balance system and method for low-frequency oscillation suppression function - Google Patents
There is the neutral-point voltage balance system and method for low-frequency oscillation suppression function Download PDFInfo
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- CN104065291B CN104065291B CN201410223321.8A CN201410223321A CN104065291B CN 104065291 B CN104065291 B CN 104065291B CN 201410223321 A CN201410223321 A CN 201410223321A CN 104065291 B CN104065291 B CN 104065291B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4833—Capacitor voltage balancing
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Abstract
The invention discloses a kind of neutral-point voltage balance system and method with low-frequency oscillation suppression function.This system includes multi-electrical level inverter and digital processing control module, and wherein digital processing control module includes sampling unit, Closed Loop Control Unit and the DPWM pwm unit being sequentially connected with;The outfan of described DPWM pwm unit accesses multi-electrical level inverter every phase each switching tube of brachium pontis by drive circuit.The method is: in each switch periods, and sampling unit gathers the DC bus-bar voltage signal of multi-electrical level inverter, the three-phase voltage signal of multi-electrical level inverter output and three-phase current signal respectively;The signal collected processes through Closed Loop Control Unit and obtains three-phase modulations ripple;Three-phase modulations ripple processes through DPWM pwm unit and obtains pulse-width modulation control signal, and this signal controls the duty of multi-electrical level inverter every phase switching tube through drive circuit.The present invention can suppress the low-frequency oscillation of multi-electrical level inverter dc bus mid-point voltage, realize neutral point voltage balance.
Description
Technical field
The invention belongs to the control technical field in Technics of Power Electronic Conversion technology, particularly one and there is low-frequency oscillation suppression
The neutral-point voltage balance system and method for function.
Background technology
In recent years, high-power conversion occasion during multi-electrical level inverter has been widely used in high pressure;Its circuit topology is tied
Structure and control method become current study hotspot.Comparing two-level inverter, multi-electrical level inverter has switch tube voltage
The plurality of advantages such as stress is low, electromagnetic noise is little, harmonic wave of output voltage aberration rate is low.
The topology of multi-electrical level inverter substantially can be divided three classes: diode-clamped, cascade connection type, striding capacitance type, its
In most widely used for Diode-clamped inverter.As a example by three-level inverter, three level diode-clamped inversions
Device can be divided into neutral point clamp type (NPC) inverter and T-shaped inverter.Ideally, DC bus-bar voltage in both topologys
Divided equally by upper and lower dc-link capacitance;But in actual application, owing to a variety of causes makes upper and lower dc-link capacitance voltage occur
Fluctuation and the upper and lower unequal situation of dc-link capacitance voltage, i.e. mid-point voltage are uneven.Mid-point voltage energy imbalance can be led
Causing the dangerous operation of power switch pipe, output voltage waveforms quality reduces, and affects system worked well time serious.
The control method of multi-electrical level inverter mainly has: sinusoidal pulse width modulation (SPWM), space vector pulse width modulation
(SVPWM), third-harmonic zero-sequence voltage pulsewidth modulation (THIPWM), discontinuous PWM (DPWM) etc..At present, both at home and abroad about in
Point voltage balance control problem has had many research.In above-mentioned pulse duration modulation method, it is inverse that DPWM modulator approach has reduction
Becoming device switching loss, improve the advantages such as inversion efficiency and receive much concern, current several typical DPWM modulator approaches have: output electricity
It is pressed in the DPWM1 method that at power frequency positive-negative half-cycle peak value, each 60 ° of interval switches are failure to actuate;Output voltage is power frequency negative half period 120 °
The DPWMMIN method being failure to actuate in interval;The DPWMMAX method etc. that output voltage is failure to actuate in 120 ° of intervals of power frequency positive half period
(being referred to as DPWMx).Such as: document 1 (Wang Xinyu, He Yingjie, Liu Jinjun. inject zero-sequence component SPWM modulation tri-level inversion
Device DC side neutral-point voltage balance mechanism [J]. electrotechnics journal, 2011,26 (5): 71-77.) by injecting 6 times times
Zero-sequence component realizes mid-point voltage control in three-phase modulations ripple control instruction voltage, but the method is complex, and it is based on one
Individual power frequency period is controlled, and compared with the method being controlled based on switch periods, regulating time is long;Document 2 (Song Wen
Auspicious, Chen Guocheng, etc. a kind of three-level space vector modulation method with neutral-point potential balance function and realization [J] thereof. China
Electrical engineering, 2006,26 (12): 96-100.) at traditional seven segmentations not possessing neutral point voltage balance regulatory function
On the basis of SVPWM control method, the new SVPWM control of a kind of combination ten syllogic, nine segmentations, seven segmentation hybrid modulation is proposed
Method alignment voltage processed is controlled, and it is by stages choice of modulation mode, wherein ten syllogic in a power frequency period
Each switch periods switching tube action under switching tube action 12 times, nine segmentation modulation systems in each switch periods under modulation system
8 times, therefore seven more traditional segmentation SVPWM control method of this compound modulation average switch loss are greatly increased.Document 3
(Cheng Shanmei, king is light, Xia Litao, Wan Shuyun. discontinuous space vector pulse width modulation strategy study [J], and servo techniques, 2002,36
(4): 37-40.) several discontinuous space vector pulse width modulation strategies of main research, for certain certain area in power frequency period
In the range of a certain phase action, thus reduce switching loss, but this control method do not have the ability of neutral-point voltage balance.
In sum, traditional SVPWM, DPWMx, SPWM control method does not the most have the energy of neutral point voltage balance regulation
Power, and traditional DPWMx method a certain section of continuum in power frequency period keep certain phase switching tube to be failure to actuate, therefore, it is possible to subtract
Few switching loss, but be failure to actuate region at switch, inverter outputting inductance current ripples increases, be in region of being failure to actuate time
Between the longest, ripple is the biggest, certainly will affect output current harmonics characteristic.
Summary of the invention
It is an object of the invention to provide that a kind of control method is simple, be prone to Digital Implementation there is low-frequency oscillation suppression merit
The neutral-point voltage balance system and method for energy.
The technical solution realizing the object of the invention is: a kind of neutral point voltage balance with low-frequency oscillation suppression function
Control system, including multi-electrical level inverter and digital processing control module, wherein digital processing control module includes being sequentially connected with
Sampling unit, Closed Loop Control Unit and DPWM pwm unit;Described sampling unit gathers multi-electrical level inverter respectively
The three-phase voltage signal of DC bus-bar voltage signal, multi-electrical level inverter output, the three-phase current letter of multi-electrical level inverter output
Number, the outfan of DPWM pwm unit accesses multi-electrical level inverter every phase each switching tube of brachium pontis by drive circuit;
In each switch periods, the sampling unit of digital processing control module gathers the direct current of multi-electrical level inverter respectively
The three-phase voltage signal of bus voltage signal, multi-electrical level inverter output, the three-phase current signal of multi-electrical level inverter output;Adopt
Collect to signal through Closed Loop Control Unit process obtain three-phase modulations ripple Va、Vb、Vc;Three-phase modulations ripple is through DPWM pulsewidth modulation list
Unit processes and obtains pulsewidth modulation (PWM) control signal, and this pwm control signal can suppress multi-electrical level inverter dc bus midpoint
The low-frequency oscillation of voltage, realize neutral point voltage balance;Described pwm control signal controls the every phase of multi-electrical level inverter through drive circuit
The duty of switching tube.
A kind of neutral-point voltage balance method with low-frequency oscillation suppression function, the method compares situation for low modulation
Under multi-electrical level inverter, comprise the following steps:
Step 1, in each switch periods, the sampling unit of digital processing control module gathers multi-electrical level inverter respectively
DC bus-bar voltage signal, multi-electrical level inverter output three-phase voltage signal, multi-electrical level inverter output three-phase current
Signal;
Step 2, Closed Loop Control Unit carry out proportional integral according to the signal collected in step 1 and base reference signal
Differential regulates, and exports three-phase modulations ripple Va、Vb、Vc;
Step 3, the DPWM pwm unit three-phase modulations ripple V to obtaining in step 2a、Vb、VcIt is adjusted, it is thus achieved that energy
Enough suppress the low-frequency oscillation of multi-electrical level inverter dc bus mid-point voltage, realize the pwm control signal of neutral point voltage balance;
Step 4, drive circuit gained pwm control signal in step 3 is distributed to multi-electrical level inverter every phase brachium pontis each
Switching tube, controls the duty of multi-electrical level inverter, simultaneously power oscillation damping, regulation neutral point voltage balance.
Compared with prior art, its remarkable advantage is the present invention: (1) have employed a kind of DPWM control method, is applied to
Multi-electrical level inverter in the case of low modulation ratio, effectively reduces switching loss;(2) this DPWM control method achieves low modulation
The neutral point voltage balance of the multi-electrical level inverter in the case of Bi, and eliminate mid-point voltage low-frequency oscillation, overcome outputting inductance electricity
The shortcoming that flow liner ripple is big;(3) this control method is without increasing extra hardware circuit, decreases output voltage, current harmonics, carries
High output waveform quality, and control method is simple, real-time is good, it is simple to Digital Realization.
Accompanying drawing explanation
Fig. 1 is the structure chart that the present invention has the neutral-point voltage balance system of low-frequency oscillation suppression function.
Fig. 2 is three-level inverter topology structure chart, and wherein (a) is T-shaped, and (b) is NPC type.
Fig. 3 is midpoint electric current and the changing trend diagram of voltage variety in the case of inversion, and wherein (a) is tradition SPWM control
Method processed, (b) is the DPWM control method of the present invention.
Fig. 4 is the corresponding relation figure of three-phase modulations ripple and space vector scattergram, and wherein (a) is three-phase modulations ripple, and (b) is
Space vector scattergram.
Fig. 5 be in Fig. 4 (b) in as a example by little triangle 1 region, the DPWM of tradition SPWM control method and the present invention controls
The midpoint electric current of method and output level state diagram, wherein (a) be tradition SPWM control method, (b) be the DPWM control of the present invention
Method processed.
Dc bus up and down under Fig. 6 is tradition SPWM method control in embodiment, the DPWM method of the present invention controls is electric
Holding voltage oscillogram, wherein (a) is tradition SPWM control method, and (b) is the DPWM control method of the present invention.
Detailed description of the invention
Below in conjunction with the accompanying drawings and the present invention is described in further detail by specific embodiment.
The present invention has the neutral-point voltage balance system and method for low-frequency oscillation suppression function, at odd number, even number
Individually modulate in switch periods, and in each switch periods first half cycle and later half cycle individually modulate so that
The action time that the positive small vector of first half cycle (negative small vector) bears small vector (positive small vector) with the later half cycle is equal, therefore one
In individual switch periods, midpoint current average is zero, it is achieved that neutral point voltage balance and there is not low-frequency oscillation.
In conjunction with Fig. 1, the present invention has the neutral-point voltage balance system of low-frequency oscillation suppression function, inverse including many level
Becoming device and digital processing control module, wherein digital processing control module includes sampling unit, the closed loop control list being sequentially connected with
Unit and DPWM pwm unit;Described sampling unit gathers the DC bus-bar voltage signal of multi-electrical level inverter, how electricity respectively
The three-phase voltage signal of flat inverter output, the three-phase current signal of multi-electrical level inverter output, DPWM pwm unit
Outfan accesses multi-electrical level inverter every phase each switching tube of brachium pontis by drive circuit;Described digital processing control module is
STM32F407 chip.
In each switch periods, the sampling unit of digital processing control module gathers the direct current of multi-electrical level inverter respectively
The three-phase voltage signal of bus voltage signal, multi-electrical level inverter output, the three-phase current signal of multi-electrical level inverter output;Adopt
Collect to signal through Closed Loop Control Unit process obtain three-phase modulations ripple Va、Vb、Vc;Three-phase modulations ripple is through DPWM pulsewidth modulation list
Unit processes and obtains pulsewidth modulation (PWM) control signal, and this pwm control signal can suppress multi-electrical level inverter dc bus midpoint
The low-frequency oscillation of voltage, realize neutral point voltage balance;Described pwm control signal controls the every phase of multi-electrical level inverter through drive circuit
The duty of switching tube.
A kind of neutral-point voltage balance method with low-frequency oscillation suppression function, the method compares situation for low modulation
Under multi-electrical level inverter, comprise the following steps:
Step 1, in each switch periods, the sampling unit of digital processing control module gathers multi-electrical level inverter respectively
DC bus-bar voltage signal, multi-electrical level inverter output three-phase voltage signal, multi-electrical level inverter output three-phase current
Signal;
Step 2, Closed Loop Control Unit carry out proportional integral according to the signal collected in step 1 and base reference signal
Differential regulates, and exports three-phase modulations ripple Va、Vb、Vc;
Step 3, the DPWM pwm unit three-phase modulations ripple V to obtaining in step 2a、Vb、VcIt is adjusted, it is thus achieved that energy
Enough suppress the low-frequency oscillation of multi-electrical level inverter dc bus mid-point voltage, realize the pwm control signal of neutral point voltage balance, tool
Body step is:
(1) in each power frequency period, switch periods is counted:
In odd number switch periods, this switch periods is divided into first half cycle and later half cycle are modulated respectively:
In first half cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmax, wherein Vmax=max{Va,Vb,VcAnd Vmax> 0,
For the phase that inverter output instantaneous voltage is maximum, then make it export bridge arm voltage and be clamped at reference to zero potential;The later half cycle
In, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmin, Vmin=min{Va,Vb,VcAnd Vmin< 0, defeated for inverter
Go out the phase that instantaneous voltage is minimum, then make it export bridge arm voltage and be clamped at reference to zero potential;
In even number switch periods, in first half cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmin, right
In the phase that inverter output instantaneous voltage is minimum, then make it export bridge arm voltage and be clamped at reference to zero potential;Second half is interim,
Three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmax, for the phase that inverter output instantaneous voltage is maximum, then make it defeated
Go out bridge arm voltage to be clamped at reference to zero potential;
(2) the new three-phase modulations ripple of gained and triangular wave are carried out friendship to cut, it is thus achieved that multi-electrical level inverter can be suppressed straight
Flow the low-frequency oscillation of bus mid-point voltage, realize the pwm control signal of neutral point voltage balance.
Step 4, drive circuit gained pwm control signal in step 3 is distributed to multi-electrical level inverter every phase brachium pontis each
Switching tube, controls the duty of multi-electrical level inverter, simultaneously power oscillation damping, regulation neutral point voltage balance.
Preferably, described low modulation is i.e. modulated than situation and is met following formula than m:
Below as a example by three-level inverter, elaborate implementation process of the present invention.
(1) mid-point voltage imbalance principle analysis under traditional control method:
If represent three kinds of states of inverter leg output level with " P ", " 0 ", " N ", then corresponding output brachium pontis electricity
Pressure and on off state are shown in Table 1.
Table 1 three-level inverter brachium pontis output voltage and on off state reference table;
Wherein SXn(X=a, b, c;N=1,2,3,4) switching tube of each brachium pontis of inverter in corresponding diagram 2 respectively, VdcTable
Show DC bus-bar voltage.When neutral point voltage balance, the equal component voltage of upper and lower dc-link capacitance, define dc bus in the case of being somebody's turn to do
Midpoint O is with reference to zero-potential point.Make Δ VNPFor the voltage of dc bus midpoint O relative to reference to zero-potential point variable quantity.Cause
This, when neutral point voltage balance, the voltage of midpoint O is relative to reference to zero-potential point variation delta VNP=0, dc-link capacitance
C1、C2VoltageZero potential, dc-link capacitance C is deviateed when mid-point voltage imbalance1、C2Voltage not
Time equal, the voltage of midpoint O is relative to reference to zero-potential point variation delta VNPExpression formula be:
Fig. 2 is T-shaped and NPC type three-level inverter topology, in a switch periods, makes midpoint current instantaneous value io
T the meansigma methods of () is io.For easy analysis, it is approximately considered in a switch periods, io(t)=io.As shown in Figure 2, open for one
Close cycle TsIn, Δ VNPWith ioRelation be:
Wherein, C is dc-link capacitance C1、C2Capacitance.
The midpoint current average i of one switch periodsoExpression formula be:
io=-(Da·ia+Db·ib+Dc·ic) (3)
Wherein ia、ib、icFor inverter three-phase output load current, it is represented by:
ia=Imsin(ωt-Φ)
ib=Imsin(ωt-2π/3-Φ) (4)
ic=Imsin(ωt+2π/3-Φ)
Wherein Da、Db、DcFor the dutycycle of each switch periods of A, B, C three-phase, as a example by tradition SPWM control method,
It is represented by:
Da=m | sin (ω t) |
Db=m | sin (ω t-2 π/3) | (5)
Dc=m | sin (ω t+2 π/3) |
In formula (5), m is modulation ratio;Φ is power-factor angle;ImFor threephase load current amplitude;ω is power frequency angular frequency.
I can be obtained by formula (3), (4), (5)oExpression formula to be write as matrix form as follows:
By formula (2), (6), Δ V can be obtainedNPExpression formula:
Set modulation and compare m=0.5;Load is resistive load Φ=0;Threephase load current amplitude and switch periods are set as
Unit quantity, power frequency angular frequency=100 π.I can be made respectively by formula (6), (7)0With time t, Δ VNPWith the waveform of time t, as
Shown in Fig. 3 (a).
From Fig. 3 (a) it can be seen that under traditional control method, ioWith Δ VNPFluctuate with the work frequencies of three times, show as
Dc-link capacitance voltage fluctuates with frequency tripling up and down, i.e. io≠ 0, Δ VNP≠ 0, then mid-point voltage deviation is with reference to zero-potential point,
There is mid-point voltage imbalance problem.
(2) under control method of the present invention, mid-point voltage control principle is analyzed
The neutral-point voltage balance method with low-frequency oscillation suppression function proposed by the invention, the method is a kind of
DPWM control method.Under DPWM of the present invention controls, dutycycle D of each switch periods of A, B, C three-phasea、Db、DcIt is expressed as:
In formula
For ensureing that the three-phase modulations wave amplitude after superposition, less than triangular wave amplitude the most not ovennodulation, need to meet condition:
m|max(ωt)-min(ωt)|≤1
So modulation ratio need to meetI.e. it is applied to the multi-electrical level inverter in the case of low modulation ratio.
By formula (2), (3), (4), (8), midpoint current average in control method next one switch periods of the present invention can be obtained
ioWith mid-point voltage relative to the voltage variety Δ V with reference to zero-potential pointNPExpression formula.In order to tradition SPWM control method
Relative analysis ioWith Δ VNPThe Changing Pattern of t in time, in conditions such as identical load, modulation ratio, switching frequency and power frequency periods
Under, i0With time t, Δ VNPShown in waveform such as Fig. 3 (b) of time t.Can be seen that, midpoint electricity in any one switch periods
Meansigma methods i of streamo=0, relatively with reference zero potential, variation delta V of mid-point voltageNP=0.Theory analysis proves side of the present invention
Method achieves neutral-point voltage balance, and there is not low-frequency oscillation.
The neutral-point voltage balance method with low-frequency oscillation suppression function that the present invention proposes, is applied to low modulation ratio
In the case of multi-electrical level inverter.It is illustrated in figure 4 the corresponding relation of three-phase modulations ripple and space vector scattergram, low modulation ratio
Time, if three-phase modulations ripple is positioned at I region shown in Fig. 4 (a) i.e. reference voltage vector VrefFall shown in Fig. 4 (b) is interior little by three
Dihedral 1 region, in tradition SPWM control method and the present invention, the control method process of DPWM is as shown in Figure 5.In tradition SPWM control
In method processed, it is impossible to ensure that the action time of paired positive small vector, negative small vector is equal, such as Fig. 5 in each switch periods
Shown in (a);In the present invention, DPWM control method is individually modulated in odd number, even number switch periods, as shown in Fig. 5 (b),
Modulator approach in each switch periods is: a switch periods is divided into first half cycle and later half cycle, and at front half cycle
Phase and later half cycle individually modulate so that the action time of the positive small vector of first half cycle (negative small vector) was born with the later half cycle
The action time of small vector (positive small vector) is equal, thus ensures that midpoint current average is zero in a switch periods, in
Point voltage balances, and there is not low-frequency oscillation.If measured in units of switch periods, its positive and negative small vector concrete action time
It is shown in Table 2.
Table 2 tradition SPWM, DPWM method of the present invention positive and negative small vector action time
In table 2, ds1For V in Fig. 4 (b)1The action time of vector, ds2For V2The action time of vector, d's1For at V1Vector
The half of negative small vector ONN action time in action time
As shown in Fig. 5 (b), it is assumed that previous switch periods is odd number switch periods, adjacent later switch week
Phase is even number switch periods:
(1) in odd number switch periods, this switch periods is divided into first half cycle and later half cycle adjust respectively
System: in first half cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmax(Vmax> 0), wherein Vmax=max{Va,Vb,
Vc, for the phase that inverter output instantaneous voltage is maximum, then make it export bridge arm voltage and be clamped at reference to zero potential;Later half
In cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmin(Vmin< 0), Vmin=min{Va,Vb,Vc, for inversion
The phase that device output instantaneous voltage is minimum, then make it export bridge arm voltage and be clamped at reference to zero potential.
(2) in even number switch periods, in first half cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-
Vmin, for the phase that inverter output instantaneous voltage is minimum, then make it export bridge arm voltage and be clamped at reference to zero potential.Later half
In cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmax, for the phase that inverter output instantaneous voltage is maximum, then
Make it export bridge arm voltage to be clamped at reference to zero potential.
Under same switch frequency condition, tradition DPWMx, SVPWM, SPWM control method switchs secondary in a switch periods
Number is respectively as follows: 4,6,6 times;If the DPWM control method of the present invention does not differentiates between odevity switch periods and is modulated, although energy
Enough realize neutral point voltage balance, but total action 8 times in a switch periods, on-off times increases on the contrary so that switching loss
Increase.The inventive method is individually modulated in using odevity switch periods, it is achieved that neutral point voltage balance, and does not exists
Low-frequency oscillation;Within the single switch cycle, on-off times adds up to: 6 times.Therefore, use control method of the present invention, be possible not only to
Realize neutral point voltage balance power oscillation damping, and without increasing on-off times, do not increase switching loss.
Embodiment 1
For checking, the present invention proposes the feasible of a kind of neutral-point voltage balance method with low-frequency oscillation suppression function
Property and effectiveness, utilizing the Simulink instrument in MATLAB to build SPWM method respectively, to control lower tri-level inversion electric
Road, the present invention DPWM method control under three-level inverter circuit.Electric parameter in simulation process is arranged such as table 3 below:
Electric parameter in table 3 simulation process is arranged
Fig. 6 is the dc-link capacitance C under two kinds of methods control1、C2Voltage Vc1、Vc2Simulation waveform.Fig. 6 (a) is to pass
The simulation waveform of dc-link capacitance voltage, dc-link capacitance C under system SPWM method1、C2Voltage Vc1、Vc2With the base of three times
Wave frequency vibration is analyzed consistent with above-mentioned theory;Fig. 6 (b) be the present invention DPWM method under the emulation of dc-link capacitance voltage
Waveform, dc-link capacitance C1、C2Voltage Vc1、Vc2Stable at mid-point voltage about 300V, analyze consistent with above-mentioned theory.
It is notable that a kind of neutral-point voltage balance method with low-frequency oscillation suppression function that the present invention proposes controls effect.
In sum, the present invention has the neutral-point voltage balance system and method for low-frequency oscillation suppression function, should
Multi-electrical level inverter in the case of low modulation ratio, this control method is in the first half cycle of each switch periods and later half cycle
Being modulated respectively, either odd number switch periods or even number switch periods, in first half cycle, positive small vector is (negative
Small vector) action time of negative small vector interim with second half action time (positive small vector) equal, so this DPWM method
Ensure that each switch periods midpoint current average is zero, it is achieved neutral point voltage balance, and inhibit low-frequency oscillation.With traditional
SVPWM, DPWMx, SPWM control method is different, and this DPWM control method achieves the control of balance mid-point voltage;And overcome
Low-frequency oscillation, inductive current ripple under tradition DPWMx method are big, mid-point voltage controls the shortcomings such as difficulty.This control method without
Need to increase extra hardware circuit, have output waveform harmonic content low, real-time is good, and control method is simple, it is simple to digitized
The advantages such as realization.
Claims (2)
1. a neutral-point voltage balance method with low-frequency oscillation suppression function, it is characterised in that the method is for low
Multi-electrical level inverter in the case of modulation ratio, comprises the following steps:
Step 1, in each switch periods, the sampling unit of digital processing control module gathers the straight of multi-electrical level inverter respectively
Stream bus voltage signal, the three-phase voltage signal of multi-electrical level inverter output, the three-phase current signal of multi-electrical level inverter output;
Step 2, Closed Loop Control Unit carry out PID according to the signal collected in step 1 and base reference signal
Regulation, exports three-phase modulations ripple Va、Vb、Vc;
Step 3, the DPWM pwm unit three-phase modulations ripple V to obtaining in step 2a、Vb、VcIt is adjusted, it is thus achieved that can press down
The low-frequency oscillation of multi-electrical level inverter dc bus mid-point voltage processed, realize the pulse-width modulation control signal of neutral point voltage balance;
Described DPWM pwm unit is discontinuous PWM unit;Concretely comprise the following steps:
(1) in each power frequency period, switch periods is counted:
In odd number switch periods, this switch periods is divided into first half cycle and later half cycle are modulated respectively: first half
In cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmax, wherein Vmax=max{Va,Vb,VcAnd Vmax> 0, for
The phase that inverter output instantaneous voltage is maximum, then make it export bridge arm voltage and be clamped at reference to zero potential;Second half is interim, and three
Phase modulating wave Va、Vb、VcAll superposition Voffset=-Vmin, Vmin=min{Va,Vb,VcAnd Vmin< 0, instantaneous for inverter output
The phase that voltage is minimum, then make it export bridge arm voltage and be clamped at reference to zero potential;
In even number switch periods, in first half cycle, three-phase modulations ripple Va、Vb、VcAll superposition Voffset=-Vmin, for inverse
Become the phase that device output instantaneous voltage is minimum, then make it export bridge arm voltage and be clamped at reference to zero potential;Second half is interim, three-phase
Modulating wave Va、Vb、VcAll superposition Voffset=-Vmax, for the phase that inverter output instantaneous voltage is maximum, then make it export bridge
Arm voltage clamp is with reference to zero potential;
(2) the new three-phase modulations ripple of gained and triangular wave are carried out friendship to cut, it is thus achieved that multi-electrical level inverter direct current can be suppressed female
The low-frequency oscillation of line mid-point voltage, realize the pulse-width modulation control signal of neutral point voltage balance;
Step 4, drive circuit gained pulse-width modulation control signal in step 3 is distributed to multi-electrical level inverter every phase brachium pontis each
Switching tube, controls the duty of multi-electrical level inverter, simultaneously power oscillation damping, regulation neutral point voltage balance.
The neutral-point voltage balance method with low-frequency oscillation suppression function the most according to claim 1, its feature exists
I.e. modulate than situation in, described low modulation and meet following formula than m:
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CN112910293B (en) * | 2021-02-01 | 2022-08-19 | 许继集团有限公司 | Modulation method and device of three-level neutral point clamped converter |
CN113556053B (en) * | 2021-07-21 | 2022-10-28 | 华为数字能源技术有限公司 | Control method of three-phase multi-level inverter and inverter system |
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