CN104053296A - Circuit board - Google Patents
Circuit board Download PDFInfo
- Publication number
- CN104053296A CN104053296A CN201310080996.7A CN201310080996A CN104053296A CN 104053296 A CN104053296 A CN 104053296A CN 201310080996 A CN201310080996 A CN 201310080996A CN 104053296 A CN104053296 A CN 104053296A
- Authority
- CN
- China
- Prior art keywords
- circuit
- circuit board
- connector
- signal line
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Abstract
The invention relates to a circuit board comprising a signal routing layer and a dielectric layer for fixing the signal routing layer. The signal routing layer includes a signal circuit, a chip circuit, and a connector circuit, wherein the chip circuit and the connector circuit are connected with the signal circuit. The dielectric layer includes a signal circuit zone for arranging the signal circuit, a chip circuit zone for arranging the chip circuit, and a connector circuit zone for arranging the connector circuit, wherein the thickness of the connector circuit zone is larger than that of the chip circuit zone.
Description
Technical field
The present invention is about a kind of circuit board, especially a kind of circuit board of impedance matching.
Background technology
In single-ended transmission line design in circuit, have chip position (being used for arranging chip), centre position and connector position, centre position is used for connecting chip position and connector position.At chip position, due to circuit comparatively dense, so circuit can be designed to thinner circuit, and centre position will be designed to impedance matching, and connector position, in order to be coupled with connector plugging, therefore can design thicker circuit.Thinner circuit has higher impedance, and thicker circuit has lower impedance, so can cause impedance mismatch, reduces transmission quality.
Summary of the invention
In view of this, be necessary to provide a kind of impedance matching to promote the circuit board of transmission quality.
A kind of circuit board, comprise signal lead layer and for the dielectric layer of fixing described signal lead layer, described signal lead layer comprises signal line and the chip circuit being connected with described signal line and connector circuit, described dielectric layer comprise arrange described signal line signal line region, the chip circuit region of described chip circuit is set and the connector circuit region of described connector circuit is set, the thickness in described signal line region is less than the thickness in described connector circuit region and is greater than the thickness in described chip circuit region.
Compared to prior art, dielectric layer respective signal circuit, chip circuit and the connector circuit of the circuit board of the present embodiment have different thickness, thereby make the impedance reduction of chip circuit and the impedance in connector circuit region increases, the impedance of signal line is between chip circuit and the impedance of connector circuit, make the impedance matching of signal lead layer, promote transmission quality.
Accompanying drawing explanation
Fig. 1 is the schematic cross-section of embodiment of the present invention circuit board.
Fig. 2 is the floor map of embodiment of the present invention circuit board.
Main element symbol description
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Refer to Fig. 1 and Fig. 2, the circuit board 10 that the embodiment of the present invention provides comprises signal lead layer 11, dielectric layer 12 and ground plane 13.
In practical application, circuit board 10 is multilayer circuit board, according to actual needs, can be 4 layers, 6 layers or more.For easy, the signal lead layer 11 relevant with the present embodiment, dielectric layer 12 and ground plane 13 in Fig. 1, have only been provided.
Signal lead layer 11 lays respectively on two relative surfaces of dielectric layer 12 with ground plane 13, and in other words, dielectric layer 12 is between signal lead layer 11 and ground plane 13.
Signal lead layer 11 is laid and layout cabling for electronic devices and components, comprises signal line 111, chip circuit 112 and connector circuit 113.Chip circuit 112 has comprised that complex root metal wire is to be used for arranging chip, for example, and CPU, the pin of the corresponding chip of metal wire; Connector circuit 113 has plural metal wire to be used for arranging connector, for example, and USB connector, the pin of the corresponding connector of metal wire; Signal line 111 has complex root metal wire equally to be used for being electrically connected chip circuit 112 and connector circuit 113.
Each wires of signal line 111 is single strip line, its width is not to be all consistent in whole length, the width of signal line 111 and chip circuit 112 junctions is less than the width with connector circuit 113 junctions, thereby makes the impedance of signal line 111 in chip circuit 112 places be greater than signal line 111 in the impedance at connector circuit 113 places.In addition, the metal wire of connector circuit 113 and chip circuit 112 is equally also single strip line.
Dielectric layer 12 is for fixed signal routing layer 11 the conductive layer isolation with circuit board 10 by signal lead layer 11.Dielectric layer 12 is made with insulating material, adopts glass fibre hybrid resin to make in the present embodiment.Certainly, in other fact Example, also can in glass fibre and resin, add ceramic powders.
Dielectric layer 12 comprises signal line region 121, chip circuit region 122 and connector circuit region 123, and signal line region 121 is used for fixing that signal line 111, chip circuit region 122 are used for arranging chip circuit 112, connector circuit region 123 is used for arranging connector circuit 113.The thickness in signal line region 121, chip circuit region 122 and connector circuit region 123 (distance between signal lead layer 11 and ground plane 13) is different, region near chip circuit 112, because circuit is thinner, therefore adopt the chip circuit region 122 of thinner thickness, region near connector circuit 113, because circuit is thicker, therefore adopt the connector circuit region 123 that thickness is thicker, the thickness that is connector circuit region 123 is maximum, the thickness in signal line region 121 is minimum, and the thickness in signal line region 121 is placed in the middle.
Certainly, in other embodiments, the thickness in signal line region 121 can be with being of uniform thickness of chip circuit region 122 or being of uniform thickness with connector circuit region 123.
Impedance increase when thereby the thickness in connector circuit region 123 is consistent for medium thickness compared with the impedance phase that makes greatly signal line 111 herein, thereby and the thickness in chip circuit region 122 less make the impedance of signal line 111 herein reduce, the impedance of the signal line 111 between chip circuit 112 and connector circuit 113 is placed in the middle.
The thickness in the chip circuit region 122 of foregoing circuit plate 10 is little, the impedance that chip circuit 112 is higher can be reduced, and the thickness in connector circuit region 123 is large, can increase the impedance of connector circuit 113, the impedance of signal line 111 is between chip circuit 112 and connector circuit 113, thereby make the impedance of whole signal lead layer 11 consistent, promote high-frequency transmission quality.
Be understandable that, those skilled in the art also can do other variation etc. and be used in design of the present invention in spirit of the present invention, as long as it does not depart from technique effect of the present invention and all can.The variation that these are done according to spirit of the present invention, within all should being included in the present invention's scope required for protection.
Claims (10)
1. a circuit board, comprise signal lead layer and for the dielectric layer of fixing described signal lead layer, described signal lead layer comprises signal line and the chip circuit being connected with described signal line and connector circuit, described dielectric layer comprise arrange described signal line signal line region, the chip circuit region of described chip circuit is set and the connector circuit region of described connector circuit is set, it is characterized in that, the thickness in described connector circuit region is greater than the thickness in described chip circuit region.
2. circuit board as claimed in claim 1, is characterized in that, the width of described signal line and described chip junction is less than the width of described signal line and described connector junction.
3. circuit board as claimed in claim 1, is characterized in that, described dielectric layer is mainly made by glass fibre and resin.
4. circuit board as claimed in claim 3, is characterized in that, described dielectric layer comprises ceramic powders.
5. circuit board as claimed in claim 1, is characterized in that, the thickness in described signal line region is less than the thickness in described connector circuit region and is greater than the thickness in described chip circuit region.
6. the circuit board as described in as arbitrary in claim 1-5, is characterized in that, described circuit board further wraps ground plane, and described dielectric layer is between described signal lead layer and described ground plane.
7. circuit board as claimed in claim 5, is characterized in that, described signal line is comprised of single strip line.
8. circuit board as claimed in claim 5, is characterized in that, described chip circuit is single strip line.
9. circuit board as claimed in claim 5, is characterized in that, described connector circuit is single strip line.
10. circuit board as claimed in claim 5, is characterized in that, described circuit board is hard circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310080996.7A CN104053296A (en) | 2013-03-14 | 2013-03-14 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310080996.7A CN104053296A (en) | 2013-03-14 | 2013-03-14 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104053296A true CN104053296A (en) | 2014-09-17 |
Family
ID=51505549
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310080996.7A Pending CN104053296A (en) | 2013-03-14 | 2013-03-14 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104053296A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5184095A (en) * | 1991-07-31 | 1993-02-02 | Hughes Aircraft Company | Constant impedance transition between transmission structures of different dimensions |
| US5844523A (en) * | 1996-02-29 | 1998-12-01 | Minnesota Mining And Manufacturing Company | Electrical and electromagnetic apparatuses using laminated structures having thermoplastic elastomeric and conductive layers |
| US20060081960A1 (en) * | 2004-10-20 | 2006-04-20 | Advanced Semiconductor Engineering Inc. | Integrated capacitor on packaging substrate |
| CN102238797A (en) * | 2010-04-20 | 2011-11-09 | 鸿富锦精密工业（深圳）有限公司 | Flexible printed circuit |
| CN102695359A (en) * | 2011-03-21 | 2012-09-26 | 鸿富锦精密工业（深圳）有限公司 | Circuit board with BGA area |
-
2013
- 2013-03-14 CN CN201310080996.7A patent/CN104053296A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5184095A (en) * | 1991-07-31 | 1993-02-02 | Hughes Aircraft Company | Constant impedance transition between transmission structures of different dimensions |
| US5844523A (en) * | 1996-02-29 | 1998-12-01 | Minnesota Mining And Manufacturing Company | Electrical and electromagnetic apparatuses using laminated structures having thermoplastic elastomeric and conductive layers |
| US20060081960A1 (en) * | 2004-10-20 | 2006-04-20 | Advanced Semiconductor Engineering Inc. | Integrated capacitor on packaging substrate |
| CN102238797A (en) * | 2010-04-20 | 2011-11-09 | 鸿富锦精密工业（深圳）有限公司 | Flexible printed circuit |
| CN102695359A (en) * | 2011-03-21 | 2012-09-26 | 鸿富锦精密工业（深圳）有限公司 | Circuit board with BGA area |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20140917 |
|
| WD01 | Invention patent application deemed withdrawn after publication |