CN104052324A - Dual-frequency induction heating power supply and control method of inverter circuit of dual-frequency induction heating power supply - Google Patents
Dual-frequency induction heating power supply and control method of inverter circuit of dual-frequency induction heating power supply Download PDFInfo
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Abstract
The invention discloses a dual-frequency induction heating power supply. The dual-frequency induction heating power supply comprises a diode clamping full-bridge multi-level inverter circuit, wherein the diode clamping full-bridge multi-level inverter circuit is connected with a direct-current power supply and a single induction coil load circuit. According to the dual-frequency induction heating power supply, the diode clamping full-bridge multi-level inverter circuit is used for achieving non-superposition type multi-level signal output, the fundamental wave modulation range of inverter output voltage is broadened, the third harmonic adjustable range of output voltage is broadened, and dual-frequency power signals can be generated; the single induction coil load circuit is used for synchronously outputting dual-frequency power signals to accurately select dual-frequency signals, the problems that in the prior art, the fundamental wave modulation range and the harmonic adjustable range of the inverter output voltage are narrow, a resonance circuit is complex in structure, and frequency selection performance of the resonance circuit is reduced are solved, the dual-frequency induction heating power supply is simple in structure, the adjustable characteristic of the dual-frequency power signals of the induction heating power supply is improved, and the energy utilization rate of the dual-frequency power signals of the induction heating power supply is increased.
Description
Technical field
The invention belongs to induction heating power technical field, be specifically related to a kind of bifrequency induction heating power based on multilevel converter, the invention still further relates to the control method of diode clamp full-bridge multi-level inverter circuit.
Background technology
Induction heating is to utilize electromagnetic induction principle, makes the metal material inside in induction coil alternating magnetic field induce rapidly very large current vortex, thereby makes material heat temperature raising, converts electric energy to heat energy, completes the task that workpiece to be machined is heated.According to the relation of the induction heating depth of penetration and frequency, the heating thickness that is heated workpiece in heating process is subject to the control of induction coil power frequency.Therefore,, when the heated parts for the treatment of surface random geometry, the induced current of only using single-frequency by inconsistent, has a strong impact on the Disposal quality of workpiece to the treatment effect of different piece.Heat-treatment Problem research to this type of complex geometry surface workpiece shows, the induction heating mode of bifrequency output is the current approach of dealing with problems of taking both at home and abroad.
Induction heating equipment is the equipment that utilizes electromagnetic induction principle to be heat energy electric energy conversion, conventionally induction heating technique be by the positive and negative square wave replacing for load circuit provides energy, adopt half-bridge or full bridge inverter to produce the positive and negative square wave replacing.When induction heating power is applied to bifrequency output field, in the square-wave voltage of inverter circuit output, transferring energy is to account for the first-harmonic of main component and compared with low-order harmonic, should need to realize the harmonic wave of inverter circuit output voltage is regulated according to different heating processes, but the positive and negative square wave replacing cannot regulate its first-harmonic and harmonic content.Based on the adjustable function of multi-electrical level inverter harmonic wave of output voltage, cascade multilevel inverter circuit is introduced into double frequency induction heating power, but cascade multilevel inverter needs a plurality of direct-current input power supplyings, and the first-harmonic content of inverter output voltage is high, be that harmonic energy is lower, the adjustable range of harmonic wave is limited.
Induction heating power adopts the load circuit of inductance, capacitances in series resonance or parallel resonance to being heated workpiece transferring energy, for realizing the transmission of bifrequency energy, the load circuit structure of taking at present has two resonance branch circuit parallel connection structures of two induction coils, the multicomponent complex resonant circuit of single induction coil.Two induction coils exist how two coils design, how relative position is settled, have the inevitably major issue such as magnetic coupling in coil.There is the problems such as circuit topology is complicated, circuit selecting frequency characteristic is limited in current single induction coil structure.
Summary of the invention
The object of the present invention is to provide a kind of bifrequency induction heating power, solved the inverter output voltage first-harmonic modulation range existing in prior art and harmonic wave adjustable extent is little, resonant circuit structure is complicated, resonant circuit frequency-selecting performance reduces problem.
Another object of the present invention is to provide the control method for the diode clamp full-bridge multi-level inverter circuit of bifrequency induction heating power.
The technical solution adopted in the present invention is: bifrequency induction heating power, comprise diode clamp full-bridge multi-level inverter circuit, and diode clamp full-bridge multi-level inverter circuit is connected with single induction coil load circuit with DC power supply respectively;
Diode clamp full-bridge multi-level inverter circuit is formed in parallel by three series arms, and series arm one is by dividing potential drop capacitor C
1with dividing potential drop capacitor C
2be composed in series, series arm two is by power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
a3, power switch pipe MOSFET G
a4be composed in series, series arm three is by power switch pipe MOSFET G
b1, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
b3, power switch pipe MOSFET G
b4be composed in series; Dividing potential drop capacitor C
1, power switch pipe MOSFET G
a1drain electrode, power switch pipe MOSFET G
b4drain electrode be connected with the positive pole of DC power supply respectively, dividing potential drop capacitor C
2, power switch pipe MOSFET G
a4source electrode, power switch pipe MOSFET G
b1source electrode be connected with the negative pole of DC power supply respectively; Power switch pipe MOSFET G
a2with power switch pipe MOSFET G
a3also be parallel with clamp branch road one, clamp branch road one is by diode VD
1with diode VD
2be composed in series power switch pipe MOSFET G
b3with power switch pipe MOSFET G
b2between be also parallel with clamp branch road two, clamp branch road two is by diode VD
3with diode VD
4be composed in series; Dividing potential drop capacitor C
1with dividing potential drop capacitor C
2between node, diode VD
1with diode VD
2between node, diode VD
3with diode VD
4between the equal ground connection of node.
Feature of the present invention is also,
Single induction coil load circuit is connected to form by induction coil L and auxiliary resonance circuit, and auxiliary resonance circuit is by resonant inductance L
1with resonance capacitor C
3after series connection again with resonant capacitance C
4be formed in parallel.
Auxiliary resonance circuit is connected to power switch pipe MOSFET G
a2with power switch pipe MOSFET G
a3between node, induction coil L is connected to power switch pipe MOSFET G
b2with power switch pipe MOSFET G
b3between node.
Another technical scheme that the present invention takes is: the control method for the diode clamp full-bridge multi-level inverter circuit of bifrequency induction heating power, specifically comprises the following steps:
Step 1:-θ
1~θ
1interval, power switch pipe MOSFET G
b3, power switch pipe MOSFET G
a3with diode VD
2, diode VD
3conducting, diode clamp full-bridge multi-level inverter circuit output no-voltage;
Step 2: θ
1~θ
1+ α is interval, and diode clamp full-bridge multi-level inverter circuit output current is by power switch pipe MOSFET G
b1, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
a1the anti-and diode continuousing flow of interpolar, diode clamp full-bridge multi-level inverter circuit output voltage E, now output voltage commutation, output current is commutation not;
Step 3: θ
1+ α~θ
2interval, power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
b1conducting, diode clamp full-bridge multi-level inverter circuit output voltage E, output current commutation;
Step 4: θ
2~π-θ
2interval, power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2with diode VD
4conducting, dividing potential drop capacitor C
1electric discharge, dividing potential drop capacitor C
2charging, diode clamp full-bridge multi-level inverter circuit output voltage E/2; Dividing potential drop capacitor C
1lower voltage, its variable quantity is Δ U
c1, dividing potential drop capacitor C
2voltage increase, its variable quantity is Δ U
c2, Δ U
c2=-Δ U
c1;
Step 5: π-θ
2~π-θ
1interval, the running status of repeating step 3 diode clamp full-bridge multi-level inverter circuits, diode clamp full-bridge multi-level inverter circuit output voltage E;
Step 6: π-θ
1~π+θ
1interval, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2with diode VD
4, diode VD
1conducting, diode clamp full-bridge multi-level inverter circuit output no-voltage;
Step 7: π+θ
1~π+θ
1+ α is interval, and diode clamp full-bridge multi-level inverter circuit output current is by power switch pipe MOSFET G
a4, power switch pipe MOSFETG
a3, power switch pipe MOSFETG
b3, power switch pipe MOSFETG
b4the anti-and diode continuousing flow of interpolar, diode clamp full-bridge multi-level inverter circuit output voltage-E, output voltage is commutation, output current is commutation not;
Step 8: π+θ
1+ α~π+θ
2interval, power switch pipe MOSFET G
b4, power switch pipe MOSFETG
b3, power switch pipe MOSFETG
a3, power switch pipe MOSFETG
a4conducting, diode clamp full-bridge multi-level inverter circuit output voltage-E, output current commutation;
Step 9: π+θ
2~2 π-θ
2interval, diode VD
3with power switch pipe MOSFET G
b3, power switch pipe MOSFET G
a3, power switch pipe MOSFET G
a4conducting, dividing potential drop capacitor C
1charging, dividing potential drop capacitor C
2electric discharge, diode clamp full-bridge multi-level inverter circuit output voltage-E/2; Dividing potential drop capacitor C
1voltage increase Δ U
c1, dividing potential drop capacitor C
2lower voltage Δ U
c2, Δ U
c2=-Δ U
c1;
Step 10:2 π-θ
2~2 π-θ
1interval, the running status of repeating step 8 diode clamp full-bridge multi-level inverter circuits, diode clamp full-bridge multi-level inverter circuit output voltage-E;
Wherein, θ
1for switch angle one, θ
1∈ [0, pi/2], θ
2for switch angle two, θ
2∈ [0, pi/2], θ
2> θ
1, α is the angle that output current lags behind output voltage.
The invention has the beneficial effects as follows: bifrequency induction heating power of the present invention, utilize diode clamp full bridge inverter to realize non-superposing type multi-level signal output, increase inverter output voltage first-harmonic modulation range, expand output voltage triple-frequency harmonics adjustable extent, realize the generation of double frequency power signal; Adopt single induction coil load circuit synchronously to export double frequency power signal and realize the accurate selection to two-frequency signal, solved the inverter output voltage first-harmonic modulation range existing in prior art and harmonic wave adjustable extent is little, resonant circuit structure is complicated, resonant circuit frequency-selecting performance reduces problem, simple in structure, improved adjustable characteristic and the capacity usage ratio of induction heating power bifrequency power signal.
Accompanying drawing explanation
Fig. 1 is the topology diagram that the present invention is based on the bifrequency induction heating power supply circuit of multilevel converter;
Fig. 2 is the switch triggering signal of diode clamp full-bridge multi-level inverter circuit of the present invention;
Fig. 3 is embodiment of the present invention diode clamp full-bridge multi-level inverter circuit output voltage waveforms;
Fig. 4 is the Fourier waveform of embodiment of the present invention diode clamp full-bridge multi-level inverter circuit output voltage;
Fig. 5 is embodiment of the present invention load resonant circuit induction coil output current wave;
Fig. 6 is embodiment of the present invention dividing potential drop capacitor C
1with dividing potential drop capacitor C
2voltage waveform.
In figure, 1. DC power supply, 2. diode clamp full-bridge multi-level inverter circuit, 3. single induction coil load circuit, 4. dividing potential drop capacitor C
2voltage waveform, 5. dividing potential drop capacitor C
1voltage waveform.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Bifrequency induction heating power of the present invention, as shown in Figure 1, comprises diode clamp full-bridge multi-level inverter circuit 2, and diode clamp full-bridge multi-level inverter circuit 2 is connected with single induction coil load circuit 3 with DC power supply 1 respectively;
Diode clamp full-bridge multi-level inverter circuit 2 is formed in parallel by three series arms, and series arm one is by dividing potential drop capacitor C
1with dividing potential drop capacitor C
2be composed in series, series arm two is by power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
a3, power switch pipe MOSFET G
a4be composed in series, series arm three is by power switch pipe MOSFET G
b1, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
b3, power switch pipe MOSFET G
b4be composed in series; Dividing potential drop capacitor C
1, power switch pipe MOSFET G
a1drain electrode, power switch pipe MOSFET G
b4drain electrode be connected with the positive pole of DC power supply 1 respectively, dividing potential drop capacitor C
2, power switch pipe MOSFET G
a4source electrode, power switch pipe MOSFET G
b1source electrode be connected with the negative pole of DC power supply 1 respectively; Power switch pipe MOSFET G
a2with power switch pipe MOSFET G
a3also be parallel with clamp branch road one, clamp branch road one is by diode VD
1with diode VD
2be composed in series power switch pipe MOSFET G
b3with power switch pipe MOSFET G
b2between be also parallel with clamp branch road two, clamp branch road two is by diode VD
3with diode VD
4be composed in series; Dividing potential drop capacitor C
1with dividing potential drop capacitor C
2between node, diode VD
1with diode VD
2between node, diode VD
3with diode VD
4between the equal ground connection of node;
Single induction coil load circuit 3 is connected to form by induction coil L and auxiliary resonance circuit, and auxiliary resonance circuit is by resonant inductance L
1with resonance capacitor C
3after series connection again with resonant capacitance C
4be formed in parallel; Auxiliary resonance circuit is connected to power switch pipe MOSFET G
a2with power switch pipe MOSFET G
a3between node, induction coil L is connected to power switch pipe MOSFET G
b2with power switch pipe MOSFET G
b3between node.
The control method that is used for the diode clamp full-bridge multi-level inverter circuit of bifrequency induction heating power, as shown in Figure 2, G
a1~G
b4the triggering signal of respectively corresponding each power switch pipe MOSFET, specifically comprises the following steps:
Step 1:-θ
1~θ
1interval, power switch pipe MOSFET G
b3, power switch pipe MOSFET G
a3with diode VD
2, diode VD
3conducting, diode clamp full-bridge multi-level inverter circuit 2 output no-voltages;
Step 2: θ
1~θ
1+ α is interval, and diode clamp full-bridge multi-level inverter circuit 2 output currents are by power switch pipe MOSFET G
b1, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
a1the anti-and diode continuousing flow of interpolar, diode clamp full-bridge multi-level inverter circuit 2 output voltage E, now output voltage commutation, output current is commutation not;
Step 3: θ
1+ α~θ
2interval, power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
b1conducting, diode clamp full-bridge multi-level inverter circuit 2 output voltage E, output current commutation;
Step 4: θ
2~π-θ
2interval, power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2with diode VD
4conducting, dividing potential drop capacitor C
1electric discharge, dividing potential drop capacitor C
2charging, diode clamp full-bridge multi-level inverter circuit 2 output voltage E/2; Dividing potential drop capacitor C
1lower voltage, its variable quantity is Δ U
c1, dividing potential drop capacitor C
2voltage increase, its variable quantity is Δ U
c2, Δ U
c2=-Δ U
c1;
Step 5: π-θ
2~π-θ
1interval, the running status of repeating step 3 diode clamp full-bridge multi-level inverter circuits 2, diode clamp full-bridge multi-level inverter circuit 2 output voltage E;
Step 6: π-θ
1~π+θ
1interval, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2with diode VD
4, diode VD
1conducting, diode clamp full-bridge multi-level inverter circuit 2 output no-voltages;
Step 7: π+θ
1~π+θ
1+ α is interval, and diode clamp full-bridge multi-level inverter circuit 2 output currents are by power switch pipe MOSFET G
a4, power switch pipe MOSFETG
a3, power switch pipe MOSFETG
b3, power switch pipe MOSFETG
b4the anti-and diode continuousing flow of interpolar, diode clamp full-bridge multi-level inverter circuit 2 output voltages-E, output voltage is commutation, output current is commutation not;
Step 8: π+θ
1+ α~π+θ
2interval, power switch pipe MOSFET G
b4, power switch pipe MOSFETG
b3, power switch pipe MOSFETG
a3, power switch pipe MOSFETG
a4conducting, diode clamp full-bridge multi-level inverter circuit 2 output voltages-E, output current commutation;
Step 9: π+θ
2~2 π-θ
2interval, diode VD
3with power switch pipe MOSFET G
b3, power switch pipe MOSFET G
a3, power switch pipe MOSFET G
a4conducting, dividing potential drop capacitor C
1charging, dividing potential drop capacitor C
2electric discharge, diode clamp full-bridge multi-level inverter circuit 2 output voltages-E/2; Dividing potential drop capacitor C
1voltage increase Δ U
c1, dividing potential drop capacitor C
2lower voltage Δ U
c2, Δ U
c2=-Δ U
c1;
Step 10:2 π-θ
2~2 π-θ
1interval, the running status of repeating step 8 diode clamp full-bridge multi-level inverter circuits 2, diode clamp full-bridge multi-level inverter circuit 2 output voltages-E;
Wherein, θ
1for switch angle one, θ
1∈ [0, pi/2], θ
2for switch angle two, θ
2∈ [0, pi/2], θ
2> θ
1, α is the angle that output current lags behind output voltage.
Bifrequency induction heating power of the present invention, based on multilevel converter, utilize diode clamp full bridge inverter to realize non-superposing type multi-level signal output, increase inverter output voltage first-harmonic modulation range, expand output voltage triple-frequency harmonics adjustable extent, realize the generation of double frequency power signal; Adopt a resonant inductance, two resonant capacitances to go here and there and combine, form load resonant circuit with single induction coil, by induction coil, synchronously export double frequency power signal, load circuit topological structure is simple, can realize the accurate selection to two-frequency signal, improve adjustable characteristic and the capacity usage ratio of induction heating power bifrequency power signal.
Embodiment
Direct voltage E=80V, diode clamp full-bridge multi-level inverter circuit 2 parameters are set to: power switch pipe switching frequency f=20kHz, dividing potential drop capacitor C
1=C
2=10mF, switch angle is set to switching angle one θ
1=10 °, switching angle two θ
2=62 °, single induction coil load circuit 3 parameters are set to: C
3=16 μ F, C
4=9 μ F, L
1=2.2 μ H, L=1.408 μ H.
Fig. 3 is inverter circuit output voltage waveforms, and Fig. 4 is the Fourier waveform of inverter circuit output voltage, and Fig. 5 is induction coil current waveform, and Fig. 6 is dividing potential drop capacitor C
1with dividing potential drop capacitor C
2voltage waveform, by Fig. 3-Fig. 6, can be found out, diode clamp full-bridge multi-level inverter circuit 2 of the present invention can produce the voltage with multiple levels signal with bifrequency power stage, output voltage contains larger first-harmonic and low-order harmonic; Single induction coil load circuit 3 can be by single induction coil synchronous transmission bifrequency signal energy, and load circuit has good selecting frequency characteristic, and induction heating power has higher capacity usage ratio.In addition, the triggering mode of the diode clamp full-bridge multi-level inverter circuit that the present invention proposes, has improved the electric voltage equalization problem of diode clamp full bridge inverter dividing potential drop electric capacity.
Claims (4)
1. bifrequency induction heating power, it is characterized in that, comprise diode clamp full-bridge multi-level inverter circuit (2), described diode clamp full-bridge multi-level inverter circuit (2) is connected with single induction coil load circuit (3) with DC power supply (1) respectively;
Described diode clamp full-bridge multi-level inverter circuit (2) is formed in parallel by three series arms, and series arm one is by dividing potential drop capacitor C
1with dividing potential drop capacitor C
2be composed in series, series arm two is by power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
a3, power switch pipe MOSFET G
a4be composed in series, series arm three is by power switch pipe MOSFET G
b1, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
b3, power switch pipe MOSFET G
b4be composed in series; Described dividing potential drop capacitor C
1, power switch pipe MOSFET G
a1drain electrode, power switch pipe MOSFET G
b4drain electrode be connected with the positive pole of DC power supply (1) respectively, described dividing potential drop capacitor C
2, power switch pipe MOSFET G
a4source electrode, power switch pipe MOSFET G
b1source electrode be connected with the negative pole of DC power supply (1) respectively; Described power switch pipe MOSFET G
a2with power switch pipe MOSFET G
a3also be parallel with clamp branch road one, clamp branch road one is by diode VD
1with diode VD
2be composed in series described power switch pipe MOSFET G
b3with power switch pipe MOSFET G
b2between be also parallel with clamp branch road two, clamp branch road two is by diode VD
3with diode VD
4be composed in series; Described dividing potential drop capacitor C
1with dividing potential drop capacitor C
2between node, diode VD
1with diode VD
2between node, diode VD
3with diode VD
4between the equal ground connection of node.
2. bifrequency induction heating power as claimed in claim 1, is characterized in that, described single induction coil load circuit (3) is connected to form by induction coil L and auxiliary resonance circuit, and described auxiliary resonance circuit is by resonant inductance L
1with resonance capacitor C
3after series connection again with resonant capacitance C
4be formed in parallel.
3. bifrequency induction heating power as claimed in claim 1, is characterized in that, described auxiliary resonance circuit is connected to power switch pipe MOSFET G
a2with power switch pipe MOSFET G
a3between node, described induction coil L is connected to power switch pipe MOSFET G
b2with power switch pipe MOSFET G
b3between node.
4. for the control method of the diode clamp full-bridge multi-level inverter circuit of bifrequency induction heating power, specifically comprise the following steps:
Step 1:-θ
1~θ
1interval, power switch pipe MOSFET G
b3, power switch pipe MOSFET G
a3with diode VD
2, diode VD
3conducting, diode clamp full-bridge multi-level inverter circuit (2) output no-voltage;
Step 2: θ
1~θ
1+ α is interval, and diode clamp full-bridge multi-level inverter circuit (2) output current is by power switch pipe MOSFET G
b1, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
a1the anti-and diode continuousing flow of interpolar, diode clamp full-bridge multi-level inverter circuit (2) output voltage E, now output voltage commutation, output current is commutation not;
Step 3: θ
1+ α~θ
2interval, power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2, power switch pipe MOSFET G
b1conducting, diode clamp full-bridge multi-level inverter circuit (2) output voltage E, output current commutation;
Step 4: θ
2~π-θ
2interval, power switch pipe MOSFET G
a1, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2with diode VD
4conducting, dividing potential drop capacitor C
1electric discharge, dividing potential drop capacitor C
2charging, diode clamp full-bridge multi-level inverter circuit (2) output voltage E/2; Dividing potential drop capacitor C
1lower voltage, its variable quantity is Δ U
c1, dividing potential drop capacitor C
2voltage increase, its variable quantity is Δ U
c2, Δ U
c2=-Δ U
c1;
Step 5: π-θ
2~π-θ
1interval, the running status of repeating said steps 3 diode clamp full-bridge multi-level inverter circuits (2), diode clamp full-bridge multi-level inverter circuit (2) output voltage E;
Step 6: π-θ
1~π+θ
1interval, power switch pipe MOSFET G
a2, power switch pipe MOSFET G
b2with diode VD
4, diode VD
1conducting, diode clamp full-bridge multi-level inverter circuit (2) output no-voltage;
Step 7: π+θ
1~π+θ
1+ α is interval, and diode clamp full-bridge multi-level inverter circuit (2) output current is by power switch pipe MOSFET G
a4, power switch pipe MOSFETG
a3, power switch pipe MOSFETG
b3, power switch pipe MOSFETG
b4the anti-and diode continuousing flow of interpolar, diode clamp full-bridge multi-level inverter circuit (2) output voltage-E, output voltage is commutation, output current is commutation not;
Step 8: π+θ
1+ α~π+θ
2interval, power switch pipe MOSFET G
b4, power switch pipe MOSFETG
b3, power switch pipe MOSFETG
a3, power switch pipe MOSFETG
a4conducting, diode clamp full-bridge multi-level inverter circuit (2) output voltage-E, output current commutation;
Step 9: π+θ
2~2 π-θ
2interval, diode VD
3with power switch pipe MOSFET G
b3, power switch pipe MOSFET G
a3, power switch pipe MOSFET G
a4conducting, dividing potential drop capacitor C
1charging, dividing potential drop capacitor C
2electric discharge, diode clamp full-bridge multi-level inverter circuit (2) output voltage-E/2; Dividing potential drop capacitor C
1voltage increase Δ U
c1, dividing potential drop capacitor C
2lower voltage Δ U
c2, Δ U
c2=-Δ U
c1;
Step 10:2 π-θ
2~2 π-θ
1interval, the running status of repeating said steps 8 diode clamp full-bridge multi-level inverter circuits (2), diode clamp full-bridge multi-level inverter circuit (2) output voltage-E;
Wherein, θ
1for switch angle one, θ
1∈ [0, pi/2], θ
2for switch angle two, θ
2∈ [0, pi/2], θ
2> θ
1, α is the angle that output current lags behind output voltage.
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CN114070114A (en) * | 2021-10-27 | 2022-02-18 | 西安理工大学 | Method for generating dual-frequency induction heating voltage signal based on full-bridge inverter circuit |
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