CN102801349A - Single-phase nine-level converter - Google Patents

Single-phase nine-level converter Download PDF

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CN102801349A
CN102801349A CN2012102892201A CN201210289220A CN102801349A CN 102801349 A CN102801349 A CN 102801349A CN 2012102892201 A CN2012102892201 A CN 2012102892201A CN 201210289220 A CN201210289220 A CN 201210289220A CN 102801349 A CN102801349 A CN 102801349A
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李子欣
李耀华
王平
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Institute of Electrical Engineering of CAS
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Institute of Electrical Engineering of CAS
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Abstract

The invention discloses a single-phase nine-level converter. The single-phase nine-level converter is composed of a diode clamping type three-level three-phase bridge and two coupling inductances, whereon a center point of one bridge arm of the diode clamping type three-level three-phase bridge is used as one terminal of an output end of the single-phase nine-level converter, the center points of other two bridge arms of the diode clamping type three-level three-phase bridge are respectively connected with two non-public connecting points of the two coupling inductances, a public connecting point of the two coupling inductances are used as the other terminal of the output end of the single-phase nine-level converter, and the two coupling inductances are in sequence connection. The single-phase nine-level converter disclosed by the invention can be used as a converter such as a single-phase inverter and a rectifier, and a three-phase nine-level converter can be formed so as to be applied to a three-phase occasion; and in a high voltage needing occasion, the converter with more levels can be formed through the cascade connection of a nine-level converter.

Description

Single-phase nine level converters
Technical field
The present invention relates to a kind of multilevel power electronic converter.
Background technology
In order to improve voltage tolerance grade; Reduce harmonic component in output voltage; And reduce the purposes such as electromagnetic interference that cause owing to higher dv/dt (voltage build-up rate); The multilevel power electronic converter has all obtained to pay close attention to widely and study all the time, has also produced a large amount of practical application devices.Relevant both at home and abroad research institution and research and development enterprise and unit have also proposed the multi-level converter of various topological structures.
Yet nearly all multilevel power electronic converter all is through adopting a plurality of DC power supplys to realize a plurality of (more than three) level of output voltage at present.For example, traditional Cascade H bridge type multi-level converter need adopt a plurality of independently DC power supplys; And diode-clamped multi-level converter and striding capacitance type multi-level converter all obtain the direct voltage of a plurality of level through split capacitor, have obtained a plurality of DC power supplys indirectly.In existing patent, U.S. Pat 6005788, US7219673, US20060044857 and US20090237962 and middle patent 200610019724,200710062642,200520044611.2,200720083744.X, 200810204472,200710064575.X, 200710114460.7,200710144523.3,200810105139.7,200810118834.7,200810118835.1,200910045506.3 or the like all are the output voltages that adopted a plurality of transformers to obtain independent DC power supplies or obtained a plurality of level through the mode of division dc capacitor voltage.Converter for single-phase many level; For the traditional circuit topology of the output voltage of realizing nine level, all need four DC power supplys (or dc capacitor of four divisions) and at least ten six all-controlling power electronics devices like Cascade H bridge type, diode-clamped, striding capacitance type etc.Yet, can increase the volume and weight of converter when adopting a plurality of transformers to obtain independent DC power supply; And when adopting the dc capacitor of a plurality of divisions because a plurality of capacitance voltages all need be controlled with each other balancedly, therefore can make the control system of converter become complicated, thereby reduce reliability of system operation.
Summary of the invention
The present invention is intended to overcome the shortcoming of existing single-phase nine level converters, reduces direct voltage and dc capacitor, when reducing harmonic wave of output voltage content, improves the multi-level converter reliability of operation.
The present invention is made up of conventional diode clamp type three level three-phase bridge and two coupling inductances.Three brachium pontis of described diode-clamped three level three-phase bridge are made up of power electronic power device.The output of a brachium pontis in the three-phase bridge is as a terminal of the single-phase nine level voltage code converter outputs of the present invention; The output of two other brachium pontis in the three-phase bridge links to each other with two non-points of common connection of two coupling inductances respectively, and the points of common connection of coupling inductance is as the another one terminal of the single-phase nine level converter outputs of the present invention.Simultaneously, the connected mode of two coupling inductances connects for suitable in succession, and promptly the points of common connection of two coupling inductances is the end of the same name of a coupling inductance and the points of common connection of another one coupling inductance non-same polarity.
Single-phase nine level converters of the present invention have following characteristics and advantage:
1. only need two DC power supplys and 12 full-control type power electronic switching devices just can produce the output voltage of nine level.With respect to traditional single-phase nine level converters, the quantity of full-control type device required for the present invention is few, and is simple in structure, and reliability is high.
2. the dc voltage stress of each power electronic power device is all identical, is convenient to the design and the selection of device.
3. the minimum levels value of output voltage is 1/4 of a DC bus-bar voltage, compares the dv/dt that can reduce harmonic content and output voltage greatly with the single-phase full bridge code converter, also just can the reduction system electromagnetic interference during operation.
4. only need on common diode-clamped three level three-phase bridge bases, add two coupling inductances can realize, simple in structure, very is convenient to manufacture.
5. flexible configuration of the present invention, applied widely, both can be used for single phase system and also can be used for three-phase system, for example rectifier, inverter etc., module also can be applied to high-pressure system when carrying out cascade, for example HVDC transmission system, high-voltage alternating frequency conversion system etc.
Description of drawings
Fig. 1 is the circuit theory diagrams of single-phase nine level converters of the present invention;
Fig. 2 is the single-phase nine level converter output voltage u of the present invention AbSimulation waveform figure;
Fig. 3 is load current i bThe simulation calculation oscillogram;
Fig. 4 is u AbSpectrum analysis figure.
Embodiment
Further specify the present invention below in conjunction with accompanying drawing and embodiment.
As shown in Figure 1, single-phase nine level converters of the present invention are made up of diode-clamped three level three-phase bridge and two coupling inductances.Constituting of said diode-clamped three level three-phase bridge by two DC power supplys, first brachium pontis, second brachium pontis and the 3rd brachium pontis.Three brachium pontis of diode-clamped three level three-phase bridge are by 12 full-control type power electronic switching device S 11-S 14, S 21-S 24, S 31-S 34With 18 diode D 11-D 14, D 21-D 24, D 31-D 34, constitute.With S 11-S 14The situation of selecting IGBT (insulated gate bipolar transistor) for use is an example, and the connected mode between each device is:
Described two DC power supply E 1And E 2For being connected in series, i.e. the first DC power supply E 1The negative pole and the second DC power supply E 2Positive pole be connected a bit, this tie point is designated as the mid point n of dc bus; The first DC power supply E 1Positive pole be designated as the anodal P of dc bus; The second DC power supply E 2Negative pole be designated as the anodal N of dc bus.
Described first brachium pontis is by four IGBT S 11, S 12, S 13, S 14With six diode D 11, D 12, D 13, D 14, D 15And D 16Constitute; Four IGBT S 11, S 12, S 13And S 14Connect successively, i.e. an IGBTS 11Emitter and the 2nd IGBT S 12Collector electrode link together the 2nd IGBT S 12Emitter and the 3rd IGBT S 13Collector electrode link together, be designated as mid point 1, the three IGBT S of described first brachium pontis 13Emitter and the 4th IGBT S 14Collector electrode link together; The first diode D 11With an IGBT S 11Inverse parallel, the i.e. first diode D 11An anode and an IGBT S 11Emitter link together the first diode D 11A negative electrode and an IGBT S 11Collector electrode link together; The second diode D 12With an IGBTS 12Inverse parallel, the i.e. second diode D 12Anode and the 2nd IGBT S 12Emitter link together the second diode D 12Negative electrode and the 2nd IGBT S 12Collector electrode link together; The 3rd diode D 13With the 3rd IGBT S 13Inverse parallel, i.e. the 3rd diode D 13Anode and the 3rd IGBT S 13Emitter link together the 3rd diode D 13Negative electrode and the 3rd IGBT S 13Collector electrode link together; The 4th diode D 14With the 4th IGBT S 14Inverse parallel, i.e. the 4th diode D 14Anode and the 4th IGBT S 14Emitter link together the 4th diode D 14Negative electrode and the 4th IGBT S 14Collector electrode link together; The 5th diode D 15Anode and the 6th diode D 16Negative electrode connect the mid point n point all be connected to dc bus; The 5th diode D 15Negative electrode be connected to an IGBT S 11Emitter and the 2nd IGBT S 12Collector electrode; The 6th diode D 16Anode be connected to the 3rd IGBT S 13Emitter and the 4th IGBT S 14Collector electrode; The one IGBTS 11Collector electrode be connected to the anodal P of dc bus; The 4th IGBT S 14Emitter be connected to the negative pole N of dc bus.
Described second brachium pontis is by four IGBT S 21, S 22, S 23, S 24With six diode D 21, D 22, D 23, D 24, D 25And D 26Constitute; The 5th IGBT S 21, the 6th IGBT S 22, the 7th IGBT S 23, the 8th IGBT S 24Connect successively, i.e. the 5th IGBT S 21Emitter and the 6th IGBT S 22Collector electrode link together the 6th IGBT S 22Emitter and the 7th IGBT S 23Collector electrode link together, be designated as mid point 2, the seven IGBT S of described second brachium pontis 23Emitter and the 8th IGBT S 24Collector electrode link together; D 21With S 21Inverse parallel, i.e. D 21Anode and S 21Emitter link together D 21Negative electrode and S 21Collector electrode link together; D 22With S 22Inverse parallel, i.e. D 22Anode and S 22Emitter link together D 22Negative electrode and S 22Collector electrode link together; D 23With S 23Inverse parallel, i.e. D 23Anode and S 23Emitter link together D 23Negative electrode and S 23Collector electrode link together; D 24With S 24Inverse parallel, i.e. D 24Anode and S 24Emitter link together D 24Negative electrode and S 24Collector electrode link together; The 11 diode D 25Anode and the 12 diode D 26Negative electrode connect the mid point n point all be connected to dc bus; The 11 diode D 25Negative electrode be connected to the 5th IGBT S 21Emitter and the 6th IGBT S 22Collector electrode; The 12 diode D 26Anode be connected to the 7th IGBT S 23Emitter and the 8th IGBT S 24Collector electrode; The 5th IGBT S 21Collector electrode be connected to the anodal P of dc bus; The 8th IGBT S 24Emitter be connected to the negative pole N of dc bus.
Described the 3rd brachium pontis is by four IGBT S 31, S 32, S 33, S 34With six diode D 31, D 32, D 33, D 34, D 35And D 36Constitute; The 9th IGBT S 31, the tenth IGBT S 32, the 11 IGBT S 33, the 12 IGBT S 34Connect successively, i.e. the 9th IGBT S 31Emitter and the tenth IGBT S 32Collector electrode link together the tenth IGBT S 32Emitter and the 11 IGBT S 33Collector electrode link together, be designated as mid point 3, the 11 IGBT S of described the 3rd brachium pontis 33Emitter and the 12 IGBT S 34Collector electrode links together; D 31With S 31Inverse parallel, i.e. D 31Anode and S 31Emitter link together D 31Negative electrode and S 31Collector electrode link together; D 32With S 32Inverse parallel, i.e. D 32Anode and S 32Emitter link together D 32Negative electrode and S 32Collector electrode link together; D 33With S 33Inverse parallel, i.e. D 33Anode and S 33Emitter link together D 33Negative electrode and S 33Collector electrode link together; D 34With S 34Inverse parallel, i.e. D 34Anode and S 34Emitter link together D 34Negative electrode and S 34Collector electrode link together; The 17 diode D 35Anode and the 18 diode D 36Negative electrode connect the mid point n point all be connected to dc bus; The 17 diode D 35Negative electrode be connected to the 9th IGBT S 31Emitter and the tenth IGBT S 32Collector electrode; The 18 diode D 36Anode be connected to the 11 IGBT S 33Emitter and the 12 IGBT S 34Collector electrode; The 11 IGBT S 31Collector electrode be connected to the anodal P of dc bus; The 12 IGBT S 34Emitter be connected to the negative pole N of dc bus.
The mid point 1 of first brachium pontis is as the lead-out terminal a of single-phase nine level converters of the present invention; The mid point 2 of second brachium pontis and the mid point 3 of the 3rd brachium pontis are connected respectively to two coupling inductance L 1And L 2Two terminals of non-common point; The common point terminal of coupling inductance is as the another one lead-out terminal b of single-phase nine level converters of the present invention.Two coupling inductances connect mode for suitable, and promptly the points of common connection of two coupling inductances is the end of the same name of a coupling inductance and the points of common connection of another one coupling inductance non-same polarity, that is the lead-out terminal b of single-phase nine level converters of the present invention.
Described IGBT can use MOSFET, GTO etc. and other full-control type power electronic switching devices to substitute.
In order to further specify the operation principle of single-phase nine level converters of the present invention, the at first effect of two coupling inductances in the analysis chart 1.Suppose that two coupling inductance numbers of turn are identical, be wound on jointly on the same iron core that both main self-inductions are M; Hypothesis leakage self-induction is very little simultaneously, promptly can ignore.The coupling coefficient of supposing two coupling inductances is 1, that is to say that the mutual inductance of two coupling inductances also equals M.With the intermediate connection point n point of two DC power supplys point as a reference, following dynamic electric voltage equation is arranged then:
Mdi 2/dt-Mdi 3/dt=u 2n-u bn (1)
Mdi 3/dt-Mdi 2/dt=u 3n-u bn (2)
Simultaneously, have according to Kirchhoff's law:
i 2+i 3+i b=0 (3)
Solve an equation (1)-(3) Shi Kede:
u bn=(u 2n+u 3n)/2 (4)
It is thus clear that the effect of coupling inductance is equivalent to two input voltages are connected.Therefore, the output voltage of single-phase nine level converters is:
u ab=u an-u bn=u an-(u 2n+u 3n)/2 (5)
Thus it is clear that, the output voltage of single-phase nine level converters and load current i bIrrelevant.Above-mentioned symbol implication in various is seen Fig. 1.
The on off state of four switching devices of each brachium pontis of diode-clamped three level three-phase bridge has three kinds, and the voltage of each brachium pontis sees that table 1 (supposes two DC power supply E under the different on off states 1And E 2Voltage be E).
The on off state of table 1 diode-clamped three each brachium pontis of level three-phase bridge and corresponding output voltage (wherein x representes brachium pontis number, and x can be 1,2 or 3, and ON representes that corresponding switching device is open-minded, and OFF representes that corresponding switching device turn-offs)
The on off state that each brachium pontis allows Output voltage u xn
S x1=ON，S x2=ON，S x3=OFF，S x4=OFF +E
S x1=OFF，S x2=ON，S x3=ON，S x4=OFF 0
S x1=OFF，S x2=OFF，S x3=ON，S x4=ON -E
Visible according to table 1, u An(be u 1n), u 2nAnd u 3nThe voltage of all exportable three level, promptly+E, 0 and-E.Simultaneously, can obtain u according to formula (5) AbThe voltage that can export is as shown in table 2.
The output voltage u of three brachium pontis of table 2 An, u 2n, u 3nU during various combination AbThe voltage that can export
Figure BDA00002007991000071
Visible by table 2 rightmost one row, u AbCan export the voltage of nine level, promptly+2E ,+3E/2 ,+E ,+E/2,0 ,-E/2 ,-E ,-3E/2 and-2E.Therefore, select the suitable modulating mode, can realize the output voltage u of single-phase nine level converters AbBe nine level.
Fig. 2 is the single-phase nine level converter output voltage u of the present invention AbThe simulation calculation oscillogram, Fig. 3 is load current i bThe simulation calculation oscillogram, Fig. 4 is u AbSpectrum analysis figure.Simulation parameter is: direct voltage is 2E=400V, and modulation system is a sinusoidal pulse width modulation, and carrier frequency is 2kHz; The reference voltage frequency is 50Hz, and modulation ratio is that the main self-induction of 0.9, two coupling inductance is 3mH; Load is a RL resistance sense series load, R=2 Ω wherein, L=2mH.Visible by these simulation calculation result, single-phase nine level converter output voltage u AbBe the pulse-width modulation waveform of nine level, and u AbSpectrum analysis show that even if in carrier frequency be under the situation of 2kHz, u AbTHD (total harmonic distortion: total percent harmonic distortion) also only have an appointment 17%.Therefore this nine level converter can significantly reduce the harmonic content in the output voltage when reducing the switching device switching frequency.Simultaneously, above-mentioned simulation calculation result also shows correctness of the present invention and feasibility.

Claims (8)

1. single-phase nine level converters, it is characterized in that: described single-phase nine level converters are made up of a diode-clamped three level three-phase bridge and two coupling inductances; The output of a brachium pontis of described three-phase bridge is as a terminal of described single-phase nine level voltage code converter outputs; The output of two other brachium pontis of three-phase bridge links to each other with two non-points of common connection of described two coupling inductances respectively, and the points of common connection of described two coupling inductances is as the another one terminal of described single-phase nine level voltage code converter outputs; Described two coupling inductances are along connecing in succession.
2. single-phase nine level converters as claimed in claim 1 is characterized in that: described diode-clamped three level three-phase bridge are made up of two DC power supplys, first brachium pontis, second brachium pontis and the 3rd brachium pontis; Described first brachium pontis, second brachium pontis and the 3rd brachium pontis are by 12 full-control type power electronic switching device (S 11-S 14, S 21-S 24, S 31-S 34) and 18 diode (D 11-D 14, D 21-D 24, D 31-D 34) constitute.
3. single-phase nine level converters as claimed in claim 2 is characterized in that: described two DC power supply (E 1, E 2) be connected in series the i.e. first DC power supply (E 1) the negative pole and the second DC power supply (E 2) positive pole be connected a bit, this tie point is designated as the mid point (n) of dc bus; First DC power supply (the E 1) positive pole be designated as the positive pole (P) of dc bus; Second DC power supply (the E 2) negative pole be designated as the positive pole (N) of dc bus.
4. single-phase nine level converters as claimed in claim 2 is characterized in that: described first brachium pontis is by four IGBT (S 11, S 12, S 13, S 14) and six diode (D 11, D 12, D 13, D 14, D 15, D 16) constitute; Four IGBT (S 11, S 12, S 13, S 14) series connection successively, i.e. an IGBT (S 11) emitter and the 2nd IGBT (S 12) collector electrode link together the 2nd IGBT (S 12) emitter and the 3rd IGBT (S 13) collector electrode link together, be designated as the mid point (1) of described first brachium pontis, the 3rd IGBT (S 13) emitter and the 4th IGBT (S 14) collector electrode link together; First diode (the D 11) and an IGBT (S 11) inverse parallel, the i.e. first diode (D 11) anode and an IGBT (S 11) emitter link together the first diode (D 11) a negative electrode and an IGBT (S 11) collector electrode link together; Second diode (the D 12) and the 2nd IGBT (S 12) inverse parallel, the i.e. second diode (D 12) anode and the 2nd IGBT (S 12) emitter link together the second diode (D 12Negative electrode and the 2nd IGBT (S 12) collector electrode link together; The 3rd diode (D 13) and the 3rd IGBT (S 13) inverse parallel, i.e. the 3rd diode (D 13) anode and the 3rd IGBT (S 13) emitter link together the 3rd diode (D 13) negative electrode and the 3rd IGBT (S 13) collector electrode link together; The 4th diode (D 14) and the 4th IGBT (S 14) inverse parallel, i.e. the 4th diode (D 14) anode and the 4th IGBT (S 14) emitter link together the 4th diode (D 14) negative electrode and the 4th IGBT (S 14) collector electrode link together; The 5th diode (D 15) anode and the 6th diode (D 16) negative electrode connect the mid point (n) all be connected to dc bus; The 5th diode (D 15) negative electrode be connected to an IGBT (S 11) emitter and the 2nd IGBT (S 12) collector electrode; The 6th diode (D 16) anode be connected to the 3rd IGBT (S 13) emitter and the 4th IGBT (S 14) collector electrode; The one IGBT (S 11) collector electrode be connected to the positive pole (P) of dc bus; The 4th IGBT (S 14) emitter be connected to the negative pole (N) of dc bus.
5. single-phase nine level converters as claimed in claim 2 is characterized in that: described second brachium pontis is by four IGBT (S 21, S 22, S 23, S 24) and six diode (D 21, D 22, D 23, D 24, D 25, D 26) constitute; The 5th IGBT (S 21), the 6th IGBT (S 22), the 7th IGBT (S 23), the 8th IGBT (S 24) series connection successively, i.e. the 5th IGBT (S 21) emitter and the 6th IGBT (S 22) collector electrode link together the 6th IGBT (S 22) emitter and the 7th IGBT (S 23) collector electrode link together, be designated as the mid point of described second brachium pontis), the 7th IGBT (S 23) emitter and the 8th IGBT (S 24) collector electrode link together; The 7th diode (D 21) and the 5th IGBT (S 21) inverse parallel, i.e. the 7th diode (D 21) anode and the 5th IGBT (S 21) emitter link together the 7th diode (D 21) negative electrode and the 5th IGBT the 5th IGBT (S 21) collector electrode link together; The 8th diode (D 22) and the 6th IGBT (S 22) inverse parallel, i.e. the 8th diode (D 22) anode and the 6th IGBT (S 22) emitter link together the 8th diode (D 22) negative electrode and the 6th IGBT (S 22) collector electrode link together; The 9th diode (D 23) and the 7th IGBT (S 23) inverse parallel, i.e. the 9th diode (D 23) anode and the 7th IGBT (S 23) emitter link together the 9th diode (D 23) negative electrode and the 7th IGBT (S 23) collector electrode link together; The tenth utmost point pipe (D 24) and the 8th IGBT (S 24) inverse parallel, i.e. the tenth utmost point pipe (D 24) anode and the 8th IGBT (S 24) emitter link together the tenth utmost point pipe (D 24) negative electrode and the 8th IGBT (S 24) collector electrode link together; The 11 diode (D 25) anode and the 12 diode (D 26) negative electrode connect the mid point (n) all be connected to dc bus; The 11 diode (D 25) negative electrode be connected to the 5th IGBT (S 21) emitter and the 6th IGBT (S 22) collector electrode; The 12 diode (D 26) anode be connected to the 7th IGBT (S 23) emitter and the 8th IGBT (S 24) collector electrode; The 5th IGBT (S 21) collector electrode be connected to the positive pole (P) of dc bus; The 8th IGBT (S 24) emitter be connected to the negative pole (N) of dc bus.
6. single-phase nine level converters as claimed in claim 2 is characterized in that: described the 3rd brachium pontis is by four IGBT (S 31, S 32, S 33, S 34) and six diode (D 31, D 32, D 33, D 34, D 35, D 36) constitute; The 9th IGBT (S 31), the tenth IGBT (S 32), the 11 IGBT (S 33), the 12 IGBT (S 34) series connection successively, i.e. the 9th IGBT (S 31) emitter and the tenth IGBT (S 32) collector electrode link together the tenth IGBT (S 32) emitter and the 11 IGBT (S 33) collector electrode link together, be designated as the mid point (3) of described the 3rd brachium pontis, the 11 IGBT (S 33) emitter and the 12 IGBT (S 34) collector electrode link together; The 13 diode (D 31) and the 9th IGBT (S 31) inverse parallel, i.e. the 13 diode (D 31) anode and the 9th IGBT (S 31) emitter link together the 13 diode (D 31) negative electrode and the 9th IGBT (S 31) collector electrode link together; The 14 diode (D 32) and the tenth IGBT (S 32) inverse parallel, i.e. the 14 diode (D 32) anode and the tenth IGBT (S 32) emitter link together the 14 diode (D 32) negative electrode and the tenth IGBT (S 32) collector electrode link together; The 15 diode (D 33) and the 11 IGBT (S 33) inverse parallel, i.e. the 15 diode (D 33) anode and the 11 IGBT (S 33) emitter link together the 15 diode (D 33) negative electrode and the 11 IGBT (S 33) collector electrode link together; The 16 diode (D 34) and the 12 IGBT (S 34) inverse parallel, i.e. the 16 diode (D 34) anode and the 12 IGBT (S 34) emitter link together the 16 diode (D 34) negative electrode and the 12 IGBT (S 34) collector electrode link together; The 17 diode (D 35) anode and the 18 diode (D 36) negative electrode connect the mid point (n) all be connected to dc bus; The 17 diode (D 35) negative electrode be connected to the 9th IGBT (S 31) emitter and the tenth IGBT (S 32) collector electrode; The 18 diode (D 36) anode be connected to the 11 IGBT (S 33) emitter and the 12 IGBT (S 34) collector electrode; The 11 IGBT (S 31) collector electrode be connected to the positive pole (P) of dc bus; The 12 IGBT (S 34) emitter be connected to the negative pole (N) of dc bus.
7. single-phase nine level converters as claimed in claim 1 is characterized in that: two coupling inductances are along connecing, and promptly the points of common connection of two coupling inductances is the end of the same name of a coupling inductance and the points of common connection of another one coupling inductance non-same polarity.
8. single-phase nine level converters as claimed in claim 1 is characterized in that the dc voltage stress of described each power electronic power device is all identical.
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CN104052324A (en) * 2014-06-24 2014-09-17 西安理工大学 Dual-frequency induction heating power supply and control method of inverter circuit of dual-frequency induction heating power supply
CN105356776A (en) * 2015-11-30 2016-02-24 华南理工大学 Single power supply nine electric level high frequency inverter
CN109905045A (en) * 2018-10-15 2019-06-18 西华大学 A kind of quasi- four level converters topological structure and its SVPWM algorithm
CN110912433A (en) * 2019-11-27 2020-03-24 湖北工业大学 Nine-level inverter using inductor for voltage sharing

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CN103346690A (en) * 2013-07-05 2013-10-09 华为技术有限公司 Multi-level inverter and power supply system
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Application publication date: 20121128