CN104049455B - Extreme ultraviolet(EUV)Photomask and its manufacture method - Google Patents

Extreme ultraviolet(EUV)Photomask and its manufacture method Download PDF

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Publication number
CN104049455B
CN104049455B CN201310499322.0A CN201310499322A CN104049455B CN 104049455 B CN104049455 B CN 104049455B CN 201310499322 A CN201310499322 A CN 201310499322A CN 104049455 B CN104049455 B CN 104049455B
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Prior art keywords
layer
extreme ultraviolet
coating
reflecting layer
absorber
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CN104049455A (en
Inventor
黄道旻
石志聪
陈嘉仁
李信昌
严涛南
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Priority claimed from US13/950,020 external-priority patent/US9310675B2/en
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/22Masks or mask blanks for imaging by radiation of 100nm or shorter wavelength, e.g. X-ray masks, extreme ultraviolet [EUV] masks; Preparation thereof
    • G03F1/24Reflection masks; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/48Protective coatings
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/54Absorbers, e.g. of opaque materials
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/80Etching

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

The invention provides EUV photomasks and the embodiment of the method for forming EUV photomasks.This method includes:Substrate, reflecting layer, coating, hard mask layer are provided, and form opening wherein.Then, the top face in the opening with hard mask layer fills absorbed layer.Flatening process is provided to remove the absorbed layer for the top face for being located at hard mask layer and form absorber in the opening, wherein, the width at the top of absorber is more than the width of its bottom.

Description

Extreme ultraviolet(EUV)Photomask and its manufacture method
The cross reference of related application
This application claims in the U.S. Provisional Patent Application submitted the 61/788,014th, entitled on March 15th, 2013 " Lithography Mask and Methods of Forming and Using the same " priority, in its whole Appearance is hereby expressly incorporated by reference.
Technical field
Present invention relates in general to the field of photomasks being used for producing the semiconductor devices, more particularly, to extreme ultraviolet Light(EUV)Photomask and its manufacture method.
Background technology
In integrated circuit(IC)Or in the manufacturing process of chip, in a series of reusable photomasks(Herein Referred to as mask)On produce the patterns of the different layers for representing chip to transfer the design of each chip layer during manufacturing process Onto Semiconductor substrate.Very similar with photographic negative, mask is used to every layer of circuit pattern being transferred to Semiconductor substrate. It is changed into tiny crystals pipe and electricity including each complete chip using these layers of a series of process combination, and by these layers Road.Therefore, any defect in mask can be all transferred on chip, so as to bring harmful effect to its performance.Especially The defects of serious, can cause mask to no avail.Generally, one group of 15-30 mask is used to form a chip and can repeatedly made With.
Mask generally includes to be provided with the transparent substrates of opaque light absorbing layer.Traditional masks are typically included in it Simultaneously upper glass or quartz substrate with layers of chrome.Layers of chrome is covered by ARC and photosensitive photoresist.In Patternized technique Period, for example, by the way that part photoresist is exposed into electron beam or ultraviolet light, so that expose portion is dissolved in developing solution, So as to which circuit design is written into mask.Then, the soluble fraction of photoresist is removed, to allow to etch(That is, remove)Expose Following layers of chrome and anti-reflecting layer.
With critical dimension(CD)Diminution, existing optical lithography is to 28 nanometers(nm)The technology limit of technology node Make close.It is expected Next Generation Lithographies(NGL)Existing optical lithography method can be replaced, for example, below 22nm technology node.Deposit In several NGL alternative approach, such as extreme ultraviolet(EUV)Carve(EUVL), projection electron lithography(EPL), ion projection's photoetching (IPL), nano impression and X-ray photoetching.Certainly, because EUVL has most of characteristic of optical lithography, therefore EUVL is most Possible successor, compared with other NGL methods, EUVL is a kind of more ripe technology.
But the manufacture of EUV mask is still faced with the technological challenge urgently overcome.For example, make in the chrome mask of routine Any unwanted dust on mask is prevented to be transferred on chip with film.However, film can not make together with EUV mask With because the film can absorb EUV light.Therefore, it is necessary to clean the table of EUV mask in the case of there is no film thereon Face.In addition, it is still necessary to monitor the dust on the surface of EUV mask.Therefore, it is necessary to improve EUV mask and manufacture method.
The content of the invention
According to an aspect of the invention, there is provided a kind of method for manufacturing extreme ultraviolet photomask, including:There is provided successively Include the mask of substrate, reflecting layer and coating;Formed with the Part I being positioned in layer and positioned at reflecting layer extremely The opening of Part II in a few part, the width of Part I are more than the width of Part II;In the opening and coating Top face formed absorbed layer;And remove at least a portion of absorbed layer and retain another part of absorbed layer, to be formed Absorber.
Preferably, this method also includes:It is square into hard mask layer on the cover layer.
Preferably, hard mask layer is ruthenium(Ru), RuSi or combinations thereof.
Preferably, this method also includes:Formed before opening at least a portion in coating and reflecting layer, covered firmly Opening is formed in mold layer.
Preferably, this method also includes:Using fluorine base gas, opening is formed in hard mask layer.
Preferably, this method also includes:Hard mask layer is removed after absorber is formed.
Preferably, the ratio of the width of the width of Part I and Part II is in the range of about 1 to about 2.
Preferably, implemented by using the dry etching process of chlorine-based gas at least a portion in coating and reflecting layer The step of forming opening.
Preferably, coating is silicon(Si).
Preferably, absorbed layer is TaSi, TaBN, TaN, TaSiON, TaBO or TaON.
Preferably, reflecting layer is to contain molybdenum and silicon(Mo/Si)Layer.
Preferably, reflecting layer includes alternating Mo and the Si layer between about 40 pairs and about 50.
Preferably, opening extends in reflecting layer about 50nm to about 300nm depth.
Preferably, removal step includes CMP and/or dry etching process.
Preferably, this method also includes:Implement plasma etch process after the cmp process.
According to another aspect of the invention, there is provided a kind of extreme ultraviolet photomask, including:Reflecting layer, on substrate Side;Coating, above reflecting layer;And absorber, it is positioned in layer and reflecting layer, absorber is positioned in layer Partial width is more than the width for the part that absorber is located in reflecting layer.
Preferably, the thickness of absorber is in the range of about 50nm to about 300nm.
Preferably, reflecting layer is to contain molybdenum and silicon(Mo/Si)Layer.
Preferably, the top surface of absorber is higher than the top surface of coating.
According to another aspect of the invention, there is provided a kind of method for forming integrated circuit, including:Pass through following steps shape Into photomask:Reflecting layer is formed above substrate, coating is formed above reflecting layer and is formed in coating and reflecting layer Absorber, the width that absorber is positioned over the part in layer are more than the width that absorber is located at part in reflecting layer;Serving as a contrast Forming layer on bottom;And carry out patterned layer using photomask in lithography step.
Brief description of the drawings
When reading in conjunction with the accompanying drawings, the present invention may be better understood according to the following detailed description.It should be emphasized that , the standard practices in industry, various parts are not drawn to scale and are intended solely for illustrative purposes.It is actual On, for the sake of clear discussion, it can arbitrarily increase or decrease the size of various parts.
Fig. 1 is the schematic sectional view for showing exemplary EUV mask;
Fig. 2 to Fig. 8 is different cross section figure of the EUV mask in the embodiment of each fabrication stage;
Fig. 9 is the flow chart according to the method for the manufacture EUV mask of various aspects of the present invention;And
Figure 10 is the flow according to the method that IC-components are manufactured by using EUV mask of various aspects of the present invention Figure.
Embodiment
The following disclosure provides a variety of different embodiments or example, for realizing the different characteristic of the present invention.It will retouch below The instantiation for stating part and arrangement is of the invention to simplify.Certainly, these are only example and are not intended to the limitation present invention.Separately Outside, the present invention can in different instances repeat reference numerals and/or character.It is this to be recycled and reused for simplified and clear purpose, And the relation between the multiple embodiments discussed and/or configuration itself is not indicated that.Also, in the following description, one Part is formed on another part, formation is connected to, and/or it is direct to include both parts coupled to another part The embodiment formed is contacted, can also include, which can form miscellaneous part between these two parts, make it that both parts are not straight The embodiment of contact.In addition, using such as " following ", " above ", " horizontal ", " vertically ", " in ... top ", " in ... lower section ", " ... on ", " ... under ", the relative space position term of " top " and " bottom " etc. and its derivation Word(For example, " flatly ", " down ", " up " etc.), to be easily described the relation of a part and another part.It is empty Between relative positional terms be expected to cover the different azimuth of the device including part.
Fig. 1 is the schematic sectional view for showing EUV photomasks 100.In certain embodiments, EUV photomasks 100 include lining Bottom 110, the reflecting layer 112 on substrate 110, the coating 114 on reflecting layer 112 and penetrate coating 114 and Absorber 122 at least one of opening in reflecting layer 112.In certain embodiments, the top surface of absorber 122 is higher than and covered The top surface of cap rock 114.For example, absorber 122 includes the top wider than bottom.In certain embodiments, absorber 122 is T-shaped. In certain embodiments, absorber 122 has the wide portion for being positioned over the top of layer 114 and the narrow portion being positioned in layer 114.
Substrate 110 can have any size for being suitable as photomask.In one embodiment, substrate 110 is rectangle, its The length of side is in the range of about 5 inches to about 9 inches.In another embodiment, the thickness of substrate 110 is between about In the range of 0.15 inch to about 0.25 inch.In other embodiments, the thickness of substrate 110 is about 0.25 inch.At some In embodiment, substrate 110 has low thermal coefficient of expansion(Preferably 0 ± 0.05 × 10-7/ DEG C, at especially preferably 20 DEG C 0 ± 0.03×10-7/℃), and after patterning, to for cleaning mask bottom plate(mask blank)Or the cleaning of photomask Liquid should have good smoothness, flatness and durability.Substrate 110 generally includes the silicon substrate with low thermal coefficient of expansion Material, it is such as quartzy(That is, silica SiO2)Deng.
Reflecting layer 112 can realize the high reflectance to EUV light.For example, when the surface in reflecting layer 112 by wavelength is about During 13.5nm EUV light irradiations, the reflectivity in reflecting layer 112 is up to 40%.In the present embodiment, multiple alternatively laminated will be passed through High refractive index layer and low-index layer and the laminated reflective film that is formed is used as reflecting layer 112.In certain embodiments, Mo is used for low Index layer and Si is used for high refractive index layer, to form the laminated reflective film in reflecting layer 112.That is, Mo/Si laminated reflective films are formed For forming reflecting layer 112.In one embodiment, reflecting layer 112 may include the friendship between about 40 pairs to about 50 pairs For Mo and Si layers.Each pair Mo and Si layer may include the Mo layers that thickness is about 3nm and the Si layers that thickness is about 4nm.
In an alternative embodiment, laminated reflective film be Ru/Si laminated reflective films, Mo/Be laminated reflective films, Mo compounds/ Si compounds laminated reflective film, Si/Mo/Ru laminated reflective films, Si/Mo/Ru/Mo laminated reflective films or Si/Ru/Mo/Ru multilayers Reflectance coating.
Coating 114 be used as reflecting layer 112 and for formed hard mask layer present in the middle process of photomask it Between coating and/or cushion.In certain embodiments, coating 114 is silicon(Si)Layer, ruthenium(Ru)Layer or layer containing Ru.Example Such as, the thickness of coating 114 is in the range of about 1nm to about 10nm.
For example, absorber 122 includes being positioned over the top of the top of layer 114 and in reflecting layer 112 and coating 114 Bottom.The top of absorber 122 has width W1 and thickness T1.The bottom of absorber 122 has width W2 and thickness T2. In some embodiments, absorber 122 is T-shaped, and its width W1 is more than width W2.In the present embodiment, width W1 and width W2 ratio is in the range of about 1 and about 2.In certain embodiments, thickness T1 is less than thickness T2.In the present embodiment, it is thick T1 is spent in the range of about 0nm to about 10nm.In one embodiment, thickness T2 is at least above 20nm, to prevent in wafer Light leak or poor contrast in photo-etching technological process(poor contrast).In an alternative embodiment, thickness T2 is not more than About 150nm, close on amendment for forming the optics of mask to prevent from being difficult to carry out(OPC).In another embodiment, thickness T2 It is identical with the gross thickness in reflecting layer 112.In other embodiments, thickness T2 and reflecting layer 112 and the gross thickness phase of coating 114 Together.In the present embodiment, thickness T2 is in the range of about 20nm to about 150nm.
Absorber 122 is opaque light shield layer.In one embodiment, absorber 122 includes being substantially free of oxygen Tantalum-based materials, such as silication tantalum-based materials(Hereinafter referred to as TaSi), tantalum boron nitride sill(Hereinafter referred to as TaBN)And nitrogen Change tantalum-based materials(Hereinafter referred to as TaN).In another embodiment, absorber 122 includes tantalum base and epoxide material, such as oxygen Change and tantalum nitride and silica-base material(Hereinafter referred to as TaSiON), tantalum oxide Boron Based Materials(Hereinafter referred to as TaBO)With oxidation and Nitrogenize tantalum-based materials(Hereinafter referred to as TaON).
Fig. 2 to Fig. 8 is the schematic sectional view for showing the exemplary process flow for forming EUV photomasks.With identical Reference number increase by 100 represent and content identical Fig. 2 shown in Fig. 1 to the content shown in Fig. 8.Referring to figs. 2 to Fig. 8 and Fig. 9, EUV photomasks 200 and method 300 will be described below jointly.
Referring to figs. 2 to Fig. 9, method 300 starts from step 302, and reflecting layer 212 is formed above substrate 210.In some realities Apply in example, coating 214 is formed above reflecting layer 212.In certain embodiments, hard mask is formed above coating 214 Layer 216.In certain embodiments, substrate 210 is rectangular substrate, and the length of its side is between about 5 inches to about 9 inches of scope It is interior, and the thickness of substrate 210 is in the range of about 0.15 inch to 0.25 inch.In certain embodiments, substrate 210 has Low thermal coefficient of expansion(Preferably 0 ± 0.05 × 10-7/ DEG C, 0 ± 0.03 × 10 at especially preferably 20 DEG C-7/℃), and Formed pattern after, to for clean mask bottom plate or photomask cleaning fluid should have good smoothness, flatness and Durability.Substrate 210 generally includes the silica-base material with low thermal coefficient of expansion, such as quartzy(That is, silica SiO2)Deng.
Reflecting layer 212 can realize the high reflectance to EUV light.For example, when the surface in reflecting layer 212 by wavelength is about During 13.5nm EUV light irradiations, the reflectivity in reflecting layer 212 is up to 40%.In certain embodiments, reflecting layer 212 is more materials Layer.In certain embodiments, laminated reflective film is formed by multiple alternatively laminated high refractive index layer and low-index layer.At this In embodiment, Mo is used for low-index layer and Si is used for high refractive index layer, to form the laminated reflective film in reflecting layer 212.That is, shape Into Mo/Si laminated reflective films for formation reflecting layer 212.In one embodiment, reflecting layer 212 may include about 40 pairs to about Alternating Mo and Si layer between 50 pairs.Each pair Mo and Si layer may each comprise the Mo layers that thickness is about 3nm and the Si that thickness is about 4nm Layer.
In an alternative embodiment, laminated reflective film be Ru/Si laminated reflective films, Mo/Be laminated reflective films, Mo compounds/ Si compounds laminated reflective film, Si/Mo/Ru laminated reflective films, Si/Mo/Ru/Mo laminated reflective films or Si/Ru/Mo/Ru multilayers Reflectance coating.In certain embodiments, depositing operation is passed through(Including chemical vapor deposition(CVD), PVD(PVD), it is former Sublayer deposits(ALD), and/or other suitable techniques)Form reflecting layer 212.
Coating 214 can be used as the coating and/or cushion between reflecting layer 212 and hard mask layer 216.In this implementation In example, coating 214 is silicon(Si)Layer, ruthenium(Ru)Layer or layer containing Ru.In certain embodiments, the thickness of coating 214 between In the range of about 1nm to about 10nm.In an alternative embodiment, the thickness of coating 214 is about 2.5nm.In certain embodiments, Pass through depositing operation(Including CVD, PVD, ALD, and/or other suitable techniques)Form coating 214.
In certain embodiments, hard mask layer 216 includes ruthenium(Ru), RuSi or combinations thereof.In one embodiment, The thickness of hard mask layer 216 is in the range of about 2nm to about 15nm.In another embodiment, the thickness of hard mask layer 216 It is about 5nm.In certain embodiments, hard mask layer 216 is formed by CVD, PVD, ALD and/or other suitable techniques.
With reference to figure 3 to Fig. 5 and Fig. 9, method 300 continues step 304, and Patternized technique is carried out to reflecting layer 212, with Opening 220 is formed wherein.In the present embodiment, opening 220 is in hard mask layer 216, coating 214 and reflecting layer 212 (With reference to figure 5).Patternized technique may include the formation photoetching glue component 218 above hard mask layer 216, then remove hard mask layer The part of the covering of glue component 218 is not photo-etched in 216.
In certain embodiments, forming the technique of photoetching glue component 218 includes passing through suitable technique(Such as spin coating) The top of hard mask layer 216 forms photoresist layer(It is not shown), then, photoresist layer is exposed and is developed to by The photoetching glue component 218 separated away from S(With reference to figure 3).Photoetching glue component 218 partly exposes underlying hardmask layer 216.This Outside, optionally ARC is formed between hard mask layer 216 and photoresist layer(ARC)(It is not shown), to improve figure Case chemical industry skill.
With reference to figure 4, implement to remove technique to remove the part for not being photo-etched glue component 218 in hard mask layer 216 and covering, from And the pattern of photoetching glue component 218 is transferred to the hard mask layer 216 of lower floor.In certain embodiments, removing technique includes making Use halogen based gases(Such as Cl2、CHF3、CH3F、C4F8、CF4、SF6、CF3Cl or their mixture)The etch process of progress, To remove the unmasked portion of hard mask layer 216.Then, etch process stops at lower floor's coating 214 and exposes coating 214 A part.
With reference to figure 5, then by single or multiple removal art pattern CAD coatings 214 and the parts in reflecting layer 212, To form opening 220.Opening 220 is with width W2 and interior with width in patterned blanket layer 214 in pattern reflecting layer 212 Spend W1.In certain embodiments, width W1 is more than width W2.In the present embodiment, width W1 and width W2 ratio are between about 1 To in the range of about 2.
In the present embodiment, opening 220 is formed by single dry etching process.During dry etching process, in coating Produce etching selectivity between 214 and reflecting layer 212, such as be more than the erosion to reflecting layer 212 to the etch-rate of coating 214 Etching speed.Therefore, opening 220 is formed by dry etching process, wherein width W1 is more than width W2.In certain embodiments, make Use chlorine-based gas(For example, Cl2Or CCl4)Implement etch process, to remove the hard mask layer not being patterned in coating 214 The part of 216 coverings, so as to expose the part in lower floor reflecting layer 212.In one embodiment, during etch process, go After coverage mask layer 214, continue to remove at least a portion in lower floor reflecting layer.In another embodiment, by with The different single etch process of two etch process removes at least a portion in lower floor reflecting layer 212.In certain embodiments, lead to Cross and use Cl2、F2Or their mixture removes reflecting layer 212.In one embodiment, reflecting layer 212 is partially removed to About 50nm is to the thickness between about 300nm.In another embodiment, reflecting layer 212 is fully removed and stops at substrate On 210 surface.
After the etch process of hard mask layer 216, the etching work in after the etch process of coating 214 or reflecting layer 212 After skill, photoetching glue component 218 can remove.In certain embodiments, peeled off by implementing known wet method of the prior art And/or plasma ashing removes photoetching glue component 218.For example, it can implement Oxygen plasma ashing to remove photoresist part 218.
With reference to figure 6 and Fig. 9, method 300 continues step 306, wherein, absorbed layer 222 is filled in opening 220, is anti- Penetrate the top of the top surface of the top of layer 212 and hard mask layer 216.Absorbed layer 222 is opaque light shield layer, and its thickness between In the range of about 20nm to about 500nm.In one embodiment, absorbed layer 222 includes the tantalum-based materials for being substantially free of oxygen, such as Silication tantalum-based materials(Hereinafter referred to as TaSi), tantalum boron nitride sill(Hereinafter referred to as TaBN)With nitridation tantalum-based materials(With It is referred to as TaN down).In another embodiment, absorbed layer 222 includes tantalum base and epoxide material, such as oxidation and tantalum nitride and Silica-base material(Hereinafter referred to as TaSiON), boron oxide tantalum-based materials(Hereinafter referred to as TaBO)And oxidation and tantalum nitride base material Material(Hereinafter referred to as TaON).PVD can be used(Such as sputter and evaporate), plating, CVD(Such as plasma enhanced CVD (PECVD), atmospheric pressure cvd(APCVD), low pressure chemical vapor deposition(LPCVD), high-density plasma CVD(HDPCVD), atomic layer CVD (ALCVD)), other suitable depositing operations, and/or combinations thereof carry out deposit absorbent layer 222.
With reference to figure 7 and Fig. 8, method 300 continues step 308, wherein, absorbed layer 222 is implemented to remove technique.Remove Positioned at the part of opening 220 and the top of hard mask layer 216 in absorbed layer 222, to form absorber 222 ' in opening 220. In some embodiments, the top surface copline of the top surface of absorber 222 ' substantially with hard mask layer 216.In an alternative embodiment, The top surface of absorber 222 ' is substantially less than the top surface of hard mask layer 216, but is above the bottom surface of hard mask layer 216.At one In embodiment, the chemically mechanical polishing that technique may include to use fluorine-based lapping liquid is removed(CMP)Technique.In another embodiment In, removing technique may include to use CF4、Cl2Or the dry etching process of combinations thereof.In other embodiments, pass through first CMP is removed technique, to remove a part for absorbed layer 222 and retain in absorbed layer 222 positioned at opening 220 and hard A part for the top of mask layer 216.Then, there is provided dry etching process, to remove the extra absorbed layer 222 in the top of opening 220, with Form absorber 222 '.During CMP or dry etching process, hard mask layer 216 can be used as stop-layer, to stop what is carrying out thereon CMP or dry etching process.
With reference to figure 8, formed after absorber 222 ', remove hard mask layer 216.In certain embodiments, technique bag is removed Include dry etching process.For example, use halogen radical etching gas(Including gas containing F(For example, CF4、SF6、CHF3), gas containing Cl (For example, Cl2、CCl4)Or gas containing Br(For example, HBr, Br2))Carry out dry etching process.During etch process, it can lose Carve the diluent gas that such as He or Ar are added in gas.In an alternative embodiment, it is wet etching process or CMP to remove technique.
With reference to figure 10, the flow chart of the method 400 explained below that IC-components are manufactured by using EUV mask. Method 400 starts from step 402, there is provided has the Semiconductor substrate of material layer.Method 400 continues step 404, with material Photoresist layer is formed above the bed of material.Then, method 400 continues step 406, with by using described in above-mentioned photoetching process EUV mask pattern photoresist layer.Method 400 continues step 408, to be used as by the photoresist layer that will be patterned into Etching mask carrys out patterned material layer.
It is worth noting that, it is easily washable the EUV mask with flat surfaces.In addition, it is easy to flat table The EUV mask in face carries out dust monitoring technique.In addition, optical property can be improved by T-shaped absorber(Such as contrast), and very It is easily controlled the etch process of manufacture T-shaped absorber.
It is worth noting that, the IC-components handled by using EUV mask can prevent from not expecting on mask Dust be transferred on chip.
It is worth noting that, the method described above in association with Fig. 2 to Fig. 8 is exemplary only.Ordinary skill people Member can change the flow of this method to obtain desired EUV photomasks.For example, the removal for removing portions of absorber layer 222 Technique can form absorber 222 ', and its top surface is slightly below or the top surface higher than hard mask layer 216.
In another other embodiment, during technique is removed, hard mask layer 216 is can remove, so that absorber 222 ' top surface can be substantially substantially flush with the top surface of coating 214.
In one embodiment, manufacturing the method for extreme ultraviolet mask includes:Mask is provided, the mask includes lining successively Bottom, reflecting layer and coating;Formed with second be positioned at least a portion in the Part I in layer and reflecting layer Partial opening, wherein, the width of Part I is more than the width of Part II;In the opening with the top face shape of coating Into absorbed layer;And at least a portion of absorbed layer is removed, and retain another part of absorbed layer, so as to form absorber.
In other embodiments, a kind of extreme ultraviolet mask includes:Reflecting layer above substrate, on reflecting layer The coating of side and the absorber being positioned in layer and reflecting layer.The width for being located at the part in coating in absorber is big The width of part in absorber in reflecting layer.
In yet another embodiment, a kind of method for forming integrated circuit includes:By above substrate formed reflecting layer, Coating is formed above reflecting layer and absorber is formed in coating and reflecting layer to form photomask;The shape on substrate Stratification;And pattern the layer using photomask in lithography step.It is located at the width of the part in coating in absorber More than the width for the absorber being located in absorber in reflecting layer.
The feature of some embodiments is discussed above so that the present invention may be better understood in those of ordinary skill in the art Various aspects.It will be understood by those skilled in the art that they easily can set using based on the present invention Other are counted or change to be used to reach purpose identical with embodiments described herein and/or realize the technique and knot of same advantage Structure.Those of ordinary skill in the art it should also be appreciated that this equivalent constructions without departing from the spirit and scope of the present invention, and Without departing from the spirit and scope of the present invention, a variety of changes can be made to the present invention, replaces and changes.

Claims (20)

1. a kind of method for manufacturing extreme ultraviolet photomask, including:
There is provided includes the mask of substrate, reflecting layer and coating successively;
Form second with the Part I being located in the coating and at least a portion in the reflecting layer The opening divided, the width of the Part I are more than the width of the Part II;
The top face with the coating forms absorbed layer in said opening;And
Remove at least a portion of the absorbed layer and retain another part of the absorbed layer, to form absorber.
2. the method for manufacture extreme ultraviolet photomask according to claim 1, in addition to:Formed above the coating Hard mask layer.
3. it is according to claim 2 manufacture extreme ultraviolet photomask method, wherein, the hard mask layer be ruthenium (Ru), RuSi or combinations thereof.
4. the method for manufacture extreme ultraviolet photomask according to claim 2, in addition to:In the coating and described anti- Penetrate at least a portion of layer before forming the opening, opening is formed in the hard mask layer.
5. the method for manufacture extreme ultraviolet photomask according to claim 2, in addition to:Using fluorine base gas, described Opening is formed in hard mask layer.
6. the method for manufacture extreme ultraviolet photomask according to claim 2, in addition to:After the absorber is formed Remove the hard mask layer.
7. the method for manufacture extreme ultraviolet photomask according to claim 1, wherein, the width of the Part I and institute The ratio of the width of Part II is stated in the range of 1 to 2.
8. the method for manufacture extreme ultraviolet photomask according to claim 1, wherein, by using the dry corrosion of chlorine-based gas The step of carving technology is implemented to form opening at least a portion in the coating and the reflecting layer.
9. the method for manufacture extreme ultraviolet photomask according to claim 1, wherein, the coating is silicon (Si).
10. it is according to claim 1 manufacture extreme ultraviolet photomask method, wherein, the absorbed layer be TaSi, TaBN, TaN, TaSiON, TaBO or TaON.
11. the method for manufacture extreme ultraviolet photomask according to claim 1, wherein, the reflecting layer is to contain molybdenum and silicon (Mo/Si) layer.
12. it is according to claim 1 manufacture extreme ultraviolet photomask method, wherein, the reflecting layer include 40 pairs and Alternating Mo and Si layer between 50 pairs.
13. the method for manufacture extreme ultraviolet photomask according to claim 1, wherein, the opening extends to described anti- Penetrate the depth of 50nm to 300nm in layer.
14. the method for manufacture extreme ultraviolet photomask according to claim 1, wherein, the removal step includes CMP works Skill and/or dry etching process.
15. the method for manufacture extreme ultraviolet photomask according to claim 14, in addition to:After the CMP Implement plasma etch process.
16. a kind of extreme ultraviolet photomask, including:
Reflecting layer, above substrate;
Coating, above the reflecting layer;And
Absorber, in the coating and the reflecting layer, the absorber is located at the width of the part in the coating Degree is more than the width for the part that the absorber is located in the reflecting layer.
17. extreme ultraviolet photomask according to claim 16, wherein, the thickness of the absorber between 50nm extremely In the range of 300nm.
18. extreme ultraviolet photomask according to claim 16, wherein, the reflecting layer is to contain molybdenum and silicon (Mo/Si) layer.
19. extreme ultraviolet photomask according to claim 16, wherein, the top surface of the absorber is higher than the coating Top surface.
20. a kind of method for forming integrated circuit, including:
Photomask is formed by following steps:
Reflecting layer is formed above substrate;
Coating is formed above the reflecting layer;With
Absorber is formed in the coating and the reflecting layer, the absorber is located at the width of the part in the coating Degree is more than the width for the part that the absorber is located in the reflecting layer;
The forming layer on substrate;And
The layer is patterned using the photomask in lithography step.
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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104298068A (en) * 2014-09-26 2015-01-21 中国科学院长春光学精密机械与物理研究所 Extreme-ultraviolet photoetching mask structure for large-value pore diameter
CN105446071A (en) * 2015-12-21 2016-03-30 中国科学院长春光学精密机械与物理研究所 Mask structure for high NA ultraviolet photolithography objective lens
US20180299765A1 (en) * 2017-04-12 2018-10-18 Globalfoundries Inc. Extreme ultraviolet lithography (euvl) reflective mask
EP3454120B1 (en) * 2017-09-09 2024-05-01 IMEC vzw Method for manufacturing euv reticles and reticles for euv lithography
CN110797257A (en) * 2019-11-15 2020-02-14 上海集成电路研发中心有限公司 Graph transmission method
CN112612177B (en) * 2020-12-16 2024-01-23 上海华力微电子有限公司 Mask, preparation method thereof and photoetching machine

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1516827A (en) * 2001-08-24 2004-07-28 ض� Damascene extreme ultraviolet lithography alternative phase shift photomask and method of making
CN1695093A (en) * 2001-07-31 2005-11-09 英特尔公司 Damascene extreme ultraviolet lithography (euvl) photomask and method of making
CN102947759A (en) * 2010-06-15 2013-02-27 卡尔蔡司Smt有限责任公司 Mask for EUV lithography, EUV lithography system and method for optimising the imaging of a mask

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8764995B2 (en) 2010-08-17 2014-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Extreme ultraviolet light (EUV) photomasks, and fabrication methods thereof
JP5648558B2 (en) * 2011-03-30 2015-01-07 凸版印刷株式会社 Reflective mask blank and method of manufacturing reflective mask blank

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1695093A (en) * 2001-07-31 2005-11-09 英特尔公司 Damascene extreme ultraviolet lithography (euvl) photomask and method of making
CN1516827A (en) * 2001-08-24 2004-07-28 ض� Damascene extreme ultraviolet lithography alternative phase shift photomask and method of making
CN102947759A (en) * 2010-06-15 2013-02-27 卡尔蔡司Smt有限责任公司 Mask for EUV lithography, EUV lithography system and method for optimising the imaging of a mask

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