CN104022748B - Differential input circuit and method for obtaining differential input circuit - Google Patents
Differential input circuit and method for obtaining differential input circuit Download PDFInfo
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- CN104022748B CN104022748B CN201410199599.6A CN201410199599A CN104022748B CN 104022748 B CN104022748 B CN 104022748B CN 201410199599 A CN201410199599 A CN 201410199599A CN 104022748 B CN104022748 B CN 104022748B
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Abstract
The invention discloses a differential input circuit. According to the differential input circuit, a first current-limiting resistor and a third current-limiting resistor are connected between a first input end and a first output end in series, and a second current-limiting resistor and a fourth current-limiting resistor are connected between a second input end and a second output end in series; a first clamp resistor and a first reversed clamp diode are connected between a direct-current power supply and a node B in series, and a second reversed clamp diode and a second clamp resistor are connected between the node B and the ground in series; a third clamp resistor and a third reversed clamp diode are connected between the direct-current power supply and a node A in series, and a fourth clamp diode is connected between the node A and the ground; a first direct-current bias resistor is connected between the direct-current power supply and the second output end, and a second direct-current bias resistor is connected between the second output end and the ground; a third direct-current bias resistor is connected between the direct-current power supply and the first output end, and a fourth direct-current bias resistor is connected between the first output end and the ground. According to the differential input circuit, the antijamming capability of differential input is improved under the condition of various failures, and the failure states can be judged easily.
Description
Technical field
The application is related to a kind of Differential input circuit, more particularly to a kind of Differential input circuit being easy to failure judgement.
Background technology
Differential Input is due to possessing stronger anti-common mode disturbances ability, thus is widely used in various circuit.Refer to
Fig. 1, this is a kind of existing Differential input circuit.Input equivalent resistance ri in parallel and defeated between two inputs in1, in2
Enter equivalent filter electric capacity ci.Divider resistance rd and emc (Electro Magnetic Compatibility) filtering in parallel between two output ends out1, out2
Electric capacity ce.Current-limiting resistance one rl1 is connected to input one in1 and output end one out1.Current-limiting resistance two rl2 is connected to input
Two in2 and output end two out2.Outside input only provides effective differential signal, and its DC common-mode bias voltage is completely by rear stage
Process chip provides.
In normal work, a pair of differential signal is entered Differential input circuit shown in Fig. 1 by input in1, in2, stream
Through input equivalent resistance ri and input equivalent filter electric capacity ci, then through current-limiting resistance one rl1 and current-limiting resistance two rl2, flow direction point
Piezoresistance rd and emc filter capacitor ce, the voltage on divider resistance rd passes through the output of output end out1, out2 the most at last.Generally
Two output ends out1, out2 are connected to two inputs of a block signal process chip.
The fault of Differential input circuit specifically includes that two input in1, in2 short circuits；Outside input one in1 short circuit
High potential power (magnitude of voltage is higher than direct current power source voltage)；Input one in1 short circuit ground；Input one in1 short circuit negative supply；Defeated
Enter the outside high potential power of end two in2 short circuit；Input two in2 short circuit ground；Input two in2 short circuit negative supply.General core
The requirement that piece all can have internal clamper or have maximum allowable common-mode voltage in input, to protect port.Work as Differential input circuit
When breaking down, lead to the clamp voltage of input of connected signal processing chip if there is interference or signal fluctuation not
Steady or common-mode rejection ratio is low, then this signal processing chip will be incapable of recognizing that the fault of Differential input circuit thus leading to export
Abnormal.
Carrying out fault diagnosis to Differential input circuit has two schemes at present.It is poor that one kind is to increase external sample circuit detection
Divide the fault of input in1, in2, and this can lead to net mate during normal work uneven, impact Differential input circuit
Normal work.Another kind is to increase software processing algorithm and carries out fault diagnosis to the output signal of signal processing chip, and this meeting
Increase development cost, and there is the defects such as flexibility is inadequate, software complexity is high.
Content of the invention
Technical problems to be solved in this application are to provide a kind of Differential input circuit, and both readily identified faults, in fault
It is not result in the output abnormality of connected signal processing chip during generation again.
For solving above-mentioned technical problem, the application Differential input circuit, input equivalent electric in parallel between two inputs
Resistance and input equivalent filter electric capacity, emc filter capacitor in parallel between two output ends；Go here and there between input one and output end one
Join current-limiting resistance one and current-limiting resistance three, connect between input two and output end two current-limiting resistance two and current-limiting resistance
Four；
Node a will be referred to as between current-limiting resistance one and current-limiting resistance three, will claim between current-limiting resistance two and current-limiting resistance four
For node b；Connect between dc source and node b clamp resistance one and reverse clamp diode one, on node b and ground
Between connect reverse clamp diode two and clamp resistance two；Connect between dc source and node a clamp resistance
Three and reverse clamp diode three, it is connected to reverse clamp diode four between node a and ground；
Described clamp resistance one, clamp resistance two, the value of clamp resistance three meet: be zero in differential input signal, appoint
Meaning input be shorted to higher than direct current power source voltage and clamp diode one and clamp diode three conducting on the premise of, output
The magnitude of voltage at end one is higher than the magnitude of voltage of output end two；It is zero in differential input signal, any input is shorted to less than ground electricity
On the premise of position and clamp diode two and clamp diode four conducting, the magnitude of voltage of output end one is higher than the electricity of output end two
Pressure value；
It is connected to direct current biasing resistance one between dc source and output end two, be connected between output end two and ground
Direct current biasing resistance two；It is connected to direct current biasing resistance three between dc source and output end one, on output end one and ground
Between be connected to direct current biasing resistance four；
The value of described four direct current biasing resistance meets: is zero in differential input signal, and two input signals all do not have
On the premise of having external dc biasing, the magnitude of voltage of output end two is higher than the magnitude of voltage of output end one, and the amplitude exceeding is less than
The amplitude of normal input differential signal.
The implementation method of Differential input circuit described herein, by the output end one of Differential input circuit, output end two
Connect positive input terminal, the negative input end of a block signal process chip respectively；Simultaneously it is desirable to the two of Differential input circuit inputs
Effective differential signal is only provided or not any DC offset voltage；
In normal work, limit the applied signal voltage of two inputs all ground voltage and direct current power source voltage it
Between, four clamp diodes are all not turned on, and due to the value of direct current biasing resistance, the magnitude of voltage of output end two is higher than output end
One；This just increased a detection threshold in the negative input end of this signal processing chip, and this thresholding is less than normal input difference
The amplitude of signal；When the applied signal voltage of input one is less than input two, the negative input end voltage of signal processing chip
Higher than its positive input terminal voltage thus export the first level state all the time；When the applied signal voltage of input one is higher than input
When two, the positive input terminal voltage of signal processing chip is higher than its negative input end voltage thus exports second electrical level state all the time；
When there is short circuit fault between two inputs, differential input signal is zero, and four clamp diodes are not all led
Logical, due to the value of direct current biasing resistance, the magnitude of voltage of output end two exceeds output end one；The negative input of this signal processing chip
Terminal voltage is always higher than its positive input terminal voltage thus exports the first level state all the time；
When input one is shorted to the fault on ground, if the applied signal voltage of input two is higher than input one,
Then the output signal voltage value of output end two exceeds output end one, and the negative input end voltage of signal processing chip is higher than its positive input
Terminal voltage thus export the first level state all the time；If the applied signal voltage of input two is less than input one, output end
Two output signal voltage value is less than output end one, the negative input end voltage of signal processing chip be less than its positive input terminal voltage because
And export second electrical level state all the time；
When input two is shorted to the fault on ground, if the applied signal voltage of input one is higher than input two,
Then the output signal voltage value of output end one is higher than output end two, and the positive input terminal voltage of signal processing chip is higher than its negative input
Terminal voltage thus all the time export second electrical level state；If the applied signal voltage of input one is less than input two, output end
One output signal voltage value is less than output end two, the negative input end voltage of signal processing chip be higher than its positive input terminal voltage because
And export the first level state all the time；
When input one is shorted to the fault of outside high potential power or is shorted to negative supply fault, make two defeated
Enter end no to input；The positive input terminal voltage of signal processing chip be higher than its negative input end voltage thus all the time export second electrical level shape
State；
When input two is shorted to the fault of outside high potential power or is shorted to negative supply fault, make two defeated
Enter end no to input；The positive input terminal voltage of signal processing chip be higher than its negative input end voltage thus all the time export second electrical level shape
State.
The application Differential input circuit and its implementation do not affect on the normal work of Differential input circuit, to various
The antijamming capability of Differential Input is improve under failure condition.In case of a fault it is ensured that the output state of signal processing chip
Knowability, thus fault mode can be eliminated because of the output abnormality problem disturbed or signal fluctuation causes.Meanwhile, according to output state
Knowability, also can determine whether the appearance of fault, substantially reduces software processing complexity.
Brief description
Fig. 1 is a kind of schematic diagram of existing Differential input circuit；
Fig. 2 is the schematic diagram of the Differential input circuit that the application is easy to failure judgement.
In figure description of reference numerals:
In1, in2 are input；Ri is input equivalent resistance；Ci is input equivalent filter electric capacity；Rl1～rl4 is current limliting
Resistance；Rc1～rc3 is clamp resistance；Dc1～dc4 is clamp diode；Rd is divider resistance；Ce is emc filter capacitor；rb1
～rb4 is direct current biasing resistance；Out1, out2 are output end.
Specific embodiment
Refer to Fig. 2, this is the Differential input circuit of the application.Input in parallel etc. between two inputs in1, in2
Effect resistance ri and input equivalent filter electric capacity ci.Emc filter capacitor ce in parallel between two output ends out1, out2.Input
Hold current-limiting resistance one rl1 and current-limiting resistance three rl3 that connects between an in1 and output end one out1.Input two in2 and output
Hold current-limiting resistance two rl2 and current-limiting resistance four rl4 that connects between two out2.This four current-limiting resistance rl1～rl4 constitute limit
Flow module.Described current limliting module is the current-limiting circuit of asymmetric module and two output ends out1, out2 to clamp voltage.
Node a will be referred to as, by current-limiting resistance two rl2 and current-limiting resistance between current-limiting resistance one rl1 and current-limiting resistance three rl3
It is referred to as node b between four rl4.Connect between dc source and node b clamp resistance one rc1 and reverse clamp diode
One dc1, clamp diode two dc2 connecting reverse between node b and ground and clamp resistance two rc2.Dc source with
Connect between node a clamp resistance three rc3 and reverse clamp diode three dc3, is connected to reversely between node a and ground
Clamp diode four dc4.Rc1～rc3 and four clamp diode dc1～dc4 of these three clamp resistances constitutes clamper electricity
Press asymmetric module.The asymmetric module of described clamp voltage refers to Differential Input respectively to power supply or clamper electricity over the ground respectively
Pressure is all asymmetric.
Described clamp resistance one rc1, clamp resistance two rc2, the value of clamp resistance three rc3 need to meet at following 2 points:
First, being zero in differential input signal, any one or two inputs in1, in2 are shorted to higher than dc source
Voltage, and on the premise of clamp diode one dc1 and clamp diode three dc3 conducting, the magnitude of voltage of output end one out1 is high
Magnitude of voltage in output end two out2.
Second, being zero in differential input signal, any one or two inputs in1, in2 are shorted to less than ground potential,
And on the premise of clamp diode two dc2 and clamp diode four dc4 conducting, the magnitude of voltage of output end one out1 is higher than output end
The magnitude of voltage of two out2.
For example, it is zero in differential input signal, any one or two inputs in1, in2 are shorted to higher than dc source
Voltage or when being shorted to less than ground potential, the magnitude of voltage of output end one out1 is higher than the amplitude of the magnitude of voltage of output end two out2
Between 17～50mv.
Be connected to direct current biasing resistance one rb1 between dc source and output end two out2, output end two out2 with
It is connected to direct current biasing resistance two rb2 between ground.It is connected to direct current biasing resistance between dc source and output end one out1
Three rb3, are connected to direct current biasing resistance four rb4 between output end one out1 and ground.This four direct current biasing resistance rb1～
Rb4 constitutes direct current biasing module.Described direct current biasing module and the asymmetric module of clamp voltage coordinate, can having, fault-free
In the case of export signal specific state, on the one hand ensure that Differential input circuit has certain antijamming capability, on the other hand may be used
To realize the diagnosis of fault mode with reference to control strategy.
The value of described direct current biasing resistance rb1～rb4 needs to meet: in two input in1, in2 differential input signals
It is zero, and on the premise of two input signals all do not have external dc biasing, the magnitude of voltage of output end two out2 is higher than output end
The magnitude of voltage of one out1, the amplitude exceeding is less than the amplitude of normal input differential signal, the amplitude exceeding for example 50～
Between 300mv.
Compared with existing Differential input circuit shown in Fig. 1, the Differential input circuit of the application deletes divider resistance
Rd, has increased current limliting module, the asymmetric module of clamp voltage and direct current biasing module newly, its objective is to improve input signal noise
Than, and be easy to fault mode is diagnosed.
When using, two output ends out1, out2 of the Differential input circuit of the application shown in Fig. 2 connect one respectively
The positive input terminal of block signal process chip, negative input end.Simultaneously it is desirable to the two of Differential input circuit inputs in1, in2 only
Effective differential signal is provided or not any DC offset voltage.Under normal work and various failure condition, the application's
Differential input circuit or the normal output not affecting connected signal processing chip, or fault can be found in time.
First, in normal work, limit the voltage of input any one input signal of in1, in2 all in ground voltage and straight
Between stream supply voltage, four clamp diodes dc1, dc2, dc3, dc4 all do not turn on, Fig. 2 equivalent according to two-port network
Differential Input network be approximately equal to the Differential Input network of Fig. 1.But because the value of direct current biasing module is so that output end
The magnitude of voltage of two out2 can be higher than the magnitude of voltage of output end one out1.This is equivalent to the negative input end in this signal processing chip
Increased a detection threshold, this thresholding is less than the amplitude of normal input differential signal, thus improve the difference of the application
The antijamming capability of input circuit.
When the applied signal voltage of input one in1 is less than input two in2, consider that direct current biasing module increases further
Plus thresholding, the negative input end voltage of the signal processing chip being connected is higher than its positive input terminal voltage, this signal processing chip
All the time export the first level state (such as low level).When the applied signal voltage of input one in1 is higher than input two in2
When, because input signal amplitude is more than the threshold value that biasing module increases, the positive input terminal electricity of the signal processing chip being connected
Pressure is higher than its negative input end voltage, and this signal processing chip exports second electrical level state (such as high level) all the time.This ensures
The output result of signal processing chip normal.
When the 2nd, there is short circuit fault between two inputs in1, in2, differential input signal is zero, four clampers two
Pole pipe dc1, dc2, dc3, dc4 all do not turn on, because the value of direct current biasing module is so that the magnitude of voltage of output end two out2
Higher than output end one out1.The negative input end voltage of the signal processing chip therefore being connected is always higher than its positive input terminal electricity
Pressure, this signal processing chip exports the first level state (such as low level) all the time.
3rd, when input one in1 is shorted to earth fault, if the applied signal voltage of input two in2 is higher than defeated
Enter the applied signal voltage of end one in1, then the output signal voltage value of output end two out2 exceeds the output of output end one out1
Signal voltage value, the negative input end voltage of the signal processing chip being connected is higher than its positive input terminal voltage, this signal transacting core
Piece exports the first level state (such as low level) all the time.If the applied signal voltage of input two in2 is less than input one in1
Applied signal voltage, because input signal amplitude is more than the threshold value that direct current biasing module increases, then output end two out2
Output signal voltage value is less than the output signal voltage value of output end one out1, the negative input end of the signal processing chip being connected
Voltage is less than its positive input terminal voltage, and this signal processing chip exports second electrical level state (such as high level) all the time.This is just really
Protected signal processing chip output result normal.
4th, when input two in2 is shorted to earth fault, if the applied signal voltage of input one in1 is higher than defeated
Enter the applied signal voltage of end two in2, because input signal amplitude is more than the threshold value that direct current biasing module increases, then output end
The output signal voltage value of one out1 is higher than the output signal voltage value of output end two out2, the signal processing chip being connected
Positive input terminal voltage is higher than its negative input end voltage, and this signal processing chip exports second electrical level state (for example high electricity all the time
Flat).If the applied signal voltage of input one in1 is less than the applied signal voltage of input two in2, consider that direct current is inclined further
Put the thresholding of module increase, then the output signal voltage value of output end one out1 is less than the output signal voltage of output end two out2
Value, the negative input end voltage of the signal processing chip being connected is higher than its positive input terminal voltage, and this signal processing chip is defeated all the time
Go out the first level state (such as low level).Guarantee signal processing chip output result normal.
5th, it is shorted to the fault of outside high potential power in input one in1 or be shorted to negative supply fault, and poor
When point input signal is zero, because the value of the asymmetric module of clamp voltage is so that the magnitude of voltage of output end one out1 will be above
The magnitude of voltage of output end two out2.The positive input terminal voltage of the signal processing chip so being connected is always higher than its negative input end
Voltage, this signal processing chip exports second electrical level state (such as high level) all the time.
Input one in1 is shorted to outside high potential power fault, is divided into following two situations:
It is shorted to outside high potential power fault in input one in1, and input two in2 input is negative voltage
During signal, consider clamper asymmetrical voltage module value further, then the magnitude of voltage of output end one out1 is higher than output end two
Out2, the positive input terminal voltage of the signal processing chip being connected is higher than its negative input end voltage, and this signal processing chip exports
Second electrical level state (such as high level).
It is shorted to outside high potential power fault in input one in1, and input two in2 input is positive voltage
During signal, if input signal amplitude is less, the asymmetric module of clamp voltage plays a leading role to output, then output end one out1
Magnitude of voltage is higher than output end two out2, and the positive input terminal voltage of the signal processing chip being connected is higher than its negative input end voltage,
This signal processing chip output second electrical level state (such as high level).If input signal amplitude is larger, input signal is to output
Play a leading role, then the magnitude of voltage of output end one out1 be less than output end two out2, the signal processing chip being connected just defeated
Enter terminal voltage and be less than its negative input end voltage, this signal processing chip exports the first level state (such as low level).
It follows that being shorted to outside high potential power fault in input one in1, whether output signal is normally subject to
Impact to input signal amplitude.It is shorted to power failure in order to be able to detect, two inputs in1, in2 can be made no to input.
Under normal circumstances, when two inputs in1, in2 no input, the magnitude of voltage of output end two out2 is higher than output end one out1, therefore
The signal processing chip being connected exports the first level state (such as low level).It is shorted in the event of input two in1
During power supply, the signal processing chip being connected exports second electrical level state (such as high level).
Input one in1 is shorted to exterior negative electrode source fault, is divided into following two situations:
It is shorted to exterior negative electrode source fault in input one in1, and input two in2 input is negative voltage signal
When, consider clamper asymmetrical voltage module further, then the magnitude of voltage of output end one out1 is higher than output end two out2, is connected
Signal processing chip positive input terminal voltage be higher than its negative input end voltage, this signal processing chip export second electrical level state
(such as high level).
It is shorted to exterior negative electrode source fault in input one in1, and input two in2 input is positive voltage signal
When, if input signal amplitude is less, the asymmetric module of clamp voltage plays a leading role to output, then the voltage of output end one out1
Value is higher than output end two out2, and the positive input terminal voltage of the signal processing chip being connected is higher than its negative input end voltage, this letter
Number process chip output second electrical level state (such as high level).If input signal amplitude is larger, input signal is to having exported master
Lead effect, then the magnitude of voltage of output end one out1 is less than output end two out2, the positive input terminal of the signal processing chip being connected
Voltage is less than its negative input end voltage, and this signal processing chip exports the first level state (such as low level).
It follows that being shorted to exterior negative electrode source fault in input one in1, whether poor output signal is normally
Divide the impact of input signal amplitude.It is shorted to power failure in order to be able to detect, two inputs in1, in2 can be made no to input.
Under normal circumstances, when two inputs in1, in2 no input, the magnitude of voltage of output end two out2 is higher than output end one out1, therefore
The signal processing chip being connected exports the first level state (such as low level).It is shorted in the event of input two in1
During power supply, the signal processing chip being connected exports second electrical level state (such as high level).
6th, it is shorted to the fault of outside high potential power in input two in2 or be shorted to negative supply fault, and poor
When point input signal is zero, because the value of the asymmetric module of clamp voltage is so that the magnitude of voltage of output end one out1 will be above
The magnitude of voltage of output end two out2.The positive input terminal voltage of the signal processing chip so being connected is always higher than its negative input end
Voltage, this signal processing chip exports second electrical level state (such as high level) all the time.
Input two in2 is shorted to outside high potential power fault, is divided into following two situations:
It is shorted to outside high potential power fault in input two in2, and input one in1 input is positive voltage
During signal, consider clamper asymmetrical voltage module value further, then the magnitude of voltage of output end one out1 is higher than output end two
Out2, the positive input terminal voltage of the signal processing chip being connected is higher than its negative input end voltage, and this signal processing chip exports
Second electrical level state (such as high level).
It is shorted to outside high potential power fault in input two in2, and input one in1 input is negative voltage
During signal, if input signal amplitude is less, the asymmetric module of clamp voltage plays a leading role to output, then output end one out1
Magnitude of voltage is higher than output end two out2, and the positive input terminal voltage of the signal processing chip being connected is higher than its negative input end voltage,
This signal processing chip output second electrical level state (such as high level).If input signal amplitude is larger, input signal is to output
Play a leading role, then the magnitude of voltage of output end one out1 be less than output end two out2, the signal processing chip being connected just defeated
Enter terminal voltage and be less than its negative input end voltage, this signal processing chip exports the first level state (such as low level).
It follows that being shorted to outside high potential power fault in input two in2, whether output signal is normally subject to
Impact to input signal amplitude.It is shorted to power failure in order to be able to detect, two inputs in1, in2 can be made no to input.
Under normal circumstances, when two inputs in1, in2 no input, the magnitude of voltage of output end two out2 is higher than output end one out1, therefore
The signal processing chip being connected exports the first level state (such as low level).It is shorted in the event of input two in2
During power supply, the signal processing chip being connected exports second electrical level state (such as high level).
Input two in2 is shorted to exterior negative electrode source fault, is divided into following two situations:
It is shorted to exterior negative electrode source fault in input two in2, and input one in1 input is positive voltage signal
When, consider clamper asymmetrical voltage module further, then the magnitude of voltage of output end one out1 is higher than output end two out2, is connected
Signal processing chip positive input terminal voltage be higher than its negative input end voltage, this signal processing chip export second electrical level state
(such as high level).
It is shorted to exterior negative electrode source fault in input two in2, and input one in1 input is negative voltage signal
When, if input signal amplitude is less, the asymmetric module of clamp voltage plays a leading role to output, then the voltage of output end one out1
Value is higher than output end two out2, and the positive input terminal voltage of the signal processing chip being connected is higher than its negative input end voltage, this letter
Number process chip output second electrical level state (such as high level).If input signal amplitude is larger, input signal is to having exported master
Lead effect, then the magnitude of voltage of output end one out1 is less than output end two out2, the positive input terminal of the signal processing chip being connected
Voltage is less than its negative input end voltage, and this signal processing chip exports the first level state (such as high level).
It follows that being shorted to exterior negative electrode source fault in input two in2, whether poor output signal is normally
Divide the impact of input signal amplitude.It is shorted to power failure in order to be able to detect, two inputs in1, in2 can be made no to input.
Under normal circumstances, when two inputs in1, in2 no input, the magnitude of voltage of output end two out2 is higher than output end one out1, therefore
The signal processing chip being connected exports the first level state (such as low level).It is shorted in the event of input two in2
During power supply, the signal processing chip being connected exports second electrical level state (such as high level).
The magnitude relationship of above six kinds of situations refers both to the size of the absolute value of voltage magnitude when comparing, by above six kinds of situations
Arrange as shown in the table:
As can be seen here, under normal work and various failure condition, the Differential input circuit of the application or do not affect institute
Connect signal processing chip normal output, or by simple operations (make in1, in2 amplitude magnitude relationship change or
It is zero that person makes input signal) can easily find fault.
These are only the preferred embodiment of the application, be not used to limit the application.Those skilled in the art is come
Say, the application can have various modifications and variations.All any modifications within spirit herein and principle, made, equivalent
Replace, improve etc., should be included within the protection domain of the application.
Claims (4)
1. a kind of Differential input circuit, in parallel input equivalent resistance and input equivalent filter electric capacity between two inputs, two
Emc filter capacitor in parallel between individual output end；It is characterized in that, current-limiting resistance one of connecting between input one and output end one
With current-limiting resistance three, connect between input two and output end two current-limiting resistance two and current-limiting resistance four；
Node a will be referred to as between current-limiting resistance one and current-limiting resistance three, referred to as will save between current-limiting resistance two and current-limiting resistance four
Point b；Connect between dc source and node b clamp resistance one and reverse clamp diode one, between node b and ground
The clamp diode two connecting reverse and clamp resistance two；Connect between dc source and node a clamp resistance three and
Reverse clamp diode three, is connected to reverse clamp diode four between node a and ground；
Described clamp resistance one, clamp resistance two, the value of clamp resistance three meet: it is zero in differential input signal, arbitrarily defeated
Enter terminal shortcircuit to higher than direct current power source voltage and clamp diode one and clamp diode three conducting on the premise of, output end one
Magnitude of voltage be higher than output end two magnitude of voltage；Be zero in differential input signal, any input be shorted to less than ground potential and
On the premise of clamp diode two and clamp diode four conducting, the magnitude of voltage of output end one is higher than the magnitude of voltage of output end two；
It is connected to direct current biasing resistance one between dc source and output end two, between output end two and ground, be connected to direct current
Biasing resistor two；It is connected to direct current biasing resistance three between dc source and output end one, connect between output end one and ground
Then direct current biasing resistance four；
The value of described four direct current biasing resistance meets: is zero in differential input signal, and two input signals are all not outward
On the premise of portion's direct current biasing, the magnitude of voltage of output end two is higher than the magnitude of voltage of output end one, and the amplitude exceeding is less than normally
Input differential signal amplitude.
2. Differential input circuit according to claim 1, is characterized in that, described clamp resistance one, clamp resistance two, clamper
The value of resistance three meets: is zero in differential input signal, any input is shorted to higher than dc source current potential or is shorted to
During less than ground potential, the magnitude of voltage 17～50mv higher than the magnitude of voltage of output end two of output end one.
3. Differential input circuit according to claim 1, is characterized in that, the value of described four direct current biasing resistance is full
Foot: be zero in differential input signal, and when two input signals all do not have external dc biasing, the magnitude of voltage of output end two is than defeated
Go out the high 50～300mv of magnitude of voltage at end one.
4. a kind of implementation method of Differential input circuit as claimed in claim 1, by the output end one of Differential input circuit, defeated
Go out end two and connect the positive input terminal of a block signal process chip, negative input end respectively；Simultaneously it is desirable to the two of Differential input circuit
Input only provides effective differential signal not provide any DC offset voltage；It is characterized in that,
In normal work, limit two inputs applied signal voltage all between ground voltage and direct current power source voltage, four
Individual clamp diode is all not turned on, and due to the value of direct current biasing resistance, the magnitude of voltage of output end two is higher than output end one；This is just
Increased a detection threshold in the negative input end of this signal processing chip, this thresholding is less than the width of normal input differential signal
Value；When the applied signal voltage of input one is less than input two, the negative input end voltage of signal processing chip is higher than it just
Input terminal voltage thus export the first level state all the time；When the applied signal voltage of input one is higher than input two, letter
The positive input terminal voltage of number process chip is higher than its negative input end voltage thus exports second electrical level state all the time；
When there is short circuit fault between two inputs, differential input signal is zero, and four clamp diodes are all not turned on, by
In the value of direct current biasing resistance, the magnitude of voltage of output end two exceeds output end one；The negative input end electricity of this signal processing chip
Pressure is always higher than its positive input terminal voltage thus exports the first level state all the time；
When input one is shorted to the fault on ground, if the applied signal voltage of input two is higher than input one, defeated
The output signal voltage value going out end two exceeds output end one, and the negative input end voltage of signal processing chip is higher than its positive input terminal electricity
Pressure thus export the first level state all the time；If the applied signal voltage of input two is less than input one, output end two
Output signal voltage value is less than output end one, and the negative input end voltage of signal processing chip is less than its positive input terminal voltage thus begins
Output second electrical level state eventually；
When input two is shorted to the fault on ground, if the applied signal voltage of input one is higher than input two, defeated
The output signal voltage value going out end one is higher than output end two, and the positive input terminal voltage of signal processing chip is higher than its negative input end electricity
Pressure thus all the time export second electrical level state；If the applied signal voltage of input one is less than input two, output end one
Output signal voltage value is less than output end two, and the negative input end voltage of signal processing chip is higher than its positive input terminal voltage thus begins
Output the first level state eventually；
When input one is shorted to the fault of outside high potential power or is shorted to negative supply fault, make two inputs
No input；The positive input terminal voltage of signal processing chip be higher than its negative input end voltage thus all the time export second electrical level state；
When input two is shorted to the fault of outside high potential power or is shorted to negative supply fault, make two inputs
No input；The positive input terminal voltage of signal processing chip be higher than its negative input end voltage thus all the time export second electrical level state.
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| CN201410199599.6A CN104022748B (en) | 2014-05-13 | 2014-05-13 | Differential input circuit and method for obtaining differential input circuit |
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| CN201410199599.6A CN104022748B (en) | 2014-05-13 | 2014-05-13 | Differential input circuit and method for obtaining differential input circuit |
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| CN104022748B true CN104022748B (en) | 2017-01-25 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1946262A (en) * | 2005-10-04 | 2007-04-11 | 索尼计算机娱乐公司 | Electronic circuit having transmission line type noise filter |
| CN101860240A (en) * | 2009-12-04 | 2010-10-13 | 崇贸科技股份有限公司 | Feedback circuit with feedback impedance modulation |
| CN203896318U (en) * | 2014-05-13 | 2014-10-22 | 联合汽车电子有限公司 | Differential input circuit |
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2014
- 2014-05-13 CN CN201410199599.6A patent/CN104022748B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1946262A (en) * | 2005-10-04 | 2007-04-11 | 索尼计算机娱乐公司 | Electronic circuit having transmission line type noise filter |
| CN101860240A (en) * | 2009-12-04 | 2010-10-13 | 崇贸科技股份有限公司 | Feedback circuit with feedback impedance modulation |
| CN203896318U (en) * | 2014-05-13 | 2014-10-22 | 联合汽车电子有限公司 | Differential input circuit |
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