CN104008071B - Signal processing method, adapter and memory storage apparatus - Google Patents
Signal processing method, adapter and memory storage apparatus Download PDFInfo
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- CN104008071B CN104008071B CN201310056502.1A CN201310056502A CN104008071B CN 104008071 B CN104008071 B CN 104008071B CN 201310056502 A CN201310056502 A CN 201310056502A CN 104008071 B CN104008071 B CN 104008071B
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Abstract
The present invention provides a kind of signal processing method, adapter and memory storage apparatus.Signal processing method is for this adapter, and adapter does not include a quartz oscillator.This signal processing method includes：Receive the first train of signal from host computer system；Follow the trail of the transmission frequency of the first train of signal, and obtain the frequency offset that the first train of signal is with respect to transmission frequency；According to this frequency offset judge the first train of signal whether through spread spectrum operation to produce a judged result；One secondary signal string is produced with transmission frequency according to this judged result.Therefore, it can process spread spectrum operation in the case of there is no quartz oscillator.
Description
Technical field
The invention relates to a kind of signal processing method, and in particular to a kind of signal processing side of adapter
Method, adapter and memory storage apparatus.
Background technology
Digital camera, mobile phone and MP3 player are in growth over the years very rapidly so that consumer is to storage
The demand of media also rapidly increases.Because reproducible nonvolatile memorizer module (for example, flash memory) has data
The characteristics such as non-volatile, power saving, small volume, and mechanical structure, so be especially suitable for being built in above-mentioned illustrated various
In portable multimedia device.
In general, reproducible nonvolatile memorizer module can be electrically connected to a main frame by an adapter
System.In some communication standards, between adapter and host computer system, the train of signal of transmission is possible to pass through spread spectrum (spread
Spectrum clock, hereinafter referred to as SSC) operation, that is, the frequency of train of signal can change over time within the specific limits, with
Allow signal energy to be dispersed in a frequency band range, therefore make the electromagnetic interference (Electromagnetic of signal
Interference, EMI) it is inhibited.Although spread spectrum operation relatively can resist noise (noise) or interference (interference)
Deng impact, but can be using larger frequency range, and the frequency of train of signal may change over time.However, in some applications,
Do not have quartz oscillator in adapter to produce accurate clock pulse signal, now adapter is to be passed with reference to host computer system
The train of signal sending is producing clock pulse signal.Therefore, in the case that how here does not have quartz oscillator, adapter how
Produce a more accurate and satisfactory output signal, for this skilled person subject under discussion of concern.
Content of the invention
Exemplary embodiment of the present invention provides a kind of signal processing method, adapter and memory storage apparatus, can make not have
The adapter having quartz oscillator produces an output signal meeting specific specifications.
The present invention one exemplary embodiment proposes a kind of signal processing method, and for a connector, wherein adapter does not include
One quartz oscillator, signal processing method includes：Receive first train of signal from a host computer system；Follow the trail of the first signal
The transmission frequency of string, and obtain the frequency offset that the first train of signal is with respect to transmission frequency；According to this frequency offset
Judge the first train of signal whether through spread spectrum operation to produce a judged result；Produced with transmission frequency according to this judged result
One secondary signal string.
In an exemplary embodiment, the step of the transmission frequency of above-mentioned tracking first train of signal includes：Persistently detect first
One average frequency of train of signal；Judge that this average frequency is whether in a mobility scale in a very first time interval；And
If this average frequency, all in mobility scale, sets this average frequency as above-mentioned transmission frequency in very first time interval.
In an exemplary embodiment, above-mentioned judge the first train of signal whether through the step of spread spectrum operation according to frequency offset
Rapid inclusion：Whether determination frequency side-play amount meets first marginal value；And if frequency offset meets the first marginal value, sentencing
Disconnected first train of signal is through spread spectrum operation.
In an exemplary embodiment, above-mentioned frequency offset be the first train of signal a peak frequency and transmission frequency it
Difference, or the difference of the minimum frequency for the first train of signal and transmission frequency.
In an exemplary embodiment, above-mentioned judge the first train of signal whether through the step of spread spectrum operation according to frequency offset
Rapid inclusion：In second time interval, cumulative frequency side-play amount is to produce a cumulative frequency difference value；Judge this accumulation frequency
Whether rate difference value meets second marginal value；And if cumulative frequency difference value meets the second marginal value, judge the first letter
Number string through spread spectrum operation.
In an exemplary embodiment, the above-mentioned step according to judged result and transmission frequency generation secondary signal string includes：
If the first train of signal is through spread spectrum operation, according to an adjustment signal to the data signal string implementation center meeting transmission frequency
Spread spectrum operation is to produce secondary signal string.
In an exemplary embodiment, the above-mentioned step according to judged result and transmission frequency generation secondary signal string includes：
If the first train of signal is through spread spectrum operation, a data signal string is changed to a compensation frequency from transmission frequency, wherein compensates
Frequency is more than transmission frequency；According to one adjustment signal to meet compensate frequency data signal string carry out a downward spread spectrum operation with
Produce secondary signal string.
For another one angle, the present invention one exemplary embodiment proposes a kind of adapter.This adapter does not include stone
English agitator, this adapter includes receiving circuit, frequency tracking circuit and transmitting circuit.Receiving circuit is to receive independently
First train of signal of machine system.Frequency tracking circuit is electrically connected to receiving circuit, in order to follow the trail of the transmission of the first train of signal
Frequency.Transmitting circuit is electrically connected to receiving circuit and frequency tracking circuit.Receiving circuit is also in order to obtain the first train of signal
With respect to a frequency offset of transmission frequency, and judged the first train of signal whether through spread spectrum according to this frequency offset
Operation is to produce judged result.Transmitting circuit is also in order to produce a secondary signal string according to this judged result with transmission frequency.
In an exemplary embodiment, the operation that said frequencies follow the trail of the transmission frequency that circuit follows the trail of the first train of signal includes：
Frequency tracking device persistently detects an average frequency of the first train of signal, and judges that this is average in a very first time interval
Whether frequency is in a mobility scale；If in very first time interval, this average frequency is all in mobility scale, frequency tracking device
This average frequency can be set as above-mentioned transmission frequency.
In an exemplary embodiment, above-mentioned receiving circuit includes a spread spectrum detector.Above-mentioned receiving circuit is according to frequency
Side-play amount judges that whether the first train of signal includes through the operation of spread spectrum operation：Whether spread spectrum detector determination frequency side-play amount accords with
Unification the first marginal value；And if frequency offset meets the first marginal value, spread spectrum detector judges that the first train of signal passes through
Spread spectrum operation.
In an exemplary embodiment, whether above-mentioned receiving circuit judges the first train of signal through spread spectrum according to frequency offset
The operation of operation includes：Spread spectrum detector cumulative frequency side-play amount in second time interval is poor to produce a cumulative frequency
Different value；Spread spectrum detector judges whether this cumulative frequency difference value meets second marginal value；If cumulative frequency difference value accords with
Close the second marginal value, spread spectrum detector judges the first train of signal through spread spectrum operation.
In an exemplary embodiment, above-mentioned transmitting circuit produces the behaviour of secondary signal string according to judged result and transmission frequency
Work includes：If the first train of signal is that transmitting circuit is according to an adjustment signal to the number meeting transmission frequency through spread spectrum operation
Execute a center spread spectrum operation according to train of signal to produce secondary signal string.
In an exemplary embodiment, above-mentioned transmitting circuit produces the behaviour of secondary signal string according to judged result and transmission frequency
Work includes：If the first train of signal is through spread spectrum operation, a data signal string is changed to one by transmitting circuit from this transmission frequency
Compensate frequency, wherein compensate frequency and be more than transmission frequency；Transmitting circuit is according to an adjustment signal to the data meeting compensation frequency
Train of signal carries out a downward spread spectrum operation to produce secondary signal string.
For another one angle, the present invention one exemplary embodiment proposes a kind of memory storage apparatus, including can answer
Write formula non-volatile memory module, Memory Controller and adapter.Reproducible nonvolatile memorizer module includes many
Individual entity erased cell.Memory Controller is electrically connected to reproducible nonvolatile memorizer module.Adapter is electricity
Property connects to Memory Controller, is electrically connected to a host computer system.This adapter does not include a quartz oscillator, and this is even
Connect device and include receiving circuit, frequency tracking circuit and transmitting circuit.Receiving circuit is first receiving from host computer system
Train of signal.Frequency tracking circuit is electrically connected to receiving circuit, in order to follow the trail of the transmission frequency of the first train of signal.Transmitting circuit
It is electrically connected to receiving circuit and frequency tracking circuit.Receiving circuit is also in order to obtain the first train of signal with respect to transmission frequency
A frequency offset, and judged according to this frequency offset the first train of signal whether through spread spectrum operation to produce judgement
Result.Transmitting circuit is also in order to produce a secondary signal string according to this judged result with transmission frequency.
Based on above-mentioned, signal processing method, adapter and memory storage apparatus that exemplary embodiment of the present invention proposes, can
Whether the train of signal of host computer system is derived from through spread spectrum operation with detection in the case of not having quartz oscillator, and accordingly
Spread spectrum operation is carried out to the train of signal sending host computer system to.
It is that the features described above of the present invention and advantage can be become apparent, special embodiment below, and coordinate accompanying drawing to make in detail
Carefully it is described as follows.
Brief description
Figure 1A is the host computer system and memory storage apparatus according to an exemplary embodiment；
Figure 1B is the signal of the computer, input/output device and memory storage apparatus according to an exemplary embodiment
Figure；
Fig. 1 C is the schematic diagram of the host computer system according to an exemplary embodiment and memory storage apparatus；
Fig. 2 is the schematic block diagram representing the memory storage apparatus shown in Figure 1A；
Fig. 3 is the partial block diagram of adapter according to an exemplary embodiment；
Fig. 4 is the partial block diagram of adapter 102 according to an exemplary embodiment；
Fig. 5 is the schematic diagram following the trail of the first train of signal according to an exemplary embodiment；
Fig. 6 and 7 is the schematic diagram judging whether according to an exemplary embodiment through spread spectrum operation；
Fig. 8 A and Fig. 8 B is the schematic diagram producing secondary signal string according to an exemplary embodiment；
Fig. 9 is the flow chart of signal processing method according to an exemplary embodiment.
Description of reference numerals：
1000：Host computer system；
1100：Computer；
1102：Microprocessor；
1104：Random access memory；
1106：Input/output device；
1108：System bus；
1110：Data transmission interface；
1202：Mouse；
1204：Keyboard；
1206：Display；
1208：Printer；
1212：Flash disk；
1214：Storage card；
1216：Solid state hard disc；
1310：Digital camera；
1312：SD card；
1314：Mmc card；
1316：Memory stick；
1318：CF card；
1320：Embedded storage device；
100：Memory storage apparatus；
102：Adapter；
104：Memory Controller；
106：Reproducible nonvolatile memorizer module；
108 (0)～108 (R)：Entity erased cell；
302：First train of signal；
304：Frequency information；
306：Clock pulse signal；
308：Judged result；
310：Receiving circuit；
320：Frequency tracking circuit；
330：Transmitting circuit；
402：Control code；
404：Pulse reference clock；
410：Frequency detector；
420：Clock pulses data restoring circuit；
430：Spread spectrum detector；
440：Frequency tracking device；
450：Clock pulse generating circuit；
452：Phase-locked loop；
454：Pulse reference clock generator；
502：Transmission frequency；
602、608、804：Frequency；
604、606：Frequency offset；
702、706：Time interval；
704、708：Region；
802、806：Data signal string；
804：Compensate frequency；
S902、S904、S906、S908：The step of signal processing method.
Specific embodiment
In general, memory storage apparatus (also referred to as, storage system) include duplicative non-volatile memories
Device module and controller (also referred to as, control circuit).Being commonly stored device storage device is to be used together with host computer system, so that main frame
System can write data into memory storage apparatus or read data from memory storage apparatus.
Figure 1A is the host computer system and memory storage apparatus according to an exemplary embodiment.
Refer to Figure 1A, host computer system 1000 generally comprise computer 1100 and input/output (input/output, below
Referred to as I/O) device 1106.Computer 1100 includes microprocessor 1102, random access memory (random access
Memory, hereinafter referred to as RAM) 1104, system bus 1108 and data transmission interface 1110.Input/output device 1106 wraps
Include mouse 1202 as Figure 1B, keyboard 1204, display 1206 and printer 1208.It will be appreciated that the dress shown in Figure 1B
Put unrestricted input/output device 1106, input/output device 1106 can also include other devices.
In embodiments of the present invention, memory storage apparatus 100 are by data transmission interface 1110 and host computer system
1000 other elements are electrically connected with.By microprocessor 1102, random access memory 1104 and input/output device 1106
Operation can write data into memory storage apparatus 100 or from memory storage apparatus 100 read data.For example, deposit
Reservoir storage device 100 can be flash disk 1212 as shown in Figure 1B, storage card 1214 or solid state hard disc (Solid State
Drive, hereinafter referred to as SSD) the type nonvolatile storage devices such as 1216.
In general, host computer system 1000 is substantially to coordinate appointing with data storage with memory storage apparatus 100
Meaning system.Although in this exemplary embodiment, host computer system 1000 is to be explained with computer system, however, another in the present invention
In one exemplary embodiment, host computer system 1000 can be digital camera, video camera, communicator, audio player or video playback
The systems such as device.For example, when host computer system 1000 is digital camera (video camera) 1310, type nonvolatile is deposited
Safe digital (Secure Digital Memory Card, hereinafter referred to as SD) that storage device is then used by it card 1312,
Multimedia (Multimedia Card, hereinafter referred to as MMC) card 1314, memory stick (memory stick) 1316, compact flash
(Compact Flash, hereinafter referred to as CF) blocks 1318 or embedded storage devices 1320 (as shown in Figure 1 C).Embedded storage
Device 1320 includes embedded multi-media card (Embedded MMC, hereinafter referred to as eMMC).It is noted that it is embedded many
Media card is directly to be electrically connected on the substrate of host computer system.
Fig. 2 is the schematic block diagram representing the memory storage apparatus shown in Figure 1A.
Refer to Fig. 2, it is non-with duplicative that memory storage apparatus 100 include adapter 102, Memory Controller 104
Volatile 106.
In this exemplary embodiment, adapter 102 be compatible with USB (universal serial bus) (Universal Serial Bus,
Hereinafter referred to as USB) standard.However, it is necessary to be appreciated that, the invention is not restricted to this, adapter 102 can also be to meet serial
Advanced adnexa (Serial Advanced Technology Attachment, hereinafter referred to as SATA) standard, advanced attached parallel
Part (Parallel Advanced Technology Attachment, hereinafter referred to as PATA) standard, Electrical and Electronic engineering
Shi Xiehui (Institute of Electrical and Electronic Engineers, hereinafter referred to as IEEE) 1394 marks
Accurate, high-speed peripheral component connecting interface (Peripheral Component Interconnect Express, hereinafter referred to as
PCI Express) standard, safe digital (Secure Digital, hereinafter referred to as SD) interface standard, a ultrahigh speed generation
(Ultra High Speed-I, hereinafter referred to as UHS-I) interface standard, ultrahigh speed secondary (Ultra High Speed-II,
Hereinafter referred to as UHS-II) interface standard, memory stick (Memory Stick, hereinafter referred to as MS) interface standard, multimedia deposit
Card storage (Multi Media Card, hereinafter referred to as MMC) interface standard, built-in multimedia storage card (Embedded
Multimedia Card, hereinafter referred to as eMMC) interface standard, general flash memory (Universal Flash
Storage, hereinafter referred to as UFS) interface standard, compact flash (Compact Flash, hereinafter referred to as CF) interface standard,
Integrated driving electrical interface (Integrated Device Electronics, hereinafter referred to as IDE) standard or other be suitable for
Standard.
Memory Controller 104 in order to execute in the form of hardware or form of firmware make multiple gates or control instruction,
And write, the reading of data are carried out in reproducible nonvolatile memorizer module 106 according to the instruction of host computer system 1000
The operation such as take and erase.
Reproducible nonvolatile memorizer module 106 is electrically connected to Memory Controller 104, and in order to store
The data that host computer system 1000 is write.Reproducible nonvolatile memorizer module 106 has entity erased cell 108 (0)
～108 (R).For example, entity erased cell 108 (0)～108 (R) can belong to same memory crystal grain (die) or belong to not
Same memory crystal grain.Each entity erased cell is respectively provided with multiple entity program units, and belongs to same entity
The entity program unit of erased cell can be written independently and simultaneously be erased.For example, each entity erased cell is
It is made up of 128 entity program units.However, it is necessary to be appreciated that, the invention is not restricted to this, each entity erased cell
It is can be made up of 64 entity program units, 256 entity program units or other arbitrarily individual entity program units.
In more detail, entity erased cell is the least unit erased.It may also be said that each entity erased cell contains
The memory cell being erased in the lump of minimal amount.Entity program unit is the minimum unit of sequencing.That is, entity program list
Unit is the minimum unit of write data.Each entity program unit generally includes data bit area and redundancy ratio special zone.Data
Bit area comprises multiple entity access addresses in order to store the data of user, and redundancy ratio special zone is in order to the data of storage system
(for example, control information and error correcting code).In this exemplary embodiment, the data bit area of each entity program unit
In can comprise 4 entity access addresses, and the size of an entity access address be 512 bytes (byte, hereinafter referred to as B).
However, in other exemplary embodiment, 8,16 or the more or less of entity of number also can be comprised in data bit area and deposits
Take address, the present invention is not intended to limit size and the number of entity access address.For example, entity erased cell is solid block, and
And entity program unit is physical page or entity sector.
In this exemplary embodiment, reproducible nonvolatile memorizer module 106 is multistage memory cell (Multi
Level Cell, hereinafter referred to as MLC) NAND type flash memory module, can store at least 2 bits in a memory cell
Data.However, the invention is not restricted to this, reproducible nonvolatile memorizer module 106 may also be single-order memory cell (Single
Level Cell, hereinafter referred to as SLC) NAND type flash memory module, multistage memory cell (Trinary Level Cell,
Hereinafter referred to as TLC) NAND type flash memory module, other flash memory module or other there is the storage of identical characteristics
Device module.
Fig. 3 is the partial block diagram of adapter according to an exemplary embodiment.
Refer to Fig. 3, adapter 102 at least includes receiving circuit 310, frequency tracking circuit 320 and transmitting circuit
330.Receiving circuit 310 can receive the first train of signal 302 coming from host computer system 1000, and detects the first train of signal 302
Frequency.Receiving circuit 310 also can send frequency tracking circuit to the frequency information 304 related to the first train of signal 302
320.Frequency tracking circuit 320 can follow the trail of a transmission frequency of the first train of signal 302, and for example, this transmission frequency is the first letter
Number string 302 average frequency.The clock pulse signal 306 meeting this transmission frequency can be sent to and connect by frequency tracking circuit 320
Receive circuit 310 and transmitting circuit 330.Receiving circuit 310 can obtain that the first train of signal 302 is with respect to above-mentioned transmission frequency
Frequency offset.For example, receiving circuit 310 be lasting receive the first train of signal 302, and sometime putting calculating
Difference between the frequency of one train of signal 302 and transmission frequency, therefore produces frequency offset.Receiving circuit 310 also can basis
This frequency offset, whether to judge the first train of signal 302 through a spread spectrum operation, therefore produces a judged result 308.
If the first train of signal 302 have passed through spread spectrum operation then it represents that the frequency of the first train of signal 302 can change over time.Therefore, when
When the absolute value of this frequency offset is bigger, represent that the first train of signal is more possible to have passed through spread spectrum operation.Receiving circuit 310 meeting
Will determine that result 308 sends transmitting circuit 330 to, and transmitting circuit 330 can be with judged result accordingly and clock pulse signal 306
Produce secondary signal string 312, and secondary signal string 312 is sent to host computer system 1000 or another electronic installation.Particularly
It is in adapter 102, to include quartz oscillator (crystal oscillator).
Fig. 4 is the partial block diagram of adapter 102 according to an exemplary embodiment.
Refer to Fig. 4, in the exemplary embodiment of Fig. 4, receiving circuit 310 includes frequency detector 410, clock pulses number
According to recovery (clock data recovery, hereinafter referred to as CDR) circuit 420 and spread spectrum detector 430.And frequency tracking is electric
Road 320 includes frequency tracking device 440 and clock pulse generating circuit 450.Clock pulse generating circuit 450 also includes phase-locked loop
452 with pulse reference clock generator 454.
Clock pulses data restoring circuit 420 is in order to recover data therein according to the first train of signal 302.Clock pulses
Data recovery circuit 420 is also in order to confirm whether the first train of signal 302 meets the specification of a transmission standard.For example, exist
(for example, minimum spread spectrum scope is 0～-4000ppm (Parts Per to limit the scope of spread spectrum operation in the specification of USB3.0
Million, 1/1000000th), and the spread spectrum scope of maximum is 0～-5000ppm).Clock pulses data restoring circuit 420 meeting
Whether the frequency judging the first train of signal 302 is beyond above-mentioned scope.
Frequency detector 410 is the frequency constantly detecting the first train of signal 302, and detects the first train of signal
Difference between the frequency of 302 frequency and clock pulse signal 306.In this exemplary embodiment, this difference is frequency letter
Breath 304, and frequency detector 410 can send frequency information 304 to frequency tracking device 440.
Frequency tracking device 440 can detect an average frequency of the first train of signal 302 according to frequency information 304, and sentences
Break in a very first time interval, whether this average frequency is all in the middle of a mobility scale.For example, this mobility scale is
300ppm, and very first time interval can be any number, the present invention is simultaneously not subject to the limits.If in very first time interval, this puts down
All in the middle of mobility scale, then frequency tracking device 440 can set this average frequency as the transmitting pin of the first train of signal 302 to all frequencies
Rate.Refer to Fig. 5, transverse axis is the time, and its unit is microsecond (microsecond, hereinafter referred to as μ s)；The longitudinal axis is data transfer rate
(data rate), also referred to as frequency, here is represented with ppm.In exemplary embodiment shown in Fig. 5, the first train of signal 302 warp
Cross a spread spectrum operation, its scope is 0～-5000ppm.And frequency tracking device 440 can track transmission frequency 502.In detail
For, unit interval (unit interval, hereinafter referred to as UI) is the inverse of a standard frequency.For example, if host computer system
Between 1000 and memory storage apparatus 100, the standard frequency of transmission is 5G Hz, then UI is the 1/5G second.Here, spread spectrum operation
Scope is 0～-5000ppm, and therefore the scope of UI can be UI～UI+5000ppm.Here represents the numerical value of frequency with UI, because
The frequency that this corresponds to UI below can repeat no more more than the frequency corresponding to UI+5000ppm.Exemplary embodiment in Fig. 5
In, transmission frequency 502 is UI+2500ppm.
Refer to back Fig. 4, frequency tracking device 440 can produce a control code 402 to clock pulse generating circuit 450.Ginseng
Examine gate generator 454 and can produce a pulse reference clock 404 to phase-locked loop 452.This clock pulse generating circuit
450 can be hartley (Hartley) agitator, Ke Bizi (Colpitts) agitator, carat general (Clapp) agitator, phase shift
(phase-shift) agitator, RC agitator, LC agitator or other be not quartz oscillator agitator.
Phase-locked loop 452 is in order to correct, according to control code 402, the clock pulses that clock pulse generating circuit 450 produces,
And revise it for a more accurate clock pulse signal 306, and the frequency of this clock pulse signal 306 is transmission frequency.
However, one skilled in the art is it should be appreciated that the operation of phase-locked loop 452, here just repeats no more.
Spread spectrum detector 430 is in order to judge whether the first train of signal 302 have passed through spread spectrum according to clock pulse signal 306
Operation.In an exemplary embodiment, spread spectrum detector 430 can calculate frequency and the biography of some time point the first train of signal 302
Difference between defeated frequency is with as a frequency offset.Spread spectrum detector 430 can judge whether this frequency offset meets one
Individual first marginal value.If this frequency offset meets the first marginal value, spread spectrum detector 430 can judge the first train of signal 302
Have passed through spread spectrum operation.For example, as shown in fig. 6, the first marginal value is difference (its value of frequency 602 and transmission frequency 502
For positive number), and frequency offset 604 can be more than this first marginal value.Therefore, spread spectrum detector 430 can judge the first train of signal
302 have passed through spread spectrum operation.It should be noted that actually transmission frequency 502 first can also be deducted the by spread spectrum detector 430
One marginal value to obtain frequency 602, and can judge the frequency of the first train of signal 302 whether less than frequency 602 to determine first
Whether train of signal 302 is through spread spectrum operation.On the other hand, after determination frequency side-play amount 606 is more than this first marginal value, expand
Frequency detector 430 also can judge that the first train of signal 302 have passed through spread spectrum operation.In the same manner, in implementation, spread spectrum detector 430 also may be used
First transmission frequency 502 is added the first marginal value to calculate frequency 608, and judge that the frequency of the first train of signal 302 is
No more than frequency 608 whether to determine the first train of signal 302 through spread spectrum operation.Here, " whether determination frequency side-play amount meets
First marginal value " may include above-mentioned various state, and the present invention is simultaneously not subject to the limits.Additionally, the present invention does not limit the first marginal value yet
Numerical value.
In another exemplary embodiment, spread spectrum detector 430 is the peak frequency (here first detecting the first train of signal 302
For UI) or minimum frequency (here is UI+5000ppm), then judge whether this peak frequency and the difference of transmission frequency 502 are more than
First marginal value, or whether the difference of minimum frequency and transmission frequency 502 is less than the first negative marginal value.Identical, implementation
Upper spread spectrum detector 430 can also judge whether peak frequency is more than frequency 608, or whether minimum frequency is less than frequency
602, therefore judge whether the first train of signal 302 have passed through spread spectrum operation.
Fig. 7 is the schematic diagram judging whether according to an exemplary embodiment through spread spectrum operation.
Refer to Fig. 7, in the exemplary embodiment of Fig. 7, spread spectrum detector 430 is cumulative in second time interval
Frequency offset is to produce a cumulative frequency difference value.Spread spectrum detector 430 can judge whether this cumulative frequency difference value accords with
Unification the second marginal value.If this cumulative frequency difference value meets the second marginal value, spread spectrum detector 430 can judge the first letter
Number string 302 have passed through spread spectrum operation.For example, spread spectrum detector 430 meeting cumulative frequency side-play amount in time interval 702,
And the cumulative frequency difference value calculating is represented by the area in region 704.If the area in region 704 is more than the second marginal value,
Then spread spectrum detector 430 can judge that the first train of signal 302 have passed through spread spectrum operation.Or, spread spectrum detector 430 can also when
Between cumulative frequency side-play amount in interval 706, and the cumulative frequency difference value calculating is represented by the area in region 708.However,
The present invention is not intended to limit the scope of the second time interval, does not also limit the numerical value of the second marginal value.
Refer to back Fig. 4, spread spectrum detector 430 has judged that the first train of signal 302, whether after spread spectrum operation, can pass
Send judged result 308 to transmitting circuit 330.And, the clock pulses of pulse reference clock is corrected using the first train of signal 302
Produce circuit 450 and may know that followed the trail of transmission frequency corresponds to UI or UI+2500ppm.Consequently, it is possible to transmitting circuit
330 will appreciate how to produce secondary signal string 312 according to the transmission frequency being tracked.It should be noted that in another model
In example embodiment, secondary signal string 312 not necessarily can be through spread spectrum operation.Transmitting circuit 330 can be determined according to a control signal
Determine whether will carry out spread spectrum operation to secondary signal string 312, and this control signal can be according to secondary signal string 312 mesh to be transmitted
The interface on ground, function or host computer system 1000 and determine.In other words, transmitting circuit 330 also can judge the second transmitted letter
Number string 312 spread spectrum operation whether to be carried out, therefore in different situations produce secondary signal string 312.
Specifically, transmitting circuit 330 is intended to for a data signal string to be converted to secondary signal string 312, and by second
Train of signal 312 sends host computer system 1000 to.If the first train of signal 302 is not through spread spectrum operation, and secondary signal string 312 does not have
There is spread spectrum operation to be carried out, then transmitting circuit 330 can will meet the data signal string of transmission frequency according to clock pulse signal 306
As secondary signal string 312.If the first train of signal 302 is not through spread spectrum operation, but secondary signal string 312 will carry out spread spectrum behaviour
Make, then transmitting circuit 330 can execute spread spectrum operation to produce according to an adjustment signal to the data signal string meeting transmission frequency
Raw secondary signal string 312.
Fig. 8 A and Fig. 8 B is the schematic diagram producing secondary signal string according to an exemplary embodiment.
Refer to Fig. 8 A, if the first train of signal 302 has through spread spectrum operation, and secondary signal string 312 will carry out spread spectrum behaviour
Make, then data signal string 802 can be changed to compensation frequency 804 by transmitting circuit 330 from transmission frequency 502.Transmitting circuit 330 meeting
Downward spread spectrum operation is carried out to produce the second letter to meeting the data signal string 802 compensating frequency 804 according to an adjustment signal
Number string 312.Here, compensate frequency 804 can be more than transmission frequency 502, and the scope of downward spread spectrum operation is 0～-5000ppm
(corresponding to UI～UI+5000ppm).However, in other exemplary embodiment, this downward spread spectrum operation can have other scopes,
The present invention is simultaneously not subject to the limits.
If the first train of signal 302 has through spread spectrum operation, but secondary signal string 312 must not carry out spread spectrum operation, then transmit
Transmission frequency 502 can also changed to after compensate frequency 804 by circuit 330, will meet the data signal compensating frequency 804
String 802 is as secondary signal string 312.
Refer to Fig. 8 B, in another exemplary embodiment, if the first train of signal 302 has through spread spectrum operation, and the second letter
Number string 312 spread spectrum operation to be carried out, then transmitting circuit 330 can according to one adjustment signal to meet transmission frequency 502 data believe
Number string 806 implementation center's spread spectrum operation to produce secondary signal string.In this exemplary embodiment, the scope of center spread spectrum operation
It is -2500ppm～2500ppm, but the present invention not subject to the limits.Even if consequently, it is possible to there is no quartz oscillation in adapter 102
Device, adapter 102 can also have according to transmission frequency 502 through spread spectrum operation or not through the second letter of spread spectrum operation
Number string 312.
Fig. 9 is the flow chart of signal processing method according to an exemplary embodiment.
Refer to Fig. 9, in step S902, receive the first train of signal from host computer system.In step S904, follow the trail of
One transmission frequency of the first train of signal, and obtain the frequency offset that the first train of signal is with respect to this transmission frequency.In step
In S906, according to frequency offset judge the first train of signal whether through a spread spectrum operation to produce a judged result.In step
In S908, a secondary signal string is produced with transmission frequency according to this judged result, and transmits secondary signal string to host computer system
Or another electronic installation.However, each step has described in detail as above in Fig. 9, here is not just repeating.It should be noted that Fig. 9
In each step can be used as multiple procedure codes or circuit, the present invention is simultaneously not subject to the limits.Additionally, the method for Fig. 9 can arrange in pairs or groups with
, using it is also possible to be used alone, the present invention is simultaneously not subject to the limits for upper exemplary embodiment.
In sum, exemplary embodiment of the present invention proposes signal processing method, adapter and memory storage apparatus, can
To judge the train of signal being derived from host computer system whether through spread-spectrum signal in the case of there is no quartz oscillator.And, according to
The result judging and the transmission frequency tracking, the train of signal sending host computer system to can meet a transmission standard.
Finally it should be noted that：Various embodiments above only in order to technical scheme to be described, is not intended to limit；To the greatest extent
Pipe has been described in detail to the present invention with reference to foregoing embodiments, it will be understood by those within the art that：Its according to
So the technical scheme described in foregoing embodiments can be modified, or wherein some or all of technical characteristic is entered
Row equivalent；And these modifications or replacement, do not make the essence of appropriate technical solution depart from various embodiments of the present invention technology
The scope of scheme.
Claims (18)
1. a kind of signal processing method, for a connector it is characterised in that this adapter does not include a quartz oscillator, should
Signal processing method includes：
Receive one first train of signal from a host computer system；
Follow the trail of a transmission frequency of this first train of signal, and obtain the frequency that this first train of signal is with respect to this transmission frequency
Side-play amount；
According to this frequency offset judge this first train of signal whether through a spread spectrum operation to produce a judged result；And
One secondary signal string is produced with this transmission frequency according to this judged result,
The step wherein following the trail of this transmission frequency of this first train of signal includes：
Persistently detect an average frequency of this first train of signal；
Judge that this average frequency is whether in a mobility scale in a very first time interval；And
If this average frequency, all in this mobility scale, sets this average frequency as this transmitting pin in this very first time interval
Rate.
2. signal processing method according to claim 1 is it is characterised in that judge this first letter according to this frequency offset
Whether number string includes through the step of this spread spectrum operation：
Judge whether this frequency offset meets one first marginal value；And
If this frequency offset meets this first marginal value, judge that this first train of signal passes through this spread spectrum operation.
3. signal processing method according to claim 2 is it is characterised in that this frequency offset is this first train of signal
One peak frequency and the difference of this transmission frequency, or the difference of the minimum frequency for this first train of signal and this transmission frequency.
4. signal processing method according to claim 1 is it is characterised in that judge this first letter according to this frequency offset
Whether number string includes through the step of this spread spectrum operation：
Add up this frequency offset to produce a cumulative frequency difference value in one second time interval；
Judge whether this cumulative frequency difference value meets one second marginal value；And
If this cumulative frequency difference value meets this second marginal value, judge that this first train of signal passes through this spread spectrum operation.
5. signal processing method according to claim 1 is it is characterised in that produce with this transmission frequency according to this judged result
The step of this secondary signal string raw includes：
If this first train of signal is through this spread spectrum operation, according to an adjustment signal to the data signal meeting this transmission frequency
String execution one center spread spectrum operation is to produce this secondary signal string.
6. signal processing method according to claim 1 is it is characterised in that produce with this transmission frequency according to this judged result
The step of this secondary signal string raw includes：
If this first train of signal is through this spread spectrum operation, a data signal string is changed from this transmission frequency and compensates frequency to one
Rate, wherein this compensation frequency are more than this transmission frequency；
According to an adjustment signal this data signal string meeting this compensation frequency is carried out a downward spread spectrum operation with produce this
Binary signal string.
7. a kind of adapter, this adapter does not include a quartz oscillator it is characterised in that this adapter includes：
One receiving circuit, in order to receive one first train of signal from a host computer system；
One frequency tracking circuit, is electrically connected to this receiving circuit, in order to follow the trail of a transmission frequency of this first train of signal；And
One transmitting circuit, is electrically connected to this receiving circuit and this frequency tracking circuit,
Wherein, this receiving circuit is in order to obtain the frequency offset that this first train of signal is with respect to this transmission frequency, and root
According to this frequency offset judge this first train of signal whether through a spread spectrum operation to produce a judged result,
Wherein, this transmitting circuit is in order to produce a secondary signal string, wherein, this frequency according to this judged result with this transmission frequency
The operation following the trail of this transmission frequency that circuit follows the trail of this first train of signal includes：
This frequency tracking device persistently detects an average frequency of this first train of signal, and judges in a very first time interval,
Whether this average frequency is in a mobility scale；And
If all in this mobility scale, this frequency tracking device sets this average frequency to this average frequency in this very first time interval
For this transmission frequency.
8. adapter according to claim 7 is it is characterised in that this receiving circuit includes a spread spectrum detector, this reception
According to this frequency offset, circuit judges that whether this first train of signal includes through the operation of this spread spectrum operation：
This spread spectrum detector judges whether this frequency offset meets one first marginal value；And
If this frequency offset meets this first marginal value, this spread spectrum detector judges that this first train of signal passes through this spread spectrum and grasps
Make.
9. adapter according to claim 8 is it is characterised in that this frequency offset is a maximum of this first train of signal
Frequency and the difference of this transmission frequency, or the difference of the minimum frequency for this first train of signal and this transmission frequency.
10. adapter according to claim 7 is it is characterised in that this receiving circuit includes a spread spectrum detector, this reception
According to this frequency offset, circuit judges that whether this first train of signal includes through the operation of this spread spectrum operation：
This spread spectrum detector adds up this frequency offset to produce a cumulative frequency difference value in one second time interval；
This spread spectrum detector judges whether this cumulative frequency difference value meets one second marginal value；And
If this cumulative frequency difference value meets this second marginal value, this spread spectrum detector judges that this first train of signal passes through this spread spectrum
Operation.
11. adapters according to claim 7 are it is characterised in that this transmitting circuit is according to this judged result and this transmission
The operation that frequency produces this secondary signal string includes：
If this first train of signal is through this spread spectrum operation, this transmitting circuit is according to an adjustment signal to meeting this transmission frequency
One data signal string executes a center spread spectrum operation to produce this secondary signal string.
12. adapters according to claim 7 are it is characterised in that this transmitting circuit is according to this judged result and this transmission
The operation that frequency produces this secondary signal string includes：
If this first train of signal is through this spread spectrum operation, this transmitting circuit by a data signal string from this transmission frequency change to
One compensation frequency, wherein this compensation frequency is more than this transmission frequency；And
This transmitting circuit carries out a downward spread spectrum operation according to an adjustment signal to this data signal string meeting this compensation frequency
To produce this secondary signal.
A kind of 13. memory storage apparatus are it is characterised in that include：
One reproducible nonvolatile memorizer module, including multiple entity erased cell；
One Memory Controller, is electrically connected to this reproducible nonvolatile memorizer module；And
A connector, is electrically connected to this Memory Controller, is electrically connected to a host computer system, and wherein this adapter is not
Including a quartz oscillator, this adapter includes：
One receiving circuit, in order to receive one first train of signal from this host computer system；
One frequency tracking circuit, is electrically connected to this receiving circuit, in order to follow the trail of a transmission frequency of this first train of signal；And
One transmitting circuit, is electrically connected to this receiving circuit and this frequency tracking circuit,
Wherein, this receiving circuit is in order to obtain the frequency offset that this first train of signal is with respect to this transmission frequency, and root
According to this frequency offset judge this first train of signal whether through a spread spectrum operation to produce a judged result,
Wherein, this transmitting circuit is in order to produce a secondary signal string, wherein, this frequency according to this judged result with this transmission frequency
The operation following the trail of this transmission frequency that circuit follows the trail of this first train of signal includes：
This frequency tracking device persistently detects an average frequency of this first train of signal, and judges in a very first time interval,
Whether this average frequency is in a mobility scale；And
If all in this mobility scale, this frequency tracking device sets this average frequency to this average frequency in this very first time interval
For this transmission frequency.
14. memory storage apparatus according to claim 13 are it is characterised in that this receiving circuit includes a spread spectrum detection
Device, according to this frequency offset, this receiving circuit judges that whether this first train of signal includes through the operation of this spread spectrum operation：
This spread spectrum detector judges whether this frequency offset meets one first marginal value；And
If this frequency offset meets this first marginal value, this spread spectrum detector judges that this first train of signal passes through this spread spectrum and grasps
Make.
15. memory storage apparatus according to claim 14 are it is characterised in that this frequency offset is this first signal
The difference an of peak frequency and this transmission frequency of string, or the minimum frequency for this first train of signal and this transmission frequency it
Difference.
16. memory storage apparatus according to claim 13 are it is characterised in that this receiving circuit includes a spread spectrum detection
Device, according to this frequency offset, this receiving circuit judges that whether this first train of signal includes through the operation of this spread spectrum operation：
This spread spectrum detector adds up this frequency offset to produce a cumulative frequency difference value in one second time interval；
This spread spectrum detector judges whether this cumulative frequency difference value meets one second marginal value；And
If this cumulative frequency difference value meets this second marginal value, this spread spectrum detector judges that this first train of signal passes through this spread spectrum
Operation.
17. memory storage apparatus according to claim 13 are it is characterised in that this transmitting circuit is according to this judged result
The operation producing this secondary signal string with this transmission frequency includes：
If this first train of signal is through this spread spectrum operation, this transmitting circuit is according to an adjustment signal to meeting this transmission frequency
One data signal string executes a center spread spectrum operation to produce this secondary signal string.
18. memory storage apparatus according to claim 13 are it is characterised in that this transmitting circuit is according to this judged result
The operation producing this secondary signal string with this transmission frequency includes：
If this first train of signal is through this spread spectrum operation, this transmitting circuit by a data signal string from this transmission frequency change to
One compensation frequency, wherein this compensation frequency is more than this transmission frequency；And
This transmitting circuit carries out a downward spread spectrum operation according to an adjustment signal to this data signal string meeting this compensation frequency
To produce this secondary signal string.
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| CN201310056502.1A CN104008071B (en) | 2013-02-22 | 2013-02-22 | Signal processing method, adapter and memory storage apparatus |
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| CN201310056502.1A CN104008071B (en) | 2013-02-22 | 2013-02-22 | Signal processing method, adapter and memory storage apparatus |
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| CN1972365A (en) * | 2005-11-25 | 2007-05-30 | 夏普株式会社 | Image processing apparatus, image reading apparatus, and image forming apparatus |
| TW200811875A (en) * | 2006-08-21 | 2008-03-01 | Realtek Semiconductor Corp | A memory card reader controller with spread spectrum clock |
| US8139702B1 (en) * | 2004-09-29 | 2012-03-20 | Pmc-Sierra, Inc. | Clock and data recovery locking technique for large frequency offsets |
| TW201239621A (en) * | 2011-03-31 | 2012-10-01 | Phison Electronics Corp | Reference frequency setting method, memory controller and flash memory storage apparatus |
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2013
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8139702B1 (en) * | 2004-09-29 | 2012-03-20 | Pmc-Sierra, Inc. | Clock and data recovery locking technique for large frequency offsets |
| CN1972365A (en) * | 2005-11-25 | 2007-05-30 | 夏普株式会社 | Image processing apparatus, image reading apparatus, and image forming apparatus |
| TW200811875A (en) * | 2006-08-21 | 2008-03-01 | Realtek Semiconductor Corp | A memory card reader controller with spread spectrum clock |
| TW201239621A (en) * | 2011-03-31 | 2012-10-01 | Phison Electronics Corp | Reference frequency setting method, memory controller and flash memory storage apparatus |
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