CN103984650A - Method for simulating memory ECC (error checking and correcting) ERROR generation device - Google Patents

Method for simulating memory ECC (error checking and correcting) ERROR generation device Download PDF

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Publication number
CN103984650A
CN103984650A CN201410204618.XA CN201410204618A CN103984650A CN 103984650 A CN103984650 A CN 103984650A CN 201410204618 A CN201410204618 A CN 201410204618A CN 103984650 A CN103984650 A CN 103984650A
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China
Prior art keywords
signal
error
ecc
gnd
switch
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Pending
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CN201410204618.XA
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Chinese (zh)
Inventor
刘胜
康艳丽
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Inspur Electronic Information Industry Co Ltd
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Inspur Electronic Information Industry Co Ltd
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Priority to CN201410204618.XA priority Critical patent/CN103984650A/en
Publication of CN103984650A publication Critical patent/CN103984650A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a method for simulating a memory ECC (error checking and correcting) ERROR generation device. The method comprises the steps of selecting one bit from a 64-bit data signal and performing switch switching action on hardware by a switching card, wherein two ends of the switch are respectively connected with a DQ signal and a GND signal, when the DG and GND are short-circuited after the switch is switched, manually manufacturing a signal to transmit the signal to identify that whether a main board has the ECC function or not. By the method, the ECC error can be generated by simulation, and the detection capacity of a main board platform BIOS on the error can be examined.

Description

A kind of method of emulated memory ECC ERROR generating means
Technical field
The present invention relates to a kind of method of emulated memory ECC ERROR generating means.
Technical background
ECC is writing a Chinese character in simplified form of " Error Checking and Correcting ", and Chinese is " bug check and correction ".ECC is the technology of a kind of can realization " bug check and correction ", and ECC internal memory is exactly the internal memory of having applied this technology, is generally applied on server and graphics workstation more, and this will make whole computer system when work, more be tending towards safety and stability.
Internal memory is a kind of electron device, there will be unavoidably mistake, and for the high user of stability requirement, EMS memory error may cause fatefulue problem in its course of work.EMS memory error also can be divided into hard error and soft error according to its reason.Hard error is to cause due to the infringement of hardware or defect, so data are always incorrect; Soft error is random appearance, such as occurring suddenly that near internal memory the factors such as electronic interferences all may cause the generation of internal memory soft error.
In internal memory, with each byte in the internal memory of " parity checking ", do not only have 8, if mistake has been stored out in its a certain position, will make the corresponding data of wherein storing change and cause application program to make a mistake.And additionally increased by one and be used for carrying out error-detecting with each byte of interior existence (8) of " parity checking " is outer.
When CPU returns to the data that read storage, it can be added the data of storage in first 8 again, and whether result of calculation is consistent with check bit.When CPU finds that the two is different, just attempt to correct these mistakes, Parity function can only detect mistake and cannot revise it, although the probability that dibit makes a mistake is quite low simultaneously simultaneously, but parity checking cannot detect double bit error.
When data volume is very large, the probability that data are made mistakes is also just larger, for the odd-even check that can only detect single bit mistake, just seem unable to do what one wishes, based on such a case, a kind of new memory techniques is assented and has been given birth to, Here it is ECC(bug check and correction), this technology is also that additional check bit realizes in original data bit.What it was different from Parity is if data bit is 8, needs to increase by 5 and carries out ECC bug check and correction, and data bit often doubles, and ECC only increases by a bit trial position.In a word, in internal memory, ECC can allow mistake, and can be by error correction, make system be continued normal operation, not reason mistake and interrupting, and ECC has the ability of verify check, and the error bit that Parity cannot be able to be checked is out found and by error correction.
ECC type of error:
1. hard failure, referring to has physics Cell to lose efficacy in memory grain really, and phenomenon of the failure is easier to reproduction.
Means of testing:
ATE equipment à in theory can 100% catches failure of removal, but due to the Pattern limited amount of testing of equipment, thus some fault may grab less than;
Mainboard test à is in theory as long as the Pattern storehouse of mainboard testing software is enough abundant, and this type of hard failure fault is can catch; (some this type of fault needs special Pattern just can test fail)
2.?Soft?Failure:
Soft failure, refers to once find that there is inefficacy, but its failure phenomenon is difficult to copy, and may need burn-in test for a long time just can copy phenomenon of the failure.
Mainboard test: problems may be because client platform is in long-time ageing process, due to a variety of causes (when aging memory grain part once in a while temperature heat up) once reporting an error and causing once in a while, but be difficult to copy failure phenomenon, by us, be judged to be NTF strip sometimes.This type of fault copies needs (some need to spend time-of-week one or two) burn-in test of sufficiently long test duration to copy phenomenon.
Summary of the invention
The technical problem to be solved in the present invention is: a kind of method of emulated memory ECC ERROR generating means.
The technical solution adopted in the present invention is:
A kind of method of emulated memory ECC ERROR generating means, choose in 64 bit data signals, by adapter, on hardware, carry out switching over action, switch ends connects respectively DQ signal and GND signal, after switching over, cause DQ and GND short circuit, the artificial signal of manufacturing transmits error, to differentiate whether mainboard end has ECC function.
Corresponding DQ signal and GND signal can find according to golden finger pin sequence number.
There is an adapter in emulated memory ECC ERROR, on described adapter, is provided with change-over switch, and switch ends connects respectively DQ signal and GND signal, causes DQ and GND short circuit after switching over.
Beneficial effect of the present invention is: by method provided by the present invention, can simulate and produce ECC error, check mainboard platform BIOS is for the Detection capability of error.
Accompanying drawing explanation
Fig. 1 is that Parity and ECC checking need the data bits table increasing.
Embodiment
Below with reference to embodiment, by embodiment, the present invention is further described:
Embodiment 1:
A kind of method of emulated memory ECC ERROR generating means, choose in 64 bit data signals, by adapter, on hardware, carry out that switching over action----switch ends connects respectively DQ signal and GND signal, after switching over, cause DQ and GND short circuit, the artificial signal of manufacturing transmits error, to differentiate whether mainboard end has ECC function.
For example, the string signal being sent by this IO of controller be 10101101, after artificial switch short circuit, signal is for continuing low level 00000000, if main board system has ECC function like this, can automatically carry out this error identification and error correction, and reflect in PMC.If mainboard do not have ECC function system may cause deadlock or other faults because of switching over for this reason, and be reflected in PMC system.
Embodiment 2:
On the basis of embodiment 1, the corresponding DQ signal of the present embodiment and GND signal can find according to golden finger pin sequence number.
Embodiment 3:
There is an adapter in emulated memory ECC ERROR, on described adapter, is provided with change-over switch, and switch ends connects respectively DQ signal and GND signal, causes DQ and GND short circuit after switching over.

Claims (3)

1. the method for an emulated memory ECC ERROR generating means, it is characterized in that: choose in 64 bit data signals, by adapter, on hardware, carry out switching over action, switch ends connects respectively DQ signal and GND signal, after switching over, cause DQ and GND short circuit, the artificial signal of manufacturing transmits error, to differentiate whether mainboard end has ECC function.
2. the method for a kind of emulated memory ECC ERROR generating means according to claim 1, is characterized in that: according to golden finger pin sequence number, find corresponding DQ signal and GND signal short circuit.
3. there is adapter in a kind of emulated memory ECC ERROR according to claim 1 and 2, it is characterized in that: on described adapter, be provided with change-over switch, switch ends connects respectively DQ signal and GND signal, causes DQ and GND short circuit after switching over.
CN201410204618.XA 2014-05-15 2014-05-15 Method for simulating memory ECC (error checking and correcting) ERROR generation device Pending CN103984650A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410204618.XA CN103984650A (en) 2014-05-15 2014-05-15 Method for simulating memory ECC (error checking and correcting) ERROR generation device

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Application Number Priority Date Filing Date Title
CN201410204618.XA CN103984650A (en) 2014-05-15 2014-05-15 Method for simulating memory ECC (error checking and correcting) ERROR generation device

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CN103984650A true CN103984650A (en) 2014-08-13

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104268052A (en) * 2014-10-21 2015-01-07 浪潮电子信息产业股份有限公司 Memory Rank Spare testing method based on ITP tool
CN105551526A (en) * 2015-12-08 2016-05-04 浪潮电子信息产业股份有限公司 Method for detecting RAID card memory particle yield rate by sending specific test data

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101211292A (en) * 2006-12-29 2008-07-02 佛山市顺德区顺达电脑厂有限公司 System memory error detection and correcting function verification system and method
CN103427195A (en) * 2012-05-23 2013-12-04 立讯精密工业(昆山)有限公司 Electric connector assembly

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101211292A (en) * 2006-12-29 2008-07-02 佛山市顺德区顺达电脑厂有限公司 System memory error detection and correcting function verification system and method
CN103427195A (en) * 2012-05-23 2013-12-04 立讯精密工业(昆山)有限公司 Electric connector assembly

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104268052A (en) * 2014-10-21 2015-01-07 浪潮电子信息产业股份有限公司 Memory Rank Spare testing method based on ITP tool
CN104268052B (en) * 2014-10-21 2016-02-03 浪潮电子信息产业股份有限公司 A kind of Memory Rank Spare method of testing based on ITP instrument
CN105551526A (en) * 2015-12-08 2016-05-04 浪潮电子信息产业股份有限公司 Method for detecting RAID card memory particle yield rate by sending specific test data
CN105551526B (en) * 2015-12-08 2019-09-06 浪潮电子信息产业股份有限公司 A method of by sending fc-specific test FC Data Detection RAID card memory grain yield

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