CN103973142A - On-chip full-synchronous bridge rectifier structure of wireless power transmission chip and circuit - Google Patents
On-chip full-synchronous bridge rectifier structure of wireless power transmission chip and circuit Download PDFInfo
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Abstract
The invention discloses an on-chip full-synchronous bridge rectifier structure of a wireless power transmission chip and a circuit. The on-chip full-synchronous bridge rectifier structure comprises a power module, a detection module, a logic module and a drive module. The on-chip full-synchronous bridge rectifier structure is suitable for not only wireless power transmission but also traditional portable products and novel portable products. The on-chip full-synchronous bridge rectifier structure has the advantages that the integration level is high, cost is low, the size of a scheme is reduced, and efficiency is improved.
Description
Technical field
The present invention relates to a kind of bridge rectifier, relate in particular to a kind of wireless power transmission, relate in particular to complete synchronous bridge rectifier in chip.
Background technology
Along with the high speed development of modernization and technicalization, various electronic equipments are widely used in the people's life production.Along with the power consumption of portable product increases and the multifarious present situation of portable product charging modes, it is portable that traditional charging technique more and more can not meet people, at any time the requirement of charging.The appearance of wireless charging has solved this problem, along with the maturation of wireless charging agreement and correlation technique, and be progressively widely applied in the portable product of small volume, wireless charging type power management scheme efficient, high integration will become the main flow of future market.But the cost of wireless charging, volume and efficiency become insoluble problem.
Wireless power transmission is made up of transmitting terminal and receiving terminal.Transmitting terminal and receiving terminal respectively have a coil, and transmitting terminal converts alternating current to alternating magnetic field by coil, is transmitted into space.When the magnetic line of force of alternating magnetic field is through the coil of receiving terminal, alternating magnetic field is converted to alternating electric field by the coil of receiving terminal, produces induced electromotive force, for load.So first wireless charging scheme will be converted to alternating voltage direct voltage (AC/DC) in coil rear class.
Traditional AC/DC circuit as shown in Figure 1,
It comprises diode 100, diode 101, diode 102, diode 103, electric capacity 104.Node 110 and node 111 are alternating current input, and node 112 is VD.105 is load.
When node 110 voltages are during higher than node 112 voltage, electric current from node 110 by diode 102, load 105, diode 101 flows to node 111, forms current circuit.Node 112 is node 110 crest voltages.
When node 111 voltages are during higher than node 112 voltage, electric current from node 111 by diode 103, load 105, diode 100 flows to node 110, forms current circuit.Node 112 is node 111 crest voltages.
At node 110 and node 111, during all lower than node 112 voltage, node 112 voltages are maintained by electric capacity 104, power to load 105.
In the scheme of above-mentioned prior art, there is defect:
1, diode 100, diode 101, diode 102, diode 103 power losss are larger, and scheme efficiency is lower.
2, diode 100, diode 101, diode 102, diode 103, generally in chip exterior, takies PCB area, increases application cost.
Summary of the invention
The invention provides circuit framework and the circuit of complete synchronous bridge rectifier in a kind of wireless power transmission chip slapper, comprising power model, detection module, logic module, driver module.Utilize detection module, logic module detects the state of each N-type metal-oxide-semiconductor in power model, by the on off state of 4 N-type metal-oxide-semiconductors in driver module power ratio control module, reaches the object of rectification.
The present invention includes power model, detection module, logic module and driver module.Wherein,
Wireless power receiving node (alternating voltage input node) and direct voltage output node access power module and detection module, detection module is sent into these signals after four comparators, exports 4 signals to logic module.
Logic module is carried out 4 signals of detection module input after logical operation, exports 4 signals to driver module.
4 signal driver abilities that driver module is sent logic module are amplified and adjust to suitable power domain, output to power model, control the on off state of 4 N-type metal-oxide-semiconductors.
Brief description of the drawings
Fig. 1 is that traditional AC/DC realizes circuit.
Fig. 2 is integrated complete synchronous bridge rectifier circuit framework and circuit of chip internal of the present invention.
Fig. 3 is the operation principle schematic diagram of the integrated complete synchronous bridge rectifier circuit of chip internal of the present invention.
Embodiment
In order to make the clearer understanding of those skilled in the art technical scheme of the present invention, below in conjunction with accompanying drawing, its embodiment is described.
Scheme of the invention is as shown in Figure 2 by power model 201, detection module 202, and logic module 203, driver module 204 forms.
Wherein power model 201 is by N-type metal-oxide-semiconductor 231, N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233, N-type metal-oxide-semiconductor 234 forms, N-type metal-oxide-semiconductor 231, N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233, N-type metal-oxide-semiconductor 234 is respectively with parasitic diode 235, parasitic diode 236, parasitic diode 237, parasitic diode 238.
Detection module 202 is by comparator 240, comparator 241, comparator 242, comparator 243 forms, be respectively used to comparison node 110 and node 112 voltage height, comparison node 111 and node 112 voltages height, node 110 and reference ground (GND) voltage height, node 111 and reference ground (GND) voltage are just.
Logic module 203 is by the output signal of detection module 202, node 213, node 214, node 215, the signal of node 216 carries out logical operation processing, output signal node 217, node 218, node 219, node 220, represents respectively N-type metal-oxide-semiconductor 231, N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233, the control signal of N-type metal-oxide-semiconductor 234.
Driver module 204 is the output signal of logic module 203, node 217, node 218, node 219, the current driving ability of node 220 amplifies and adjusts to suitable power domain, output drive signal, node 221, node 222, node 223, node 224 is controlled respectively N-type metal-oxide-semiconductor 231, N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233, N-type metal-oxide-semiconductor 234.
In of the present invention, the operation principle of the circuit of complete synchronous bridge rectifier as shown in Figure 3.
As shown in Figure 3, node 110 voltages and node 111 voltages are alternating voltage, and relative voltage is height each other, and phase difference is 180 degree.Node 112 is output voltage, is VD.
When node 110 voltages rise, node 111 voltage drops, N-type metal-oxide-semiconductor 231 as shown in Figure 2, N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233, N-type metal-oxide-semiconductor 234 is closed condition.Due to N-type metal-oxide-semiconductor 231, the parasitic diode 235 of N-type metal-oxide-semiconductor 234 and the existence of parasitic diode 238, the voltage of node 110 can be higher than about node 112 voltage 0.7V (PN junction conducting voltage), node 111 voltages can lower than with reference to (GND) voltage 0.7V (PN junction conducting voltage) left and right.Now in detection module 202 shown in Fig. 2, comparator 240 and comparator 243 detect that respectively node 110 voltages are higher than node 112 voltages, node 111 voltages lower than with reference to (GND) voltage, send into logic module 203 by the node 213 shown in Fig. 2 and node 216 and carry out logical operation, open N-type metal-oxide-semiconductor 231, N-type metal-oxide-semiconductor 234, as shown in Figure 3 A moment.N-type metal-oxide-semiconductor 231, N-type metal-oxide-semiconductor 234 conduction impedances are less, now node 110 voltages are fixed near node 112, node 111 voltages be fixed on reference near (GND).Flow through N-type metal-oxide-semiconductor 231, the electric current of N-type metal-oxide-semiconductor 234 is sinusoidal wave half waveshape.
When flowing through as shown in Figure 3 N-type metal-oxide-semiconductor 231, the electric current of N-type metal-oxide-semiconductor 234 reduced to for 0 moment, in detection module 202, comparator 243 detects that node 111 is greater than reference (GND) as shown in Figure 2, send into logic module 203 by the node 216 shown in Fig. 2 and carry out computing, close N-type metal-oxide-semiconductor 231, N-type metal-oxide-semiconductor 234 is the B moment as shown in Figure 3.Now node 110 and node 111 current potentials are floating empty, 2 effects due to external inductors continuous current, and node 110 voltages float downwards, and node 111 voltages upwards float.
When node 111 voltages rise, node 110 voltage drops, N-type metal-oxide-semiconductor 231 as shown in Figure 2, N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233, N-type metal-oxide-semiconductor 234 is closed condition.Due to N-type metal-oxide-semiconductor 232, the parasitic diode 236 of N-type metal-oxide-semiconductor 233 and the existence of parasitic diode 237, the voltage of node 111 can be higher than about node 112 voltage 0.7V (PN junction conducting voltage), node 110 voltages can lower than with reference to (GND) voltage 0.7V (PN junction conducting voltage) left and right.Now in detection module 202 shown in Fig. 2, comparator 241 and comparator 242 detect that respectively node 111 voltages are higher than node 112 voltages, node 110 voltages lower than with reference to (GND) voltage, send into logic module 203 by the node 214 shown in Fig. 2 and node 215 and carry out computing, open N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233, as shown in Figure 3 C moment.N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233 conduction impedances are less, now node 111 voltages are fixed near node 112, node 110 voltages be fixed on reference near (GND).Flow through N-type metal-oxide-semiconductor 232, the electric current of N-type metal-oxide-semiconductor 233 is sinusoidal wave half waveshape.
When flowing through as shown in Figure 3 N-type metal-oxide-semiconductor 232, the electric current of N-type metal-oxide-semiconductor 233 reduced to for 0 moment, in detection module 202, comparator 242 detects that node 110 is greater than reference (GND) as shown in Figure 2, send into logic module 203 by the node 215 shown in Fig. 2 and carry out logical operation, close N-type metal-oxide-semiconductor 232, N-type metal-oxide-semiconductor 233 is the D moment as shown in Figure 3.Now node 110 and node 111 current potentials are floating empty, 2 effects due to external inductors continuous current, and node 111 voltages float downwards, and node 112 voltages upwards float.Circulate with this.
In sum, this invention can not only meet the requirement of AC/DC function, because impedance/Area Ratio diode of metal-oxide-semiconductor is high a lot, so in efficiency, cost aspect has outstanding advantage.
Certainly; the present invention also can have other various embodiments; in the situation that not deviating from spirit of the present invention and essence thereof; those of ordinary skill in the art are when making according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (10)
1. a circuit for complete synchronous bridge rectifier in wireless power transmission chip slapper, is characterized in that,
It comprises: power model (201), detection module (202), logic module (203) and driver module (204);
Wherein, alternating voltage input node and direct voltage output node access power module (201) and detection module (202), wherein alternating voltage input node comprises first node (110) and Section Point (111), and direct voltage output node is the 3rd node (112);
Detection module (202) is sent into these signals after four comparators, exports 4 signals to logic module (203);
Logic module (203) is carried out 4 signals of detection module (202) input after logical operation, exports 4 signals to driver module (204);
The driving force of 4 signals that driver module (204) is sent logic module (203) is amplified and is adjusted to suitable power domain, outputs to power model (201), controls the on off state of 4 N-type metal-oxide-semiconductors.
2. the circuit of complete synchronous bridge rectifier in as claimed in claim 1, is characterized in that,
Wherein power model (201) comprises the first N-type metal-oxide-semiconductor (231), the second N-type metal-oxide-semiconductor (232), the 3rd N-type metal-oxide-semiconductor (233), the 4th N-type metal-oxide-semiconductor (234); The first N-type metal-oxide-semiconductor (231), the second N-type metal-oxide-semiconductor (232), the 3rd N-type metal-oxide-semiconductor (233), the 4th N-type metal-oxide-semiconductor (234) is respectively with the first parasitic diode (235), the second parasitic diode (236), trixenie diode (237), the 4th parasitic diode (238), annexation is as follows: first output signal (221) of the grid termination driver module (204) of the first N-type metal-oxide-semiconductor (231), source connects first node (110), and drain terminal connects the 3rd node (112); Second output signal (222) of the grid termination driver module (204) of the second N-type metal-oxide-semiconductor (232), source connects Section Point (111), and drain terminal connects the 3rd node (112); The 3rd output signal (223) of the grid termination driver module (204) of the 3rd N-type metal-oxide-semiconductor (233), source connects reference (GND), and drain terminal connects first node (110); The 4th output signal (224) of the grid termination driver module (204) of the 4th N-type metal-oxide-semiconductor (234), source connects reference (GND), and drain terminal connects Section Point (111).
3. the circuit of complete synchronous bridge rectifier in as claimed in claim 1, is characterized in that,
Detection module (202) comprises the first comparator (240), the second comparator (241), the 3rd comparator (242), the 4th comparator (243), the first comparator (240), the second comparator (241), the 3rd comparator (242), the 4th comparator (243) is respectively used to comparison first node (110) and the 3rd node (112) voltage height, relatively Section Point (111) and the 3rd node (112) voltage height, relatively first node (110) and reference ground (GND) voltage height, relatively Section Point (111) and reference ground (GND) voltage height, output detections module (202) first output signals (213) simultaneously, detection module (202) second output signals (214), detection module (202) the 3rd output signal (215), detection module (202) the 4th output signal (216).
4. the circuit of complete synchronous bridge rectifier in as claimed in claim 1, is characterized in that,
Logic module (203) is by detection module (202) first output signals (213), detection module (202) second output signals (214), detection module (202) the 3rd output signal (215), detection module (202) the 4th output signal (216) is carried out after logical operation processing, output logic module (203) first output signals (217), logic module (203) second output signals (218), logic module (203) the 3rd output signal (219), logic module (203) the 4th output signal (220).
5. the circuit of complete synchronous bridge rectifier in as claimed in claim 1, is characterized in that,
Driver module (204) is by logic module (203) first output signals (217), logic module (203) second output signals (218), logic module (203) the 3rd output signal (219), the driving force of logic module (203) the 4th output signal (220) is amplified and is adjusted to suitable power domain, output driver module (204) first output signals (221) accordingly, driver module (204) second output signals (222), driver module (204) the 3rd output signal (223), driver module (204) the 4th output signal (224), power ratio control module (201) first N-type metal-oxide-semiconductors (231) respectively, the second N-type metal-oxide-semiconductor (232), the 3rd N-type metal-oxide-semiconductor (233), the grid end of the 4th N-type metal-oxide-semiconductor (234).
6. the circuit of complete synchronous bridge rectifier in as claimed in claim 2, it is characterized in that, in power model (201), first node 110 sources of access power module (201) first N-type metal-oxide-semiconductors (231) and the drain terminal of the 3rd N-type metal-oxide-semiconductor (233).Section Point 111 sources of access power module (201) second N-type metal-oxide-semiconductors (232) and the drain terminal of the 4th N-type metal-oxide-semiconductor (234).
7. the circuit of complete synchronous bridge rectifier in as claimed in claim 3, is characterized in that, in detection module (202), detects first node 110, Section Point 111, the three node 112 voltages and the size with reference to ground (GND).
8. the circuit of complete synchronous bridge rectifier in as claimed in claim 1, it is characterized in that, in logic module (203), by detection module (202) first output signals (213), detection module (202) second output signals (214), detection module (202) the 3rd output signal (215), detection module (202) the 4th output signal (216) is done logical operation, need to reach in one-period, first when first node (110) voltage higher than the 3rd node (112) voltage simultaneously Section Point (111) voltage lower than with reference to when (GND) voltage, logic module (203) first output signals (217) are set to " height " or " 1 " by logic module (203), logic module (203) second output signals (218) are set to " low " or " 0 ", logic module (203) the 3rd output signal (219) is set to " low " or " 0 ", logic module (203) the 4th output signal (220) is set to " height " or " 1 ", then when Section Point (111) voltage be just greater than with reference to when (GND), logic module (203) is by logic module (203) first output signals (217), logic module (203) second output signals (218), logic module (203) the 3rd output signal (219), logic module (203) the 4th output signal (220) is all set to " low " or " 0 ", then when Section Point (111) voltage higher than the 3rd node (112) voltage simultaneously first node (110) voltage lower than reference when (GND) voltage, logic module (203) first output signals (217) are set to " low " or " 0 " by logic module (203), logic module (203) second output signals (218) are set to " height " or " 1 " by logic module (203), logic module (203) the 3rd output signal (219) is set to " height " or " 1 ", logic module (203) the 4th output signal (220) is set to " low " or " 0 ", finally when first node (110) voltage be just greater than with reference to when (GND), logic module (203) is by logic module (203) first output signals (217), logic module (203) second output signals (218), logic module (203) the 3rd output signal (219), logic module (203) the 4th output signal (220) is all set to the function of " low " or " 0 ".
9. the circuit of complete synchronous bridge rectifier in as claimed in claim 1, it is characterized in that, the driving force of 4 signals that driver module (204) is sent logic module (203) is amplified and is adjusted to suitable power domain, output to power model (201), control the on off state of 4 N-type metal-oxide-semiconductors.
10. a control method for complete synchronous bridge rectifier in sheet, is characterized in that,
This rectifier comprises the circuit of the interior complete synchronous bridge rectifier of the sheet described in any one in the claims; Described method comprises the steps:
In one-period, when first node (110) voltage higher than the 3rd node (112) voltage simultaneously Section Point (111) voltage lower than with reference to (GND) voltage, in this situation, detection module (202) is understood testing result: detection module (202) first output signals (213), detection module (202) second output signals (214), detection module (202) the 3rd output signal (215), detection module (202) the 4th output signal (216) inputs to logic module (203), logic module (203) is after logical operation, logic module (203) first output signals (217) are set to " height " or " 1 ", logic module (203) second output signals (218) are set to " low " or " 0 ", logic module (203) the 3rd output signal (219) is set to " low " or " 0 ", logic module (203) the 4th output signal (220) is set to " height " or " 1 ",
Driver module (204) amplifies four output signal kinetic forces of detection module (203) and adjusts to suitable power domain, the grid terminal voltage of four N-type metal-oxide-semiconductors in power ratio control module (201), now, first output signal (221) of driver module (204) and the 4th output signal (224) are " height " or " 1 ", and second output signal (222) of driver module (204) and the 3rd output signal (223) are " low " or " 0 ";
In power model (201), the first N-type metal-oxide-semiconductor (231) and the 4th N-type metal-oxide-semiconductor (234) are opened, the second N-type metal-oxide-semiconductor (232) and the 3rd N-type metal-oxide-semiconductor (233) are closed, circuit closed loop forms, direction is to flow into from first node (110), flow to the 3rd node (112) through the first N-type metal-oxide-semiconductor (231), flow to reference to ground (GND) through external loading (103), through four N-type metal-oxide-semiconductors (234), finally flow out from Section Point (111) again;
In the time that size of current is kept to 0 gradually, be Section Point (111) voltage be just greater than with reference to when (GND), the output signal of the 4th comparator (243) of detection module (203) is overturn, the 4th output signal (216) that is detection module (202) is overturn, now, logic module (203) can be by logic module (203) first output signals (217), logic module (203) second output signals (218), logic module (203) the 3rd output signal (219), logic module (203) the 4th output signal (220) is all set to " low " or " 0 ", then after driver module (204), close four N-type metal-oxide-semiconductors (231 in power model (201), 232, 233, 234),
Then when Section Point (111) voltage higher than the 3rd node (112) voltage simultaneously first node (110) voltage lower than with reference to (GND) voltage, in this situation, detection module (202) is understood testing result: detection module (202) first output signals (213), detection module (202) second output signals (214), detection module (202) the 3rd output signal (215), detection module (202) the 4th output signal (216) inputs to logic module (203), logic module (203) is after logical operation, logic module (203) first output signals (217) are set to " low " or " 0 ", logic module (203) second output signals (218) are set to " height " or " 1 ", logic module (203) the 3rd output signal (219) is set to " height " or " 1 ", logic module (203) the 4th output signal (220) is set to " low " or " 0 ",
Driver module (204) amplifies four output signal kinetic forces of detection module (203) and adjusts to suitable power domain, the grid terminal voltage of four N-type metal-oxide-semiconductors in power ratio control module (201), now, first output signal (221) of driver module (204) and the 4th output signal (224) are " low " or " 0 ", second output signal (222) of driver module (204) and the 3rd output signal (223) are " height " or " 1 ", in power model (201), the first N-type metal-oxide-semiconductor (231) and four N-type metal-oxide-semiconductors (234) are closed, the second N-type metal-oxide-semiconductor (232) and the 3rd N-type metal-oxide-semiconductor (233) are opened, circuit closed loop forms, direction is to flow into from Section Point (111), flow to the 3rd node (112) through the second N-type metal-oxide-semiconductor (232), then passing through external loading (103) flows to reference to ground (GND), again through three N-type metal-oxide-semiconductors (233), finally flow out from first node (110),
In the time that size of current is kept to 0 gradually, be Section Point (110) voltage be just greater than with reference to when (GND), the output signal of the 3rd comparator (242) of detection module (203) is overturn, the 3rd output signal (215) that is detection module (202) is overturn, logic module (203) is by logic module (203) first output signals (217), logic module (203) second output signals (218), logic module (203) the 3rd output signal (219), logic module (203) the 4th output signal (220) is all set to " low " or " 0 ", then after driver module (204), close four N-type metal-oxide-semiconductors (231 in power model (201), 232, 233, 234),
In one-period, close four N-type metal-oxide-semiconductors (231) in power model (201), (232), and (233), (234) open and close once separately.
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| WO2018099118A1 (en) * | 2016-11-30 | 2018-06-07 | 无锡华润矽科微电子有限公司 | Synchronous rectification timing controller, wirelessly charging full-bridge synchronous rectification circuit and system |
| CN111355393A (en) * | 2020-05-09 | 2020-06-30 | 成都市易冲半导体有限公司 | Control method for highly adaptive synchronous rectification of wireless charging receiving end |
| WO2022178785A1 (en) * | 2021-02-25 | 2022-09-01 | 华为技术有限公司 | Rectifier and driving method and device therefor |
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| CN111355393A (en) * | 2020-05-09 | 2020-06-30 | 成都市易冲半导体有限公司 | Control method for highly adaptive synchronous rectification of wireless charging receiving end |
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| WO2022178785A1 (en) * | 2021-02-25 | 2022-09-01 | 华为技术有限公司 | Rectifier and driving method and device therefor |
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Application publication date: 20140806 |