CN103944438A - Rapid n-level multi-level inverter space vector pulse width modulation algorithm - Google Patents
Rapid n-level multi-level inverter space vector pulse width modulation algorithm Download PDFInfo
- Publication number
- CN103944438A CN103944438A CN201410175993.6A CN201410175993A CN103944438A CN 103944438 A CN103944438 A CN 103944438A CN 201410175993 A CN201410175993 A CN 201410175993A CN 103944438 A CN103944438 A CN 103944438A
- Authority
- CN
- China
- Prior art keywords
- level
- vector
- modulation algorithm
- space vector
- algorithm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
The invention discloses a rapid n-level multi-level inverter space vector pulse width modulation algorithm. According to the algorithm, the non-homogeneous linear equation system, mapped between a basic vector and switching state vectors, in the SVPWM algorithm is converted into the homogeneous equation system by establishing a constraint function under the specific conditions, the unique switching state vector corresponding to the basic vector under the specific constraint conditions can be obtained by solving the new homogeneous equation system, an appropriate switching state vector corresponding to the basic vector is prevented from being found in multiple redundant switching state vectors, and the switching state vector corresponding to the basic vector can be rapidly and accurately calculated. The n-level multi-level inverter SVPWM algorithm is simplified, and therefore the SVPWM algorithm is suitable for any n-level multi-level inverters, and the SVPWM algorithm can be easily popularized to be applied to the n-level multi-level inverters.
Description
Technical field
The present invention relates to cascaded multilevel inverter modulation field, refer in particular to one n level multi-electrical level inverter space vector modulation (being called for short SVPWM) algorithm fast.
Background technology
Voltage stress on cascaded multilevel inverter switching device is little, the degree of modularity is high, be easy to expansion and control, good reliability, harmonic wave of output voltage distortion factor is little, failure tolerant ability is strong, it realizes the conversion of high-power electric energy with low-voltage power electronic device, can be applicable in the high-power device such as the energy source regeneration apparatus such as high voltage direct current transmission, STATCOM and Active Power Filter-APF, photovoltaic generation and fuel cell power generation and the driving of high-power high voltage variable-frequency motor.
Space vector pulse width modulation (SVPWM) technology is Using Sinusoidal Pulse Width Modulation (SPWM) technology and directly a kind of PWM control technology of combination of motor flux chain circular trace, this modulation technique has the advantages such as direct voltage utilance is high, switching frequency is low, switching loss is little, about SVPWM technology is applied to cascaded multilevel inverter and has caused the close attention of Chinese scholars.
Current cascaded multilevel inverter SVPWM technology is nearly all to convert three-phase reference voltage to reference voltage vector in a certain specific two-dimensional coordinate system, then according to weber equilibrium principle, utilize the basic vector in two-dimensional coordinate to approach reference voltage vector, by calculating threephase switch state vector corresponding to basic vector in two dimensional surface coordinate system, with the output of threephase switch state vector control three-phase inverter, implementation space Vector Modulation.Calculating threephase switch state vector by basic vector is a Linear Equations, the solution of Linear Equations has infinite, consider the limited constraint of practical cascade inversion unit number, can obtain limited and separate, have the corresponding multiple switch state vectors of a basic vector (being called Redundanter schalter state vector).Due to the existence of Redundanter schalter state vector, in current practical application, space vector modulation algorithm is limited in three grades of following cascaded inverters.
The increase of counting n along with cascade inversion unit, the Redundanter schalter state vector quantity that basic vector is corresponding will increase greatly, and how from multiple switch state vectors, selecting quickly and accurately most suitable switch state vector is the key issue of cascaded multilevel inverter space vector modulation algorithm.
Summary of the invention
The object of the invention is the problems referred to above that exist for current n level multi-electrical level inverter space vector modulation algorithm, one n level multi-electrical level inverter space vector modulation algorithm is fast proposed, this algorithm does not need to calculate all switch state vectors that basic vector is corresponding, only on the basis of SVPWM algorithm definition, by building the method for constraint function, the Linear Equations of shining upon between basic vector and switch state vector in SVPWM algorithm is converted to homogeneous equation group, solve new homogeneous equation group, can obtain switch state vector corresponding to basic vector under particular constraints condition.This simplify of arithmetic cascaded multilevel inverter SVPWM algorithm, makes SVPWM algorithm be applicable to any n level multi-electrical level inverter.
For achieving the above object, technical scheme of the present invention is:
One is n level multi-electrical level inverter space vector modulation algorithm fast, comprises the following steps:
The first step, the basic vector of traditional SVPWM algorithm and the mapping function of switch state vector are:
Can find out from formula (1), it is upper that basic vector (α, β) is distributed in non-integer coordinates point, and because formula (1) is Linear Equations, switch state vector (a, b, c) exists redundancy.
Second step, change by rotation of coordinate, α, β Coordinate Conversion is α ', β ' coordinate, make basic vector be distributed in α ', the rounded coordinate point of β ' plane is upper, α ', basic vector under β ' coordinate (α ', β ') with the mapping function between switch state vector (a, b, c) be:
The 3rd step, according to the requirement of desired output voltage performance index and inverter performance, structure constraint function
f[a,b,c,Φ(t)]=C (3)
The 4th step, simultaneous constraint function and α ', the mapping function under β ' coordinate between basic vector and switch state vector obtains:
The 5th step, calculates according to the sampling number of one-period the switch state vector that each basic vector is corresponding.
Compared with prior art, such scheme of the present invention, only require structure constraint function according to desired output voltage performance index and inverter performance, simultaneous constraint function can calculate with mapping function unique switch state vector that each basic vector is corresponding, do not need to calculate Redundanter schalter state vector, simplify the workload of SVPWM algorithm, improved the speed of SVPWM algorithm.
Brief description of the drawings
Fig. 1 is implementation step flow chart of the present invention.
Embodiment
Taking three grade of seven electrical level inverter as example.α ', basic vector under β ' coordinate (α ', β ') with the mapping function between switch state vector (a, b, c) be:
The residual voltage minimum of desired output three-phase voltage, constraint function is:
Simultaneous formula (5) and (6) can obtain:
Solve formula (7) and can obtain unique switch state vector that any basic vector is corresponding.
Claims (6)
1. a n level multi-electrical level inverter space vector modulation algorithm fast, is characterized in that: the method for rapidly positioning of the switch state vector of the cascaded multilevel inverter space vector modulation algorithm based under rotating coordinate transformation and particular constraints function condition.
2. n level multi-electrical level inverter space vector modulation algorithm fast as claimed in claim 1, is characterized in that being all positioned at rounded coordinate point through basic vector in the new coordinate system of rotating coordinate transformation.
3. n level multi-electrical level inverter space vector modulation algorithm fast as claimed in claim 1, is characterized in that under new coordinate, the mapping function between basic vector and switch state vector is:
4. n level multi-electrical level inverter space vector modulation algorithm fast as claimed in claim 1, is characterized in that according to the requirement of inverter desired output voltage performance index and inverter performance structure constraint function f [a, b, c, Φ (t)]=C.
5. n level multi-electrical level inverter space vector modulation algorithm fast as claimed in claim 1, is characterized in that under new coordinate, the homogeneous equation group of mapping function and constraint function composition is:
6. n level multi-electrical level inverter space vector modulation algorithm fast as claimed in claim 1, it is characterized in that according to the homogeneous equation group of claim 5 can calculate any basic vector (α ', β ') corresponding unique switch state vector (a, b, c).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410175993.6A CN103944438B (en) | 2014-04-25 | 2014-04-25 | A kind of quickly n level multi-electrical level inverter space vector modulation algorithm |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410175993.6A CN103944438B (en) | 2014-04-25 | 2014-04-25 | A kind of quickly n level multi-electrical level inverter space vector modulation algorithm |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103944438A true CN103944438A (en) | 2014-07-23 |
CN103944438B CN103944438B (en) | 2017-01-04 |
Family
ID=51191966
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410175993.6A Expired - Fee Related CN103944438B (en) | 2014-04-25 | 2014-04-25 | A kind of quickly n level multi-electrical level inverter space vector modulation algorithm |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103944438B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112910298A (en) * | 2021-01-25 | 2021-06-04 | 南昌工程学院 | Minimum space vector modulation method for zero sequence voltage of cascaded multilevel converter |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7558089B2 (en) * | 2005-12-13 | 2009-07-07 | Advanced Energy Conversion, Llc | Method and apparatus for space vector modulation in multi-level inverters |
CA2663324A1 (en) * | 2009-04-20 | 2010-10-20 | Bin Wu | Digital multilevel modulation scheme for voltage converter having cascaded power cells |
CN101741274B (en) * | 2009-12-15 | 2012-05-30 | 哈尔滨工业大学 | Modulation method and implementation circuit for unit vector to carrying out time-delay superimposition of multi-level space vector |
CN103151946A (en) * | 2013-03-26 | 2013-06-12 | 上海交通大学 | Neutral point clamped/H-bridge five-level high voltage inverter and modulating method thereof |
CN203406795U (en) * | 2013-03-26 | 2014-01-22 | 上海交通大学 | Neutral point clamp/H bridge five-level high-voltage frequency converter |
-
2014
- 2014-04-25 CN CN201410175993.6A patent/CN103944438B/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112910298A (en) * | 2021-01-25 | 2021-06-04 | 南昌工程学院 | Minimum space vector modulation method for zero sequence voltage of cascaded multilevel converter |
Also Published As
Publication number | Publication date |
---|---|
CN103944438B (en) | 2017-01-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102570864B (en) | Online loss calculation method for modular multilevel converter | |
CN101789599A (en) | Electrical system and control method | |
CN104467005A (en) | T-type three-level three-phase four-bridge-arm grid-connected photovoltaic power generation system and control method thereof | |
CN103199682A (en) | Flexible direct current transmission current converter harmonic wave and loss computing method based on modular multilevel converter (MMC) | |
CN104533725A (en) | Wind power generation system | |
CN103929082A (en) | Single-phase three-level inverter signal modulation method based on wavelet modulation | |
Mekhilef et al. | DC link capacitor voltage balancing in three level neutral point clamped inverter | |
Abdalla et al. | Power electronics converters for variable speed pump storage | |
CN103944438A (en) | Rapid n-level multi-level inverter space vector pulse width modulation algorithm | |
Shaikh et al. | Simplified implementation of SVPWM techniques for a six‐phase machine with reduced current distortion features | |
CN105897027A (en) | Cascaded multilevel inverter three-dimensional space vector modulation algorithm | |
Panda et al. | Switching angle estimation using GA toolbox for simulation of cascaded multilevel inverter | |
Zhao et al. | Analyze and compare the efficiency of two-level and three-level inverter in SVPWM | |
CN100403645C (en) | Digital UPS/EPS space vector modulation algorithm | |
Eroğlu et al. | FPGA Implementation of PS-PWM for Single-Phase Thirteen-Level Cascaded H-Bridge Multilevel Inverters | |
Wan et al. | The study of FPGA-based three-level SVM NPC inverter | |
Sharma et al. | Analysis of Sinusoidal PWM and Space Vector PWM based diode clamped multilevel inverter | |
CN103944432B (en) | A kind of n level multi-electrical level inverter SVPWM algorithms of optimization toggle path | |
Khan et al. | Space vector pulse width modulation scheme for a seven-phase voltage source inverter | |
Colak et al. | Modeling of a three phase SPWM multilevel VSI with low THD using Matlab/Simulink | |
Subhashini et al. | Comparative analysis of harmonic distortion of a solar PV fed cascaded H-bridge multilevel inverter controlled by FPGA and diode clamped inverter | |
CN203071589U (en) | Control system of photovoltaic grid-connected inverter | |
CN105610344A (en) | Multiphase photovoltaic inverter and control method thereof | |
Syed et al. | Model predictive control of three phase inverter for PV systems | |
Menshawi et al. | Multistage inverters control using surface hysteresis comparators |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
DD01 | Delivery of document by public notice | ||
DD01 | Delivery of document by public notice |
Addressee: Tang xiongmin Document name: payment instructions |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170104 Termination date: 20210425 |