CN103943670A - Super-junction collector region strained silicon heterojunction bipolar transistor - Google Patents

Super-junction collector region strained silicon heterojunction bipolar transistor Download PDF

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CN103943670A
CN103943670A CN201410146902.6A CN201410146902A CN103943670A CN 103943670 A CN103943670 A CN 103943670A CN 201410146902 A CN201410146902 A CN 201410146902A CN 103943670 A CN103943670 A CN 103943670A
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collector region
chao
region
strain
zhu district
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CN103943670B (en
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金冬月
胡瑞心
张万荣
王肖
付强
鲁东
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Yangzhou Xinshan Electronic Technology Co ltd
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Beijing University of Technology
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/737Hetero-junction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804Emitter regions of bipolar transistors
    • H01L29/0817Emitter regions of bipolar transistors of heterojunction bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821Collector regions of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004Base region of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/161Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions

Abstract

The invention discloses a strained silicon heterojunction bipolar transistor, and particularly relates to a super-junction collector region strained silicon heterojunction bipolar transistor which has large current gains and high breakdown voltages at the same time. The transistor is of a SiGe virtual substrate structure, a super-junction structure where n type column areas and p type column areas are alternatively arranged is introduced into a relaxation SiGe collector region, and a strain SiGe base region and a strain Si emitting region respectively and epitaxially grow in the relaxation SiGe collector region. According to the transistor, the strain SiGe base region epitaxially grows in the relaxation SiGe collector region, the content of Ge in the SiGe collector region can be effectively increased, a band gap difference between the emitting region and the base region is increased, and the purposes of improving emitting efficiency and the device current gains are achieved. Meanwhile, according to the transistor, the super-junction structure is adopted in the collector region, a transverse electric field can be introduced, electric field distribution of the collector region is improved, and the purpose of increasing the device breakdown voltage is achieved. Compared with a conventional power heterojunction bipolar transistor, the transistor keeps excellent high-frequency characteristics, the current gains are increased, the breakdown voltage is higher, and the application of the heterojunction bipolar transistor in the radio frequency and microwave power field can be effectively expanded.

Description

Super knot collector region strain silicon heterojunction bipolar transistor
Technical field
The present invention relates to strain silicon heterojunction bipolar transistor, especially for the super knot collector region strain silicon heterojunction bipolar transistor with the large current gain of high-breakdown-voltage of the high-power RFs such as power amplifier, GPS navigation navigation system, mobile communication system, the automatic monitoring of traffic system and microwave regime.
Background technology
SiGe heterojunction bipolar transistor (heterojunction bipolar transistor, HBT) in thering is high current handling capability, large current gain and high early voltage, also there is excellent high frequency characteristics, be now widely used in the radio frequencies such as mobile telephone system, bluetooth, satellite navigation system, phased array antenna system, car radar and microwave circuit.Particularly, along with the General Promotion of the 4th generation SiGe technique, SiGe HBT will play the part of more and more important role in Asia-Pacific hertz (>500GHz) applications such as millimetre-wave radar, Gb/s level WLAN (wireless local area network) (WLAN) and 100Gb/s Ethernet.
SiGe HBT adopts " energy band engineering " to introduce Ge component in base, make base energy gap be less than emitter region energy gap, now injection efficiency is decided by emitter region and base doping concentration ratio no longer merely, and mainly decided by the forbidden band energy difference of emitter region and base, therefore device can obtain higher current gain, can adopt base heavy doping to obtain better frequency characteristic simultaneously.But conventional SiGe HBT is grown on Si substrate conventionally, for certain thickness base, along with the increase of Ge component, base energy gap (E g) will further reduce, the stress that is simultaneously grown in the SiGe epitaxial loayer on Si substrate also will increase thereupon, and in the time exceeding its limit stress, Si atom and Ge atom are by the dislocation of generation mismatch and then cause lattice defect, degeneration device performance, therefore the raising of device current gain will be restricted.In addition, along with the raising of SiGe HBT characteristic frequency, the puncture voltage of device declines thereupon, thereby causes the power output of device and the signal to noise ratio of radio system to reduce, and this has seriously limited the microwave power application of SiGe HBT.Therefore, how to design a kind of power SiGe HBT that has large current gain, high-breakdown-voltage concurrently towards the application of microwave high power field and there is important theoretical and practical significance.
Summary of the invention
The invention discloses the bipolar brilliant pipe of a kind of super knot collector region strain silicon heterojunction.
A kind of super knot collector region strain silicon heterojunction bipolar transistor, is characterized in that:
Comprise SiGe virtual substrate (10), relaxation Si 1-yge yinferior collector region (11), relaxation Si 1-yge ycollector region (12), Chao JienXing Zhu district (13), Chao JiepXing Zhu district (14), eigenstrain Si 1-xge xresilient coating (15), strain Si 1-xge xbase (16), strain Si emitter region (18);
Described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) are positioned at described relaxation Si 1-yge yregion, collector region in collector region (12) and under corresponding polysilicon layer (19) is described Chao JienXing Zhu district;
In described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) region, collector region under its correspondence of guarantee is answered polysilicon layer (19), in Chao JienXing Zhu district, described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) are along device horizontal direction alternative arrangement;
Described strain Si 1-xge xge constituent content x in base (16) is greater than described relaxation Si 1-yge yinferior collector region (11) and described relaxation Si 1-yge yge constituent content y in collector region (12), and y>0.
Preferably, described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) width and concentration all equate, and the width in described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) is more than or equal to and is positioned at silicon dioxide (SiO 2) width of polysilicon (poly) layer (19) of layer between (20), concentration is less than or equal to relaxation Si 1-yge ythe impurity concentration of collector region (12).
Preferably, described transistorized strain Si 1-xge xge constituent content x in base (16) is more than or equal to 0.3, and relaxation Si 1-yge yinferior collector region (11) and relaxation Si 1-yge yge constituent content y in collector region (12) need meet 0<y<x.
This transistor adopts " strained silicon technology " to be grown directly upon in SiGe virtual substrate, emitter region adopts stretching strain Si material, base to adopt compressive strain SiGe material to regulate stress to realize the Lattice Matching of emitter region and interface, base simultaneously, and then solve well the contradiction between above-mentioned Ge component and SiGe layer critical thickness, compared with the conventional SiGe HBT being grown under equal conditions on Si substrate, adopt virtual substrate technology can make strain silicium HBT realize higher base Ge component, for the significantly lifting of device current gain brings possibility.
In addition, this transistor is introduced alternatively distributed Chao JienXing Zhu district and Chao JiepXing Zhu district in collector region, and the depletion layer that HepXing Zhu district of adjacent n form post district produces will be introduced transverse electric field, improve collector region Electric Field Distribution, thereby significantly improve the puncture voltage of device.
Compared with conventional SiGe HBT, super knot collector region strain silicium HBT of the present invention has large current gain and high-breakdown-voltage characteristic simultaneously, and has good frequency characteristic, is applicable to frequency microwave high-power applications field.
Brief description of the drawings
The following description carried out by reference to the accompanying drawings, can further understand objects and advantages of the present invention.In these accompanying drawings:
Fig. 1 example the geometry plane graph of the embodiment of the present invention;
Fig. 2 example the current gain of the embodiment of the present invention with the variation relation of collector current;
Fig. 3 example the improvement of the embodiment of the present invention to power device collector region Electric Field Distribution;
Fig. 4 example the embodiment of the present invention to power device puncture voltage BV cEOimprovement;
Fig. 5 example the embodiment of the present invention to power device puncture voltage BV cBOimprovement;
Fig. 6 example the characteristic frequency of the embodiment of the present invention with the variation relation of collector current.
Embodiment
The embodiment of the present invention, taking Dan Zhichao knot collector region strain silicium HBT as example, is specifically explained content of the present invention.The field of the present invention relates to is not restricted to this.
Exemplifying embodiment:
The currentgainβ of SiGe HBT mainly determines by the forbidden band energy difference of emitter region and base, and the expression formula of β can be expressed as:
&beta; = I C I B W E D nB N DE N VB N CB W B D pE N AB N VE N CE e q ( E gE - E gB ) kT - - - ( 1 )
Wherein, W efor emitter region width, W bfor base width, D nBfor base electron diffusion coefficient, D pEfor emitter region hole diffusion coefficient, N dEfor emitter region impurity doping content, N aBfor base impurity doping content, N vB, N cBbe respectively base valence band and conduction band available state density, N vE, N cEbe respectively emitter region valence band and conduction band available state density, E gE, E gBbe respectively the energy gap of emitter region and base, k is Boltzmann Changshu, and q is electron charge, and T is device working temperature.The expression formula of above currentgainβ is applicable equally for the super knot collector region strain silicium HBT of the embodiment of the present invention.
The super knot collector region strain silicium HBT of the embodiment of the present invention, adopt on the one hand virtual substrate technology, epitaxial growth compressive strain SiGe base on relaxation SiGe collector region, efficiently solve the contradiction between Ge component and SiGe layer critical thickness, in the situation that ensureing that C-B knot place stress (x-y) is certain, the more Ge component of high-load can be introduced in base.Compared with conventional SiGe HBT, super knot collector region strain silicium HBT has increased the hole potential barrier (being valence band place band offsets) at E-B knot place, has effectively suppressed the base current (I of inverse injection pb), improve emitter region injection efficiency.Also can find out from the expression formula of above-mentioned currentgainβ, along with the increase of Ge component in SiGe base, base energy gap E gBreduce the several E of expression formula middle finger gE-E gBincrease, finally make β increase.
On the other hand, consider when SiGe HBT applies in microwave high power field, conventionally require device to possess higher puncture voltage, to ensure higher power output and system signal noise ratio.The embodiment of the present invention, in ensureing that device possesses large current gain, is introduced alternatively distributed Chao JienXing Zhu district and Chao JiepXing Zhu district further to improve the puncture voltage of device in collector region.
Result shows by experiment, the puncture voltage of device reduces and increases with super knot width and concentration, the characteristic frequency of device is reducing and reduce with super knot width and concentration, visible puncture voltage and characteristic frequency are the existence of conflict, designer is in the time designing, can be according to actual needs, suitably regulate super junction parameter to be compromised preferably.
The Chao JienXing Zhu district of the embodiment of the present invention and Chao JiepXing Zhu district are as shown in (13) and (14) in figure (1).In the time that device is in running order, Chao JienXing Zhu district and Chao JiepXing Zhu district ionize respectively the ionized donor and the electronegative ionization acceptor that produce positively charged, thereby produce transverse electric field in collector region, the electric field line of ionized donor is stopped by the ionization acceptor of the contiguous p post in both sides.Impurity in Chao JienXing Zhu district and Chao JiepXing Zhu district exhausts completely, the ionization negative electrical charge in the complete BeipXing Zhu of the ionization positive charge district in nXing Zhu district compensates, due to the mutual compensating action of lateral charge, in the time that the electric field of collector junction reaches breakdown critical value, electric field line and area that reference axis is enclosed increase, therefore, the puncture voltage of device is improved.
In order better to represent the transistorized performance of the present invention, taking the embodiment of the present invention as example, carry out device modeling and process simulation to the embodiment of the present invention with without the strain Si HBT of super-junction structure respectively by commercial semiconductor emulation tool Silvaco TCAD, and extracted relevant electrology characteristic and frequency characteristic.
Fig. 1 example the longitudinal profile structural representation of the embodiment of the present invention, comprising n +the SiGe virtual substrate (10) of doping, its Ge content fades to 0.15 from 0 gradually; n +the relaxation Si of doping 1-yge yinferior collector region (11), its Ge component y=0.15; The relaxation Si of n-doping 1-yge ycollector region (12), its Ge component y=0.15; Chao JienXing Zhu district (13) and Chao JiepXing Zhu district (14), alternative arrangement is distributed in relaxation Si successively 1-yge ycollector region (12), super junction depth is 1 μ m, concentration is 5 × 17cm -3; Eigenstrain Si 1-xge xresilient coating (15), this layer extends out in order to prevent base impurity; p +the strain Si of doping 1-xge xbase (16), its Ge constituent content x=0.3; p +the SiGe outer base area (17) of doping; The strain Si emitter region (18) of n doping; Polysilicon (poly) layer (19); Silicon dioxide (SiO 2) layer (20); Emitter metal lead-in wire (21); Base metal lead-in wire (22).
Fig. 2 example embodiment of the present invention currentgainβ with collector current I cthe relation changing, can find out, transistorized current gain of the present invention is up to 1290, and compared with the conventional SiGe HBT reporting, β value significantly improves.
Fig. 3 example embodiment of the present invention collector region Electric Field Distribution, and compare with conventional strain Si HBT.Can find out, compared with conventional strain Si HBT, the collector junction place peak value electric field of the embodiment of the present invention reduces, and electric field line and area that axis of abscissas encloses increase, and now puncture voltage significantly improves.
Fig. 4 example the base current I of the embodiment of the present invention bwith operating voltage V cErelation curve, and compare with conventional strain Si HBT.Can find out puncture voltage BV between the open base collector electrode-emitter of the embodiment of the present invention cEOfor 7.5V, compared with conventional strain Si HBT, BV cEOimprove 5.3V.
Fig. 5 example the collector current I of the present embodiment cwith collector junction voltage V cBrelation curve, and compare with conventional strain Si HBT.Can find out puncture voltage BV between the emitter open collector-base stage of the embodiment of the present invention cBOfor 30.5V, compared with conventional strain Si HBT, BV cBOimprove 14.1V.
Fig. 6 example the characteristic frequency of the embodiment of the present invention with collector current I cchange curve.Can find out the characteristic frequency (f of the embodiment of the present invention t) peak value reaches 50.6GHz.Result shows, the embodiment of the present invention not only has large current gain and high-breakdown-voltage characteristic, has also kept good frequency characteristic, is conducive to the application of device in frequency microwave power field.

Claims (3)

1. a super knot collector region strain silicon heterojunction bipolar transistor, is characterized in that:
Comprise SiGe virtual substrate (10), relaxation Si 1-yge yinferior collector region (11), relaxation Si 1-yge ycollector region (12), Chao JienXing Zhu district (13), Chao JiepXing Zhu district (14), eigenstrain Si 1-xge xresilient coating (15), strain Si 1-xge xbase (16), strain Si emitter region (18);
Described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) are positioned at described relaxation Si 1-yge yregion, collector region in collector region (12) and under corresponding polysilicon layer (19) is described Chao JienXing Zhu district;
In described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) region, collector region under its correspondence of guarantee is answered polysilicon layer (19), in Chao JienXing Zhu district, described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) are along device horizontal direction alternative arrangement;
Described strain Si 1-xge xge constituent content x in base (16) is greater than described relaxation Si 1-yge yinferior collector region (11) and described relaxation Si 1-yge yge constituent content y in collector region (12), and y>0.
2. super knot according to claim 1 collector region strain silicon heterojunction bipolar transistor, it is characterized in that: described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) width and concentration all equate, and the width in described Chao JienXing Zhu district (13) and described Chao JiepXing Zhu district (14) is more than or equal to the width of the polysilicon layer (19) being positioned between silicon dioxide layer (20), and concentration is less than or equal to relaxation Si 1-yge ythe impurity concentration of collector region (12).
3. super knot according to claim 1 collector region strain silicon heterojunction bipolar transistor, is characterized in that: described strain Si 1-xge xge constituent content x in base (16) is more than or equal to 0.3.
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CN106169498A (en) * 2016-07-30 2016-11-30 北京工业大学 High thermal stability superjunction strain Si/SiGe heterojunction bipolar transistor
CN108258032A (en) * 2018-01-19 2018-07-06 重庆邮电大学 A kind of heterojunction bipolar transistor and its manufacturing method using combination emitter region

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Publication number Priority date Publication date Assignee Title
CN106169498A (en) * 2016-07-30 2016-11-30 北京工业大学 High thermal stability superjunction strain Si/SiGe heterojunction bipolar transistor
CN106169498B (en) * 2016-07-30 2019-03-05 北京工业大学 High thermal stability superjunction strain Si/SiGe heterojunction bipolar transistor
CN108258032A (en) * 2018-01-19 2018-07-06 重庆邮电大学 A kind of heterojunction bipolar transistor and its manufacturing method using combination emitter region

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Effective date of registration: 20191225

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Denomination of invention: Super junction collector strain silicon heterojunction bipolar transistor

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