CN103928313B - A kind of preparation method of small size figure - Google Patents
A kind of preparation method of small size figure Download PDFInfo
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- CN103928313B CN103928313B CN201410161247.1A CN201410161247A CN103928313B CN 103928313 B CN103928313 B CN 103928313B CN 201410161247 A CN201410161247 A CN 201410161247A CN 103928313 B CN103928313 B CN 103928313B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 238000000034 method Methods 0.000 claims abstract description 45
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 37
- 238000005530 etching Methods 0.000 claims abstract description 27
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 16
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 16
- 239000013078 crystal Substances 0.000 claims abstract description 9
- 238000001039 wet etching Methods 0.000 claims abstract description 9
- 238000001020 plasma etching Methods 0.000 claims abstract description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 35
- 229920005591 polysilicon Polymers 0.000 claims description 32
- 239000007789 gas Substances 0.000 claims description 24
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims description 16
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 13
- 238000001259 photo etching Methods 0.000 claims description 7
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims 1
- 229910052731 fluorine Inorganic materials 0.000 claims 1
- 239000011737 fluorine Substances 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 238000000427 thin-film deposition Methods 0.000 abstract description 5
- 230000010354 integration Effects 0.000 abstract description 2
- 238000001312 dry etching Methods 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000003667 anti-reflective effect Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000000101 transmission high energy electron diffraction Methods 0.000 description 2
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000053 physical method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The present invention provides a kind of preparation method of small size figure, including：First, large scale figure and the first small size figure are formed using thin film deposition processes and etching technics；Then, on the basis of the first small size figure, the second small size figure is formed using thin film deposition processes and etching technics again, forming the second small size figure includes：One layer of silicon oxide layer is deposited in crystal column surface；Using plasma etching technics, etching get rid of the silicon oxide layer at the top and bottom of silicon nitride spacer, and monox lateral wall is formed in the side wall of silicon nitride spacer；Using wet-etching technology, silicon nitride spacer is removed, so as to form the second small size figure.So, as a result of self-registered technology twice, it is achieved thereby that compared to the smaller figure of traditional small size figure, device integration is improved, and expands process window, reduces technology difficulty.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of preparation method of small size figure.
Background technology
As process constantly reduces, particularly 20nm and its following, because grid width further reduces, to photoetching
The ability of machine and the requirement more and more higher of photoetching process.According to Moore's Law, in order to further reduce device critical dimensions, carry
There are the various methods for making small size figure in its high integrated level, industry.
Under normal circumstances, referring to Fig. 1, Fig. 1 is the schematic flow sheet of the preparation method of traditional small size figure, it is wrapped
Include following steps：
Step L01：Successively hard dielectric layer, polysilicon layer, bottom anti-reflection layer and photoresist are deposited in crystal column surface；
Step L02：Using photoetching and plasma etch process, photoresist, bottom anti-reflection layer and polycrystalline are sequentially etched
Silicon layer, large scale figure is formed in polysilicon layer；
Step L03：One layer of silicon nitride layer is deposited on polysilicon layer surface and hard dielectric layer surface；
Step L04：Using plasma etching technics, the silicon nitride layer at the top and bottom of polysilicon layer is etched away, formed
Silicon nitride spacer；
Step L05：Polysilicon layer is removed, so as to form small size figure.
Above-mentioned is current most popular autoregistration bilayer figure（SADP）Technique.According to initial 100 nanometers of spacing
（pitch）, 25 nano-scale linewidth figures can be formed inside 50 nanometers of pitch by a SADP.
However, in actual etching technics, there is lithographic capabilities deficiency and process window in 20nm and its following technology
Less problem, therefore, it is badly in need of a kind of method for improving lithographic process window, reducing critical size of research, so as to significantly carry
The integrated level of high device.
The content of the invention
In order to overcome above mentioned problem, the present invention is intended to provide a kind of preparation method of small size figure, so as to realize 10nm
Following feature sizes.
The present invention provides a kind of preparation method of small size figure, and it includes：
Step S01：Successively hard dielectric layer, polysilicon layer, bottom anti-reflection layer and photoresist are deposited in crystal column surface；
Step S02：Using photoetching and plasma etch process, the photoresist, the bottom anti-reflective are sequentially etched
Layer and the polysilicon layer, large scale figure is formed in the polysilicon layer；
Step S03：One layer of silicon nitride layer is deposited on the polysilicon layer surface and the hard dielectric layer surface；
Step S04：Using plasma etching technics, etch away the silicon nitride at the top and bottom of the polysilicon layer
Layer, form silicon nitride spacer；
Step S05：The polysilicon layer is removed, so as to form the first small size figure；
Step S06：One layer of silicon oxide layer is deposited in the crystal column surface；
Step S07：Using plasma etching technics, etching are got rid of described at the top and bottom of the silicon nitride spacer
Silicon oxide layer, monox lateral wall is formed in the side wall of the silicon nitride spacer；
Step S08：Using wet-etching technology, the silicon nitride spacer is removed, so as to form the second small size figure.
Preferably, in the step S06, the silicon oxide layer is deposited using Atomic layer deposition method.
Preferably, the thickness of the silicon oxide layer is less than 10nm.
Preferably, in the step S07, used reaction pressure is 10-150mTorr, and used reaction temperature is
30-80 DEG C, used etch period is the 10-30 seconds, and used Top electrode radio-frequency power is 100-400 watts.
Preferably, used etching gas are the mixed gas of fluoro-gas and oxygen.
Preferably, the etching gas include CF4And/or C4F8And O2。
Preferably, in the fluoro-gas, the C4F8Flow be 30-100sccm, the CF4Flow be 20-
40sccm, the O2Flow be 10-15sccm.
Preferably, in the step S08, used wet etching decoction is hot phosphoric acid solution.
Preferably, in the step S08, in the hot phosphoric acid solution, H3PO4With H2O mass ratio is 70%-90%, is adopted
Temperature range is 150-170 DEG C.
A kind of preparation method of small size figure of the present invention, double-deck figure is formed by using self-registered technology twice
Small size graphic structure is realized, including：Synthesis uses thin film deposition and dry etching technology, is initially formed large scale figure；So
Afterwards, on the basis of large scale figure, using thin film deposition and dry etching technology, the first small size figure is formed；Finally, sink
Silicon oxide film of the product less than 10nm, then monox lateral wall is etched to define, then using wet etching technique, remove silicon nitride
Side wall, so as to form the second small size figure, it that is to say the small size figure to be made in the present invention, made small size
The size of figure is less than 10nm, so as to increase process window, effectively reduces the line width of the small size figure in traditional handicraft,
Improve device integration.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of the preparation method of traditional small size figure
Fig. 2 is the schematic flow sheet of the preparation method of the small size figure of the preferred embodiment of the present invention
Embodiment
To make present disclosure more clear understandable, below in conjunction with Figure of description, present disclosure is made into one
Walk explanation.Certainly the invention is not limited in the specific embodiment, the general replacement known to those skilled in the art
Cover within the scope of the present invention.
The preparation method of the small size figure of the present invention is made below with reference to specific embodiments and the drawings 2 further detailed
Explanation.Fig. 2 is the schematic flow sheet of the preparation method of the small size figure of the preferred embodiment of the present invention.
Referring to Fig. 2, the preparation method of the small size figure of the present embodiment of the present invention, comprises the following steps：
Step S01：Successively hard dielectric layer, polysilicon layer, bottom anti-reflection layer and photoresist are deposited in crystal column surface；
Here, the effect of hard dielectric layer is that crystal column surface is injury-free, and this is in order to be protected in follow-up dry etching
Because in follow-up dry etching, the etching selection ratio of polysilicon and wafer substrate is relatively low, such as monocrystalline substrate.
Here, in the present embodiment, can be, but not limited to deposit hard dielectric layer and polysilicon using chemical vapour deposition technique
The deposition of layer, bottom anti-reflection layer and photoresist can be, but not limited to use physical method, such as the technique such as spin coating, of the invention right
This is not intended to be limited in any.In the present embodiment, the material of hard dielectric layer can be, but not limited to as SiOC materials.
Step S02：Using photoetching and plasma etch process, photoresist, bottom anti-reflection layer and polycrystalline are sequentially etched
Silicon layer, large scale figure is formed in polysilicon layer；
Specifically, in the present embodiment, the step can include procedure below：
First process：Using photoetching process, photoresist is exposed, so as to pattern the photoresist；
Second process：Using the photoresist of patterning as mask, using plasma dry etch process, etching bottom anti-reflective
Penetrate layer；Here it is possible to using Cl2、HBr、O2、CF4Bottom anti-reflection layer is performed etching Deng etching gas, the etching process is stopped
Only on the polysilicon layer；
3rd process：Using plasma dry etch process etches polycrystalline silicon layer；Here, used etching gas can
With but be not limited to Cl2、HBr、O2Mixed gas, the etching process stopped on hard dielectric layer；It should be noted that carving
During losing polysilicon layer, photoresist or bottom anti-reflection layer are also etched simultaneously, are stopped in the process of etches polycrystalline silicon layer
After only, photoresist or bottom anti-reflection layer may be etched away；If photoresist or bottom anti-reflection layer are not etched all
Fall, tackle it and be removed；Gas is to contain O used by removing photoresist and bottom anti-reflection layer2Etching gas.
Step S03：One layer of silicon nitride layer is deposited on polysilicon layer surface and hard dielectric layer surface；
Specifically, in the present embodiment, Atomic layer deposition method can be used to form silicon nitride layer, the thickness of silicon nitride layer can
With less than 20nm.Specific process parameter employed in deposition process can be set according to actual process requirement, and the present invention is right
This is not restricted.
Step S04：Using plasma etching technics, the silicon nitride layer at the top and bottom of polysilicon layer is etched away, formed
Silicon nitride spacer；
Specifically, in the present embodiment, can be, but not limited to use comprising CF4、CHF3And CH2F2Mixed gas as carve
Erosion gas etching falls the silicon nitride layer at the top and bottom of polysilicon layer, so as to form silicon nitride spacer in the side wall of polysilicon layer.
Specific process parameter employed in the etching process can be set according to actual process requirement, and the present invention is not limited this
System.
Step S05：Polysilicon layer is removed, so as to form the first small size figure；
Specifically, in the present embodiment, it can use and contain Cl2、HBr、O2Mixed gas as etching gas etch remove
Fall polysilicon layer；Herein, selected etching gas are to polysilicon layer and silicon nitride, and to polysilicon layer and hard dielectric layer
Selection is than should be higher, so that when etches polycrystalline silicon layer, silicon nitride spacer is not etched.Adopted in the etching process
Specific process parameter can be set according to actual process requirement, the invention is not limited in this regard.
It should be noted that the size of the first small size figure here is more than the size of the second small size figure, for example,
The thickness of silicon nitride layer is 20nm, then the size of the first small size figure is 20nm, and the size of the second small size figure is then small
In 20nm, such as can be 10nm.
Step S06：One layer of silicon oxide layer is deposited in crystal column surface；
Specifically, in the present embodiment, in order to realize smaller line width and dimension of picture, Atomic layer deposition method can be used
Silicon oxide layer is formed, in the present embodiment, the thickness of silicon oxide layer is less than 10nm.Specific process parameter employed in deposition process
It can be set according to actual process requirement, the invention is not limited in this regard.
Step S07：Using plasma etching technics, the silicon oxide layer at the top and bottom of etch silicon nitride side wall, in nitrogen
The side wall of SiClx side wall forms monox lateral wall；
Specifically, in the present embodiment, used etching gas are the mixed gas of fluoro-gas and oxygen, can be bag
Containing CF4And/or C4F8And O2Mixed gas, wherein, C4F8Flow be 30-100sccm, CF4Flow be 20-
40sccm, O2Flow be 10-15sccm, but this is not used in limitation the scope of the present invention.
In the present embodiment, used etch process parameters can be, but not limited to following scope：Used reaction pressure
For 10-150mTorr, used reaction temperature is 30-80 DEG C, and used etch period is the 10-30 seconds, it is used on
Electrode radio-frequency power is 100-400 watts.
Step S08：Using wet-etching technology, silicon nitride spacer is removed, so as to form the second small size figure.
Here, in the present invention, it should use to silicon nitride and polysilicon and the etching of silicon nitride and hard dielectric layer is selected
Select and carry out wet etching than high decoction, so, protect monox lateral wall to be not etched while silicon nitride spacer is removed.
Specifically, in the present embodiment, used wet etching decoction is hot phosphoric acid solution, preferably, in hot phosphoric acid solution, H3PO4
With H2O mass ratio 70%-90%, used temperature range are 150-170 DEG C.
So, the size of the second small size figure formed is the thickness of silicon oxide film, and the size is less than 10nm, from
And the size of the small size figure prepared relative to conventional method is substantially reduced；And this method avoids in preparation process
The etching of small size figure is directly carried out, expands process window.
In summary, the preparation method of small size figure of the invention, by using self-registered technology twice, is initially formed
Large scale figure, re-form the first small size figure, on the basis of the first small size figure, further using thin film deposition and
Etching technics, the second smaller small size figure than the first small size figure is formed, it is achieved thereby that chi smaller than tradition
The smaller figure of very little dimension of picture, reduces line width and critical size structure, improves the integrated level of device；And expand technique
Window, reduce technology difficulty.
Although the present invention is disclosed as above with preferred embodiment, the right embodiment illustrated only for the purposes of explanation and
, the present invention is not limited to, if those skilled in the art can make without departing from the spirit and scope of the present invention
Dry change and retouching, the protection domain that the present invention is advocated should be to be defined described in claims.
Claims (9)
- A kind of 1. preparation method of small size figure, it is characterised in that including：Step S01：Successively hard dielectric layer, polysilicon layer, bottom anti-reflection layer and photoresist are deposited in crystal column surface；Step S02：Using photoetching and plasma etch process, be sequentially etched the photoresist, the bottom anti-reflection layer and The polysilicon layer, large scale figure is formed in the polysilicon layer；Step S03：One layer of silicon nitride layer is deposited on the polysilicon layer surface and the hard dielectric layer surface；Step S04：Using plasma etching technics, the silicon nitride layer at the top and bottom of the polysilicon layer is etched away, Form silicon nitride spacer；Step S05：The polysilicon layer is removed, so as to form the first small size figure；Step S06：One layer of silicon oxide layer is deposited in the crystal column surface；Positioned at the level of the silicon oxide layer of silicon nitride spacer side wall Thickness is less than the thickness of silicon nitride spacer；Step S07：Using plasma etching technics, etching get rid of the oxidation at the top and bottom of the silicon nitride spacer Silicon layer, monox lateral wall is formed in the side wall of the silicon nitride spacer；And the thickness of monox lateral wall is less than silicon nitride spacer Thickness；Step S08：Using wet-etching technology, the silicon nitride spacer is removed, so as to form the second small size figure.
- 2. the preparation method of small size figure according to claim 1, it is characterised in that in the step S06, using original Silicon oxide layer described in sublayer deposition.
- 3. the preparation method of small size figure according to claim 1, it is characterised in that the thickness of the silicon oxide layer is small In 10nm.
- 4. the preparation method of small size figure according to claim 1, it is characterised in that in the step S07, used Reaction pressure be 10-150mTorr, used reaction temperature is 30-80 DEG C, and used etch period is the 10-30 seconds, Used Top electrode radio-frequency power is 100-400 watts.
- 5. the preparation method of small size figure according to claim 1, it is characterised in that used etching gas be containing The mixed gas of fluorine gas and oxygen.
- 6. the preparation method of small size figure according to claim 5, it is characterised in that the etching gas include CF4 And/or C4F8And O2。
- 7. the preparation method of small size figure according to claim 6, it is characterised in that described in the fluoro-gas C4F8Flow be 30-100sccm, the CF4Flow be 20-40sccm, the O2Flow be 10-15sccm.
- 8. the preparation method of small size figure according to claim 1, it is characterised in that in the step S08, used Wet etching decoction be hot phosphoric acid solution.
- 9. the preparation method of small size figure according to claim 8, it is characterised in that in the step S08, the heat In phosphoric acid solution, H3PO4With H2O mass ratio is 70%-90%, and used temperature range is 150-170 DEG C.
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