CN103915346A - Thin film transistor, manufacturing method thereof and liquid crystal display panel - Google Patents
Thin film transistor, manufacturing method thereof and liquid crystal display panel Download PDFInfo
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- CN103915346A CN103915346A CN201310157160.2A CN201310157160A CN103915346A CN 103915346 A CN103915346 A CN 103915346A CN 201310157160 A CN201310157160 A CN 201310157160A CN 103915346 A CN103915346 A CN 103915346A
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- film transistor
- thin
- nitrogen
- grid
- gate insulator
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- 239000010409 thin film Substances 0.000 title claims abstract description 48
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 46
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 27
- 125000004433 nitrogen atom Chemical group N* 0.000 claims abstract description 18
- 125000004430 oxygen atom Chemical group O* 0.000 claims abstract description 18
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 239000010703 silicon Substances 0.000 claims abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000007769 metal material Substances 0.000 claims abstract description 11
- 239000000203 mixture Substances 0.000 claims abstract description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 7
- 239000001301 oxygen Substances 0.000 claims abstract description 7
- 239000012212 insulator Substances 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 239000000126 substance Substances 0.000 claims description 12
- MGWGWNFMUOTEHG-UHFFFAOYSA-N 4-(3,5-dimethylphenyl)-1,3-thiazol-2-amine Chemical compound CC1=CC(C)=CC(C=2N=C(N)SC=2)=C1 MGWGWNFMUOTEHG-UHFFFAOYSA-N 0.000 claims description 11
- JCXJVPUVTGWSNB-UHFFFAOYSA-N nitrogen dioxide Inorganic materials O=[N]=O JCXJVPUVTGWSNB-UHFFFAOYSA-N 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 11
- 230000015572 biosynthetic process Effects 0.000 claims description 10
- 238000005229 chemical vapour deposition Methods 0.000 claims description 10
- 239000007789 gas Substances 0.000 claims description 9
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- 150000002829 nitrogen Chemical class 0.000 claims 2
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 claims 2
- 238000009413 insulation Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 3
- 229910007991 Si-N Inorganic materials 0.000 description 2
- 229910003978 SiClx Inorganic materials 0.000 description 2
- 229910006294 Si—N Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
Abstract
A thin film transistor, a method of manufacturing the same, and a liquid crystal display panel including the same are provided. The thin film transistor includes a gate electrode of a metal material and a gate insulating layer covering the gate electrode. The grid insulation layer is a mixture containing silicon element, oxygen element and nitrogen element, and the ratio of the concentration of oxygen atoms to the concentration of nitrogen atoms in the mixture is less than 3.
Description
Technical field
The present invention relates to a kind of thin-film transistor and preparation method thereof, and comprise the display panels of this thin-film transistor.
Background technology
Adopt thin-film transistor to be widely used in display device as the display panels of driven unit, for example TV, in notebook or display.But, the gate insulator of thin-film transistor is all deposited on grid, thus, in the time making gate insulator, more easily grid is exerted an influence, the metal material of for example grid is oxidized, the resistance value more oxidized front height of grid after oxidized, thus cause the signal transmission time of thin-film transistor to increase, make signal occur postponing, and then cannot meet the demand that current display panels resolution increases.
Summary of the invention
In view of above content, be necessary to provide a kind of thin-film transistor that can prevent that grid layer is oxidized.
A kind of manufacture method of thin-film transistor further, is provided.
Again, provide a kind of liquid crystal panel that comprises aforementioned thin-film transistor.
A kind of thin-film transistor, comprising:
The grid of at least one metal material; And
One gate insulator, cover this grid, this gate insulator is for including silica, and the two mixture one of at least wherein of the chemical substance of the chemical substance of the bond that contains nitrogen and silicon and the bond that contains nitrogen and oxygen and silicon, and in this gate insulator, the concentration ratio of the concentration of oxygen atom and nitrogen-atoms is less than 3, wherein, the concentration of described oxygen atom refers to the quantity of oxygen atom in unit volume, and the concentration of nitrogen-atoms refers to the quantity of nitrogen-atoms in unit volume.
A manufacture method for thin-film transistor, comprising:
Form the grid of at least one metal material;
In reaction chamber, being filled with silicomethane, nitrogen dioxide gas and nitrogen adopts the method formation gate insulator of chemical vapour deposition (CVD) on this grid, this gate insulator is for including silica, and the two mixture one of at least wherein of the chemical substance of the chemical substance of the bond that contains nitrogen and silicon and the bond that contains nitrogen and oxygen and silicon, and in this gate insulator, the concentration of oxygen atom and the concentration ratio of nitrogen-atoms are less than 3.
A kind of display panels, comprise multiple as the scan line of the thin-film transistor of claim 1 to 5 any one, the setting of multirow parallel interval, the setting of multiple row parallel interval and with the vertically insulated data wire intersecting of this fine scanning line, the multiple pixel electrode of this fine scanning line and this multi-column data line institute delimited area, public electrode that relative this pixel electrode arranges of being arranged on, this thin-film transistor is arranged on this multiple row scan line and this multirow data wire intersection region.
Compared to prior art, in the forming process due to this gate insulator, adopt nitrogen to dilute, thus, in formation gate insulator process, can not make the grid that contains metal material be oxidized, and then ensure the resistivity that grid is lower, prevent the delay of signal transmission time.
Brief description of the drawings
Fig. 1 is the structural representation of display panels of the present invention.
Fig. 2 is the cross-sectional view of thin-film transistor shown in Fig. 1 along IV-IV line.
Fig. 3 is the method flow diagram of making an execution mode of thin-film transistor shown in Fig. 2.
Main element symbol description
| Thin-film transistor | 10 |
| Substrate | 11 |
| Grid | 12 |
| Gate insulator | 13 |
| Semiconductor layer | 14 |
| Source electrode | 15 |
| Drain electrode | 16 |
| Step | S201~S205 |
| Display panels | 100 |
| Scan line | 101 |
| Data wire | 102 |
| Pixel electrode | 104 |
| Public electrode | 105 |
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Referring to Fig. 1, is the structural representation of display panels one dot structure of the present invention.This display panels 100 comprise that scan line 101, multiple row that multirow is parallel to each other are parallel to each other and respectively with this scan line 101 insulate thin-film transistor 10 (thin film transistor, TFT) that crossing data wire 102, this scan line 101 of multiple vicinity and this data wire 102 infalls arrange, multiple pixel electrode 104 and one and the public electrode 105 that is oppositely arranged of the plurality of pixel electrode 104.These pixel electrode 104 matrixes are arranged in the region that data wire 102 that scan line 101 that this multirow is parallel to each other and multiple row be parallel to each other defines.The grid correspondence of this thin-film transistor 10 is connected to one scan line 101, and its source electrode correspondence is connected to a data wire 102, and its drain electrode correspondence is connected to a pixel electrode 104.
In the time that the extraneous scanning voltage providing is provided this fine scanning line 101, the extraneous data voltage providing is provided this multi-column data line 102, and is loaded on the source electrode of corresponding thin-film transistor 10.If now this thin-film transistor 10 is in open mode, this data voltage is sent to the drain electrode of this thin-film transistor 10 and is loaded in this pixel electrode 104.The extraneous common electric voltage providing is provided this public electrode 105 simultaneously, can produce thus an electric field to control the rotation of liquid crystal molecule between this pixel electrode 104 and this public electrode 105, shows thereby realize image.
As shown in Figure 2, be the cross-sectional view of thin-film transistor 10 shown in Fig. 1 along IV-IV line, thin-film transistor 10 comprises substrate 11, grid 12, gate insulator 13, semiconductor layer 14, source electrode 15 and drain electrode 16.Wherein, grid 12 is formed on substrate 11 using copper as electrode material.The main component of gate insulator 13 is silica (SiOn, n is natural number), also comprise in addition the chemical substance of the bond SiClx (Si-N) that contains nitrogen and silicon and/or contain nitrogen and the chemical substance of the bond of oxygen and silicon (Si-N-O), wherein the concentration of oxygen atom and nitrogen atom concentration ratio are less than 3.This atomic concentration can be by secondary ion mass spectroscopy (SIMS, secondary ion mass spectroscopy) instrument test acquisition, the concentration of this nitrogen-atoms and oxygen atom refers to respectively the quantity of interior this nitrogen-atoms of unit volume (1 cubic centimetre, 1cm3) and oxygen atom.
In this gate insulator 13, to be less than 3 thickness be 7.5% to 12.5% of gate insulator 13 integral thickness for adjacent gate 12 and corresponding concentration of oxygen atoms and nitrogen atom concentration ratio.
This gate insulator 13 is covered on this grid 12 and substrate 11.Semiconductor layer 14 is formed on this gate insulator 13, and source electrode 15 and drain electrode 16 two ends that are formed at respectively on this semiconductor layer 14 that grid 12 is corresponding wherein, are provided with a passage (not indicating) between source electrode 15 and drain electrode 16.Can understand, present embodiment is to describe with bottom-gate structure.
See also Fig. 2 and Fig. 3, wherein, Fig. 3 is the method flow diagram of making this thin-film transistor in an embodiment of the present invention, and this manufacture method comprises the steps:
Step S201, provides substrate 11, and the material of this substrate can be glass.
Step S202, the grid 12 of formation using metal material as electrode material is on substrate 11, and this grid 12 can be in a reaction chamber, to adopt physical vapor method on substrate 11, to deposit certain thickness metal copper layer, then via forming after patterning.In the present embodiment, this metal material is preferably the copper that resistivity is lower (Cu).
Step S203, adopt the method for chemical vapour deposition (CVD) to form gate insulator on this grid 12, wherein, in the process of chemical vapour deposition (CVD), in airtight reaction chamber, be filled with the mixture of silicomethane (SiH4), nitrogen dioxide (NO2) gas and nitrogen (N2) as the required reacting gas of chemical vapour deposition (CVD).Particularly, in reaction chamber, pass into SiH4, in NO2 and the N2 reaction temperature more than 370 degrees Celsius, make those gases carry out chemical reaction, thereby deposition formation main component is silica (SiOx) on grid 12 and substrate 11, also comprise in addition the chemical substance of the bond SiClx (Si-N) that contains nitrogen and silicon and/or contain nitrogen and the chemical substance of the bond of oxygen and silicon (Si-N-O), owing to passing into silicomethane (SiH4) in the process that forms gate insulator 13, when nitrogen dioxide (NO2) gas, also pass into that nitrogen (N2) dilutes aforementioned two kinds of gases and as reacting gas, make the copper in grid 12 be difficult for oxidized.
Preferably, at the initial stage that passes into previous reaction gas formation gate insulator 13, as: in the overall sedimentation time of gate insulator 13 5% to 10% time period before, the amount of being filled with of nitrogen is greater than 1.5 with the volume ratio of nitrogen in the unit interval and nitrogen dioxide and is advisable, so that this nitrogen dioxide gas is diluted, accordingly, at this moment, in section, the thickness that the concentration of oxygen atoms that adjacent gate 12 forms and nitrogen atom concentration ratio are less than 3 gate insulator 13 is 7.5% to 12.5% of gate insulator 13 integral thickness.And forming can being filled with in right amount nitrogen or stopping being filled with nitrogen in section At All Other Times of gate insulator 13, and in the gate insulator 13 of correspondence, the concentration ratio of nitrogen-atoms and oxygen atom is not subject to the restriction of above ratio.
Step S204, forms semiconductor layer 14 on this gate insulator 13, and this semiconductor layer 14 can be indium oxide gallium zinc (IGZO) film.
Step S205, formation source electrode 15 and drain electrode 16 lay respectively at the two ends of this semiconductor layer 14, wherein, between source electrode 15 and drain electrode 16, are provided with a passage.
Compared to prior art, because gate insulator 13 forms under nitrogen environment, thus, in formation gate insulator 13 processes, can not make the grid 12 that contains copper product be oxidized, and then ensured the lower resistivity of grid 12, and prevent the time delay of signal, improve the resolution of display panels.
Variable ground, this thin-film transistor 10 can also be top grid structure, and correspondingly, the material of gate insulator that covers this grid in this top grid thin-film transistor is identical with the material of aforementioned gate insulator 13, and manufacturing method thereof is also similar, is not repeated at this.In addition, though this thin-film transistor 10 only comprises a grid in the present embodiment, so in other embodiment of the present invention, also can be bigrid (dual-gate TFT) structure or the multiple-grid utmost point (multi-gate TFT) structure.
Certainly, the present invention is not limited to above-mentioned disclosed embodiment, and the present invention carries out various changes to above-described embodiment.The art personnel are appreciated that as long as within connotation scope of the present invention, within the appropriate change that above embodiment is done and variation all drop on the scope of protection of present invention.
Claims (13)
1. a thin-film transistor, is characterized in that, comprising:
The grid of at least one metal material; And
One gate insulator, cover this grid, this gate insulator is for including silica, and the two mixture one of at least wherein of the chemical substance of the chemical substance of the bond that contains nitrogen and silicon and the bond that contains nitrogen and oxygen and silicon, and in this mixture, the concentration ratio of the concentration of oxygen atom and nitrogen-atoms is less than 3, wherein, the concentration of described oxygen atom refers to the quantity of oxygen atom in unit volume, and the concentration of nitrogen-atoms refers to the quantity of nitrogen-atoms in unit volume.
2. thin-film transistor as claimed in claim 1, is characterized in that, this thin-film transistor is a bottom gate thin film transistor, and this bottom gate thin film transistor further comprises:
One for carrying the substrate of this grid, and this gate insulator further covers this and have the substrate of this grid;
Semi-conductor layer, to being arranged on this gate insulator by grid; And
One source pole and a drain electrode, lay respectively at the two ends on this semiconductor layer.
3. thin-film transistor as claimed in claim 1, is characterized in that, the metal material of this grid is copper.
4. thin-film transistor as claimed in claim 1, is characterized in that, this thin-film transistor is a top gate type thin film transistor.
5. thin-film transistor as claimed in claim 1, is characterized in that, in this gate insulator, to be less than 3 thickness be 7.5% to 12.5% of this gate insulator integral thickness for corresponding concentration of oxygen atoms and nitrogen atom concentration ratio, and contiguous this grid.
6. a manufacture method for thin-film transistor, is characterized in that, this manufacture method comprises:
Form the grid of at least one metal material;
In reaction chamber, being filled with silicomethane, nitrogen dioxide gas and nitrogen adopts the method formation gate insulator of chemical vapour deposition (CVD) on this grid, this gate insulator is for including silica, and the two mixture one of at least wherein of the chemical substance of the chemical substance of the bond that contains nitrogen and silicon and the bond that contains nitrogen and oxygen and silicon, and in this mixture, the concentration of oxygen atom and the concentration ratio of nitrogen-atoms are less than 3.
7. the manufacture method of thin-film transistor as claimed in claim 6, is characterized in that, also comprises:
One substrate is provided;
Form this at least one grid on this substrate;
Form semiconductor layer on this gate insulator; And
Forming source electrode and grid lays respectively on this semiconductor layer.
8. the manufacture method of thin-film transistor as claimed in claim 6, is characterized in that, the metal material of this grid is copper.
9. the manufacture method of thin-film transistor as claimed in claim 6, is characterized in that, in the step of formation gate insulator, this nitrogen being filled with in the unit interval and the volume ratio of this nitrogen dioxide are greater than 1.5.
10. the manufacture method of thin-film transistor as claimed in claim 9, it is characterized in that, it is in front 5% ~ 10% time period of the overall time in this gate insulator formation that the volume ratio of interior this nitrogen of unit interval and this nitrogen dioxide is greater than 1.5, and the thickness of this gate insulator forming within this time period is 7.5% to 12.5% of this gate insulator integral thickness, and contiguous this grid.
The manufacture method of 11. thin-film transistors as claimed in claim 6, is characterized in that, the reaction temperature that forms this gate insulator is more than 370 degrees Celsius.
The manufacture method of 12. thin-film transistors as claimed in claim 6, is characterized in that, the concentration of described oxygen atom refers to the quantity of oxygen atom in unit volume, and the concentration of nitrogen-atoms refers to the quantity of nitrogen-atoms in unit volume.
13. 1 kinds of display panels, it is characterized in that, comprise multiple as the scan line of the thin-film transistor of claim 1 to 5 any one, the setting of multirow parallel interval, the setting of multiple row parallel interval and with the vertically insulated data wire intersecting of this fine scanning line, the multiple pixel electrode of this fine scanning line and this multi-column data line institute delimited area, public electrode that relative this pixel electrode arranges of being arranged on, this thin-film transistor is arranged on this multiple row scan line and this multirow data wire intersection region.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101150833 | 2012-12-28 | ||
| TW101150833A TWI479664B (en) | 2012-12-28 | 2012-12-28 | Thin film transistor and method for manufacturing the same and liquid crystal display panel using the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103915346A true CN103915346A (en) | 2014-07-09 |
| CN103915346B CN103915346B (en) | 2017-02-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310157160.2A Active CN103915346B (en) | 2012-12-28 | 2013-04-30 | Thin film transistor, manufacturing method thereof and liquid crystal display panel |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103915346B (en) |
| TW (1) | TWI479664B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021179271A1 (en) * | 2020-03-12 | 2021-09-16 | 京东方科技集团股份有限公司 | Display substrate and manufacturing method therefor, and display panel |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6245652B1 (en) * | 1998-09-04 | 2001-06-12 | Advanced Micro Devices, Inc. | Method of forming ultra thin gate dielectric for high performance semiconductor devices |
| CN1692480A (en) * | 2002-01-15 | 2005-11-02 | 东京毅力科创株式会社 | Cvd method and device for forming silicon-containing insulation film |
| CN101393936A (en) * | 2008-11-10 | 2009-03-25 | 友达光电股份有限公司 | Low gate type thin-film transistor and method for producing the same |
| CN102473729A (en) * | 2009-07-03 | 2012-05-23 | 株式会社半导体能源研究所 | Method for manufacturing semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2452362B1 (en) * | 2009-07-10 | 2017-09-06 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
-
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- 2012-12-28 TW TW101150833A patent/TWI479664B/en active
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6245652B1 (en) * | 1998-09-04 | 2001-06-12 | Advanced Micro Devices, Inc. | Method of forming ultra thin gate dielectric for high performance semiconductor devices |
| CN1692480A (en) * | 2002-01-15 | 2005-11-02 | 东京毅力科创株式会社 | Cvd method and device for forming silicon-containing insulation film |
| CN101393936A (en) * | 2008-11-10 | 2009-03-25 | 友达光电股份有限公司 | Low gate type thin-film transistor and method for producing the same |
| CN102473729A (en) * | 2009-07-03 | 2012-05-23 | 株式会社半导体能源研究所 | Method for manufacturing semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021179271A1 (en) * | 2020-03-12 | 2021-09-16 | 京东方科技集团股份有限公司 | Display substrate and manufacturing method therefor, and display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103915346B (en) | 2017-02-15 |
| TW201427029A (en) | 2014-07-01 |
| TWI479664B (en) | 2015-04-01 |
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