CN103905001A - Amplifier - Google Patents
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- CN103905001A CN103905001A CN201410127907.4A CN201410127907A CN103905001A CN 103905001 A CN103905001 A CN 103905001A CN 201410127907 A CN201410127907 A CN 201410127907A CN 103905001 A CN103905001 A CN 103905001A
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Abstract
The invention discloses an amplifier comprising a plurality of transistors. The amplifier is provided with a first power terminal, a second power terminal, a third power terminal and a fourth power terminal. The third and fourth power terminals of the amplifier can be coupled to a dynamic power source, so that clipping distortion of output signals is avoided while efficiency of the amplifier is improved.
Description
Technical field
The present invention relates to electronic-circuit device, more specifically still not exclusively relate to many power efficient rate amplifier.
Background technology
Amplifier has been played the part of key player at analog to digital conversion circuit and power integrated circuit, and one of its critical function amplifies audio signal as audio frequency amplifier exactly.And the ratio of the peak power of voice or music signal and average power (Peak Average Ratio, PAR) larger, crest voltage is much larger than average voltage, and the common Gaussian distributed of its amplitude, the transient voltage amplitude of interior audio signal of most of the time is all well below its crest voltage amplitude.For fear of there is clipping distortion, the supply voltage of amplifier must be enough greatly can process most audio signals.Under this supply voltage, in the time that amplifier is processed the lower audio signal of amplitude, energy will loss on output transistor, the not only efficiency of step-down amplifier, also brings the problem of heat radiation.For example,, for amplifier 100 as shown in Figure 1, when supply voltage VCC is 5V, when output signal VO is 1V, voltage drop meeting on output transistor Q1 reaches 4V, and 80% supply voltage can be by transistor P1 loss, but not for produce available power on loud speaker SPK.Consider the loss of other assemblies of amplifier, now, amplifier transient state efficiency is less than 20%.Experiment showed, that its average efficiency is less than 20% in the time that the PAR of input signal is 15dB.How improving the efficiency of amplifier, is the difficult problem that those skilled in the art face.
Summary of the invention
Consider one or more problem of the prior art, a kind of amplifier is provided, comprise, the first current source, has first end and the second end, and its second end is coupled to the first power end; The first transistor, has first end, the second end and control end, and its second end is coupled to the first end of described the first current source, and its control end is configured to the first input end of described amplifier; Transistor seconds, has first end, the second end and control end, and its second end is coupled to the first end of described the first current source, and its control end is configured to the second input of described amplifier; The 3rd transistor, has first end, the second end and control end, and its first end is coupled to the first end of described the first transistor, and its second end is coupled to second source end, and its control end is coupled to its first end; The 4th transistor, has first end, the second end and control end, and its first end is coupled to the first end of described transistor seconds, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end; The 5th transistor, has first end, the second end and control end, and its second end is coupled to described second source end, and its control end is coupled to described the 4th transistorized first end; The 6th transistor, has first end, the second end and control end, and its first end is coupled to described the 5th transistorized first end, and its second end is coupled to the 3rd power end, and its control end is coupled to its first end; The 7th transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 6th transistorized control end; The 8th transistor, has first end, the second end and control end, and its first end is coupled to described the 7th transistorized first end, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end; The 9th transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 6th transistorized control end; The tenth transistor, has first end, the second end and control end, and its first end is coupled to described the 9th transistorized first end, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end; The 11 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 6th transistorized control end; The tenth two-transistor, has first end, the second end and control end, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end; The 13 transistor, has first end, the second end and control end, and its first end is coupled to the first end of described the tenth two-transistor, and its second end is coupled to described the 3rd power end, and its control end couples its first end; The 14 transistor, has first end, the second end and control end, and its first end is coupled to described the 11 transistorized first end, and its second end is coupled to described second source end, and its control end couples its first end; The 15 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 13 transistorized control end; The 16 transistor, has first end, the second end and control end, and its first end is coupled to described the 15 transistorized first end, and its second end is coupled to described second source end, and its control end couples described the 14 transistorized control end; The 17 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 13 transistorized control end; The 18 transistor, has first end, the second end and control end, and its first end is coupled to described the 17 transistorized first end, and its second end is coupled to described second source end, and its control end couples described the 14 transistorized control end; The 19 transistor, has first end, the second end and control end, and its first end is coupled to described the 17 transistorized first end, and its second end is coupled to described the 3rd power end, and its control end couples its first end; The 20 transistor, has first end, the second end and control end, and its first end is coupled to described the 16 transistorized first end, and its second end is coupled to the 4th power end, and its control end couples its first end; The 21 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end is coupled to described the 7th transistorized first end; The 20 two-transistor, there is first end, the second end and control end, its first end is coupled to described the 7th transistorized first end, and its second end is coupled to described the 21 transistorized first end, and its control end is coupled to described the 19 transistorized control end; The 23 transistor, has first end, the second end and control end, and its second end is coupled to described the 4th power end, and its control end is coupled to described the tenth transistorized first end; The 24 transistor, there is first end, the second end and control end, its first end is coupled to described the tenth transistorized first end, and its second end is coupled to described the 23 transistorized first end, and its control end is coupled to described the 20 transistorized control end; The 25 transistor, has first end, the second end and control end, and its first end is configured to the output of described amplifier, and its second end is coupled to described the 3rd power end, and its control end couples described the 21 transistorized control end; And the 26 transistor, thering is first end, the second end and control end, its first end is coupled to described the 25 transistorized first end, and its second end is coupled to described the 4th power end, and its control end couples described the 23 transistorized control end.
The voltage of the 4th power end of amplifier provided by the invention can be lower than the voltage of second source end, thereby improve the efficiency of this amplifier.The 3rd power end and the 4th power end of amplifier provided by the invention can also be coupled to dynamic power supplies, thereby avoid occurring clipping distortion in improving this efficiency of amplitude.
accompanying drawing explanation
Describe below with reference to the accompanying drawings the specific embodiment of the present invention in detail, wherein identical Reference numeral represents identical parts or feature.
Fig. 1 illustrates the circuit diagram of existing amplifier 100;
Fig. 2 illustrates the circuit diagram of amplifier 200 according to an embodiment of the invention;
Fig. 3 illustrates the oscillogram in the course of work of amplifier 200 according to an embodiment of the invention;
Fig. 4 illustrates the circuit diagram of amplifier 400 according to an embodiment of the invention;
Fig. 5 illustrates the circuit diagram of amplification system 500 according to an embodiment of the invention;
Fig. 6 illustrates the oscillogram in the course of work of amplification system 500 according to an embodiment of the invention;
Fig. 7 illustrates the circuit diagram of amplification system 700 according to an embodiment of the invention;
Fig. 8 illustrates the oscillogram in the course of work of amplification system 700 according to an embodiment of the invention; And
Fig. 9 illustrates the circuit diagram of amplifier 900 according to an embodiment of the invention.
embodiment
Represent exemplary embodiment of the present invention at specific embodiment below, and in essence only for example explanation is unrestricted.In the following description, in order to provide thorough understanding of the present invention, a large amount of specific detail have been set forth.But, it is evident that for those of ordinary skills: these specific detail are optional for the present invention.In other examples, for fear of obscuring the present invention, do not specifically describe known circuit, material or method.
In specification, mention that " embodiment " or " embodiment " mean in conjunction with the described special characteristic of this embodiment, structure or characteristic to comprise at least one embodiment of the present invention.Term " in one embodiment " each position in specification occurs all not relating to identical embodiment, neither mutually get rid of other embodiment or variable embodiment.Disclosed all features in this specification, or step in disclosed all methods or process, except mutually exclusive feature and/or step, all can combine by any way.In addition, it should be understood by one skilled in the art that the diagram providing at this is all for illustrative purposes, and diagram not necessarily in proportion draw.Should be appreciated that it can be directly connected or coupled to another element or can have intermediary element in the time claiming " element " " to be connected to " or " coupling " arrives another element.On the contrary, when claiming element " to be directly connected to " or when " being directly coupled to " another element, not having intermediary element.Identical Reference numeral is indicated identical element.In the time claiming a certain signal of " element " " reception ", can make direct reception, also can pass through the receptions such as switch, resistance, level displacement shifter, signal processing unit.Term "and/or" used herein comprises any and all combinations of one or more relevant projects of listing.
For amplifier example class ab ammplifier 100 as shown in Figure 1, in output signal VO mono-timing, its loss power depends on the amplitude size of its power supply VCC.The amplitude of power supply VCC is larger, and the pressure drop on output transistor Q1 is larger, and loss power is just larger.In the overwhelming majority time, the amplitude of audio output signal VO is well below the power supply VCC of amplifier 100.For this reason, can configure two pairs of power supplys for amplifier 100, for example high-voltage power supply and LVPS, within the lower time of most of output voltage, powered by LVPS, to reduce the voltage drop on output transistor Q1, reduces loss; In the time that output voltage VO is higher, powered by high-voltage power supply, to avoid producing clipping distortion.Can also configure dynamic power supplies for amplifier 100, the supply power voltage of dynamic power supplies can be followed signal and automatically be changed.When the amplitude of power amplifier output signal VO hour, it is that amplifier 100 is powered that dynamic power supplies provides the voltage that amplitude is lower; In the time that output signal VO amplitude exceedes certain thresholding, it is that amplifier 100 is powered that dynamic power supplies provides the voltage that amplitude is higher.
Fig. 2 illustrates the circuit diagram of amplifier 200 according to an embodiment of the invention.Amplifier 200 comprises two-stage, input stage 201 and output stage 202.Input stage 201, there is the first power end, second source end, first input end, the second input and the first amplification end, its first power end is coupled to earth potential GND, its second source end is coupled to such as 3.3V of supply voltage VCC(), its first input end receives the first input signal VIN1, its second input receives the second input signal VIN2, input stage 201 is amplified the difference VIN12 of the first input signal VIN1 and the second input signal VIN2, provides the first amplifying signal VA1 at its first amplification end.Output stage 202, there is the first power end, second source end, first input end and the first output, its first power end is coupled to earth potential GND, its second source end is coupled to dynamic power supplies VDD, its first input end receives the first amplifying signal VA1, amplifying stage 202 further amplifies the first amplifying signal VA1, provides output signal VO at its output.
Fig. 3 illustrates the oscillogram in the course of work of amplifier 200 according to an embodiment of the invention.When output signal VO amplitude hour, providing by dynamic power supplies VDD the low-voltage that an amplitude is VDDL is that output stage 202 is powered, and to reduce the voltage drop of output transistor Q1, thereby reduces the loss on transistor Q1; In the time that output signal VO amplitude is larger, it is that output stage 202 is powered that dynamic power supplies VDD provides the high voltage that an amplitude is VDDH, to avoid producing clipping distortion.In this process, it is constant that the supply voltage VCC of input stage 201 keeps, to avoid introducing noise in input stage 201.
Because second source end and the output stage 202 second source ends of input stage 201 are coupled to different voltage (or power supply), how to realize voltage (or power supply) with concrete circuit structure and switch, be the difficult point of Design enlargement device 200.Simultaneously, because the first power end of output stage 202 is coupled to ground power end, it is bigoted in the half of dynamic power supplies that this will make amplifier 200 export static point, cause exporting the upper DC power that produces of loud speaker SPK, how improving and make circuit output quiescent point be arranged on earth potential, is another difficult point of Design enlargement device 200.
Fig. 4 illustrates the circuit diagram of amplifier 400 according to an embodiment of the invention.Amplifier 400 comprises input stage 401, the first amplifying stage 402, the second amplifying stage 403 and output stage 404.
Input stage 401 comprises: the first current source I1, there is first end and the second end, and its second end is coupled to the first power end T1; The first transistor Q1(is following can be referred to as transistor Q1 or Q1), there is first end, the second end and control end, its second end is coupled to the first end of the first current source I1, and its control end is configured to the first input end IN1 of amplifier 400; Transistor seconds Q2, has first end, the second end and control end, and its second end is coupled to the first end of the first current source I1, and its control end is configured to the second input IN2 of amplifier 400; The 3rd transistor Q3, has first end, the second end and control end, and its first end is coupled to the first end of the first transistor Q1, and its second end is coupled to second source end T2, and its control end is coupled to its first end; The 4th transistor Q4, has first end, the second end and control end, and its first end is coupled to the first end of transistor seconds Q2, and its second end is coupled to second source end T2, and its control end is coupled to the control end of the 3rd transistor Q3.
The first amplifying stage 402 comprises: the 5th transistor Q5, there is first end, the second end and control end, and its second end is coupled to second source end T2, and its control end is coupled to the first end of the 4th transistor Q4; The 6th transistor Q6, has first end, the second end and control end, and its first end is coupled to the first end of the 5th transistor Q5, and its second end is coupled to the 3rd power end T3, and its control end is coupled to its first end; The 7th transistor Q7, has first end, the second end and control end, and its second end is coupled to the 3rd power end T3, and its control end couples the control end of the 6th transistor Q6; The 8th transistor Q8, has first end, the second end and control end, and its first end is coupled to the first end of the 7th transistor Q7, and its second end is coupled to second source end T2, and its control end is coupled to the control end of the 3rd transistor Q3; The 9th transistor Q9, has first end, the second end and control end, and its second end is coupled to the 3rd power end T3, and its control end couples the control end of the 6th transistor Q6; The tenth transistor Q10, has first end, the second end and control end, and its first end is coupled to the first end of the 9th transistor Q9, and its second end is coupled to second source end T2, and its control end is coupled to the control end of the 3rd transistor Q3;
The second amplifying stage 403 comprises: the 11 transistor Q11, there is first end, the second end and control end, and its second end is coupled to the 3rd power end T3, and its control end couples the control end of the 6th transistor Q6; The tenth two-transistor Q12, has first end, the second end and control end, and its second end is coupled to second source end T2, and its control end is coupled to the control end of the 3rd transistor Q3; The 13 transistor Q13, has first end, the second end and control end, and its first end is coupled to the first end of the tenth two-transistor Q12, and its second end is coupled to the 3rd power end T3, and its control end couples its first end; The 14 transistor Q14, has first end, the second end and control end, and its first end is coupled to the first end of the 11 transistor Q11, and its second end is coupled to second source end T2, and its control end couples its first end; The 15 transistor Q15, has first end, the second end and control end, and its second end is coupled to the 3rd power end T3, and its control end couples the control end of the 13 transistor Q13; The 16 transistor Q16, has first end, the second end and control end, and its first end is coupled to the first end of the 15 transistor Q15, and its second end is coupled to second source end T2, and its control end couples the control end of the 14 transistor Q14; The 17 transistor Q17, has first end, the second end and control end, and its second end is coupled to the 3rd power end T3, and its control end couples the control end of the 13 transistor Q13; The 18 transistor Q18, has first end, the second end and control end, and its first end is coupled to the first end of the 17 transistor Q17, and its second end is coupled to second source end T2, and its control end couples the control end of the 14 transistor Q14;
According to one embodiment of present invention, transistorized size can be set to: the first transistor Q1 and transistor seconds Q2 are the transistor (dimension scale is 1:1) of coupling, the dimension scale of the 3rd transistor Q3, the 4th transistor Q4, the 5th transistor Q5, the 8th transistor Q8 and the tenth transistor Q10 is: 1:1:1:(α+1): α, the dimension scale of the 6th transistor Q6, the 7th transistor Q7 and the 9th transistor Q9 is: 1: α: (α+1), wherein in the embodiment optimizing, α is greater than 1.The electric current of supposing the first current source is 2I, under stable state, the bias current of the 7th transistor Q7, the 8th transistor Q8, the 9th transistor Q9 and the tenth transistor Q10 is respectively α I, (α+1) I, (α+1) I and α I, and the bias current of the 21 transistor Q21 and the 23 transistor Q23 is I so.Under limit, the 21 transistor Q21 and the 20 two-transistor Q22 all work in saturation region, and the 21 transistor Q21 and the 25 transistor Q25 will work in current mirror pattern for this reason.Suppose, the dimension scale of the 21 transistor Q21 and the 25 transistor Q25 is 1: β, and wherein β is greater than 1, and the bias current of the 25 transistor Q25 is β I, and the bias current of the 25 transistor Q25 is effectively controlled.Under amplification mode, the voltage of supposing first input end IN1 raises, the 3rd transistor Q3 electric current increases, the electric current of the 8th transistor Q8 can increase, and the electric current of the 7th transistor Q7 can reduce, cause the electric current of the 21 transistor Q21 and the 20 two-transistor Q22 to increase, thereby make the 21 transistor Q21 enter linear zone (the first end lower voltage of the 21 transistor Q21, the control end voltage of the 21 transistor Q21 raises), node A will enter high-impedance state.Now, the no longer electric current of mirror image the 21 transistor Q21 of the 25 transistor Q25, but under the control end voltage control of the 21 transistor Q21, carry out the amplification of voltage and/or electric current.In like manner, under amplification mode, in the time of the lower voltage of first input end IN1, Node B will enter high-impedance state.
The bias voltage of the 19 transistor Q19 and the 21 transistor Q21 can be provided respectively by two constant-current sources (current source that for example electric current is I and electric current are heavy to be provided respectively).According to one embodiment of present invention, for bias current (be the 20 two-transistor Q22 and the 24 transistor Q24 bias voltage is provided) being provided to the 19 transistor Q19 and the 21 transistor Q21, the amplifying power that simultaneously further increases amplifier 400, amplifier 400 further comprises the second amplifying stage 403.According to one embodiment of present invention, the dimension scale of the 3rd transistor Q3 and the tenth two-transistor Q12 is 1:1, the dimension scale of the 6th transistor Q6 and the 11 transistor Q11 is 1:1, the 13 transistor Q13, the dimension scale of the 15 transistor Q15 and the 17 transistor Q17 is: 1:(γ+1): γ, the 14 transistor Q14, the dimension scale of the 16 transistor Q16 and the 18 transistor Q18 is: 1: γ: (γ+1), the 15 transistor Q15 under stable state, the 16 transistor Q16, the bias current of the 17 transistor Q17 and the 18 transistor Q18 is respectively (γ+1) I, γ I, γ I, (γ+1) I, the electric current of the 20 transistor Q20 and the 19 transistor Q19 is I so.,, under stable state, the second amplifying stage 403, for the 19 transistor Q19 and the 21 transistor Q21 provide stable bias current, is the 20 two-transistor Q22 and the 24 transistor Q24 stable bias voltage is provided.Under amplification mode, suppose that IN1 voltage raises, the 3rd transistor Q3 electric current increases, the electric current of the tenth two-transistor Q12 and the 17 transistor Q17 also can increase, and the electric current of the 11 transistor Q11 and the 18 transistor Q18 can reduce, cause the electric current of the 19 transistor Q19 to reduce, make the 20 two-transistor Q22 control end lower voltage, thereby make the 21 transistor Q21 enter quickly linear zone (the first end lower voltage of the 21 transistor Q21, for guaranteeing current capacity, the control end voltage of the 21 transistor Q21 will raise).
According to one embodiment of present invention, the first transistor Q1, transistor seconds Q2, the 6th transistor Q6, the 7th transistor Q7, the 9th transistor Q9, the 11 transistor Q11, the 13 transistor Q13, the 15 transistor Q15, the 17 transistor Q17, the 19 transistor Q19, the 21 transistor Q21, the 20 two-transistor Q22, the 25 transistor Q25 is NPN transistor or N-channel MOS transistor, the 3rd transistor Q3, the 4th transistor Q4, the 5th transistor Q5, the 8th transistor Q8, the tenth transistor Q10, the tenth two-transistor Q12, the 14 transistor Q14, the 16 transistor Q16, the 18 transistor Q18, the 20 transistor Q20, the 23 transistor Q23, the 24 transistor Q24 and the 26 transistor Q26 are PNP transistor or P channel MOS transistor.Under above-mentioned configuration, the voltage of the first power end T1 is lower than the voltage of second voltage end T2, and the voltage of the 3rd power end T3 is lower than the voltage of the 4th voltage end T4.
According to one embodiment of present invention, the first transistor Q1, transistor seconds Q2, the 6th transistor Q6, the 7th transistor Q7, the 9th transistor Q9, the 11 transistor Q11, the 13 transistor Q13, the 15 transistor Q15, the 17 transistor Q17, the 19 transistor Q19, the 21 transistor Q21, the 20 two-transistor Q22, the 25 transistor Q25 is PNP transistor or P channel MOS transistor, the 3rd transistor Q3, the 4th transistor Q4, the 5th transistor Q5, the 8th transistor Q8, the tenth transistor Q10, the tenth two-transistor Q12, the 14 transistor Q14, the 16 transistor Q16, the 18 transistor Q18, the 20 transistor Q20, the 23 transistor Q23, the 24 transistor Q24 and the 26 transistor Q26 are NPN transistor or N-channel MOS transistor.Under above-mentioned configuration, the voltage of the first power end T1 is higher than the voltage of second voltage end T2, and the voltage of the 3rd power end T3 is higher than the voltage of the 4th voltage end T4.
Fig. 5 illustrates the circuit diagram of amplification system 500 according to an embodiment of the invention.Amplification system 500 comprises amplifier 200 and feedback resistance RF1 ~ RF4, can directly the differential signal with non-zero (1.2V) common mode electrical level (VD1 and VD2) of audio system output be converted into the single-ended signal VO12 take earth potential as quiescent point.
With reference to figure 5, the second input of amplifier 200 is coupled to respectively the first differential signal VD1 and ground power end by the first feedback resistance RF1 and the second feedback resistance RF2, its first input end is coupled to respectively the second differential signal VD1 and its output by the 3rd feedback resistance RF3 and the 4th feedback resistance RF4, its first power end T1 couples the reference power source end (earth potential) of audio system, its second source end T2 couples the stable state power supply (5V) of audio system, its the 3rd power end T3 couples the first negative voltage (2.5V), its the 4th power end T4 couples the first positive voltage (2.5V).It is pointed out that feedback resistance RF1 ~ RF4 can be integrated in amplifier 400 inside, as a part for amplifier 400.
Fig. 6 illustrates the working waveform figure of amplification system 500 according to an embodiment of the invention.VD1 and VD2 are that common mode electrical level is the differential signal of 1.2V, are output as the single-ended signal that level is 0V.Audio frequency is input as at 1 o'clock (VD1 and VD2 equate), and output VO12 is 0V, can not produce quiescent current on SPK.Because the output stage of output amplifier 200 has adopted 2.5V power supply, but not 5V voltage, thereby improve power utilization rate, improve efficiency.Those skilled in the art can also be as required, and the first positive voltage (or first negative voltage) is set flexibly, and for example 1.2V, 3V, 4.2V are to improve power-efficient.
Fig. 7 illustrates the circuit diagram of amplification system 700 according to an embodiment of the invention.Be with amplification system 500 differences shown in Fig. 5, the 3rd power end T3 couples negative dynamic negative supply VDN, and its 4th power end T4 is coupled to orthokinesis power vd P.
Fig. 8 illustrates the working waveform figure of amplification system 700 according to an embodiment of the invention.VD1 and VD2 are that common mode electrical level is the differential signal of 1.2V, and being output as level is the single-ended signal VO12 of 0V.When output signal VO12 be greater than zero and amplitude hour, orthokinesis power vd P output amplitude is such as 1.25V of VDPL() voltage be that amplifier 400 is powered, to improve power utilization rate; When output signal VO12 be greater than zero and amplitude hour, orthokinesis power vd P output amplitude is such as 2.5V of VDPH() voltage be that amplifier 400 is powered, to avoid output signal VO12 by power supply slicing.When output signal VO12 be less than zero and amplitude hour, negative dynamic power supplies VDN output amplitude be VDNL(for example-1.25V) voltage be that amplifier 400 is powered, to improve power utilization rate; When output signal VO12 be greater than zero and amplitude hour, negative dynamic power supplies VDN output amplitude be VDNH(for example-2.5V) voltage be that amplifier 400 is powered, to avoid output signal VO12 by power supply slicing.
Those skilled in the art, can rationally arrange according to medical field transistor size and the ratio of high efficiency amplifier 200, to determine the parameters such as its gain, current amplification factor, static working current.In some arrange, because gain is higher, may cause in the time of certain applications loop unstable.For this reason, need to compensate it.
Fig. 9 illustrates high efficiency amplifier 900 according to an embodiment of the invention.High efficiency amplifier 900 is further to improve to increase its stability on the basis of amplifier 400, those skilled in the art will appreciate that Fig. 9 shows multiple corrective measure, and these measures can be separately or all for the amplifier 400 shown in Fig. 4.
According to one embodiment of the invention, high efficiency amplifier 900 comprises the first building-out capacitor CC1, has first end and the second end, and its first end is coupled to the first end of transistor seconds Q2, and its second end is coupled to the first end of the 25 transistor Q25.In the time being coupled between the first end of transistor seconds Q2 and the first end of the 25 transistor Q25, the first building-out capacitor CC1 can produce the Miller effect, and its effective capacitance will increase hundreds of times, thereby has effectively reduced circuit area.
According to one embodiment of the invention, amplifier 900 also comprises and comprising, the first compensating resistance RC1 has first end and the second end, and its first end is coupled to the control end of the 25 transistor Q25; The second building-out capacitor CC2, has first end and the second end, and its first end is coupled to the second end of the first compensating resistance RC1, and its second end is coupled to the first end of the 25 transistor Q25; The second compensating resistance RC2, has first end and the second end, and its first end is coupled to the control end of the 26 transistor Q26; The 3rd building-out capacitor CC3, has first end and the second end, and its first end is coupled to the second end of the second resistance, and its second end is coupled to the first end of the 26 transistor Q26.The zero point that the first compensating resistance RC1 and the second compensating resistance RC2 can effectively eliminate the introducing of the 25 transistor Q25 and the 26 transistor Q26, thereby intensifier circuit stability.
Those skilled in the art can also compensate amplifier 900 by other modes, for example introducing large electric capacity at the first end of transistor seconds Q2 compensates, introduce large electric capacity at the 25 transistor Q25 control end and compensate, or introducing feedforward path compensates.
According to one embodiment of the invention, amplifier 900 comprise also comprise in first protective circuit 901(Fig. 9, be divided into 901a and two parts of 901b).The first protective circuit 901 comprises that the 27 transistor Q27, first postpones resistance RD1, first and postpones electric capacity CD1 and the 28 transistor Q28.The 27 transistor Q27, has first end, the second end and control end, and its second end is coupled to the 3rd power end T3, and its control end couples the control end of the 21 transistor Q21; First postpones resistance RD1, has first end and the second end, and its first end is coupled to the first end of the 27 transistor Q27, and its second end is coupled to second source end T2; First postpones electric capacity CD1, has first end and the second end, and its first end is coupled to the first end of the 27 transistor Q27, and its second end is coupled to second source end T2; The 28 transistor Q28, has first end, the second end and control end, and its first end is coupled to the control end of the 3rd transistor Q3, and its second end is coupled to second source end T2, and its control end couples the first end of the 27 transistor Q27.In running especially start-up course; the electric current of the first protective circuit 901 based on the 25 transistor Q25 adjusted the each transistorized bias current of amplifier 900 (the especially electric current of the 3rd transistor Q3); in the time that the electric current of the 25 transistor Q25 is excessive, will reduce the electric current of the 25 transistor Q25 by the electric current that reduces the 3rd transistor Q3, thus effectively suppressed amplifier 900 move due to voltage spikes in start-up course especially and, the overcurrent of voltage overshoot and the 25 transistor Q25.
According to one embodiment of the invention, amplifier 900 comprise also comprise in second protective circuit 902(Fig. 9, be divided into 902a and two parts of 902b).The second protective circuit 902 comprises that the 29 transistor Q29, second postpones resistance RD2, second and postpones electric capacity CD2 and the 30 transistor Q30.The 29 transistor Q29, has first end, the second end and control end, and its second end is coupled to the 4th power end T4, and its control end couples the control end of the 23 transistor Q23; Second postpones resistance RD2, has first end and the second end, and its first end is coupled to the first end of the 29 transistor Q29, and its second end is coupled to the 3rd power end T3; Second postpones electric capacity CD2, has first end and the second end, and its first end is coupled to the first end of the 29 transistor Q29, and its second end is coupled to the 3rd power end T3; The 30 transistor Q30, has first end, the second end and control end, and its first end is coupled to the control end of the 6th transistor Q6, and its second end is coupled to the 3rd power end T3, and its control end couples the first end of the 29 transistor Q29.In running especially start-up course; the electric current of the second protective circuit 902 based on the 26 transistor Q26 adjusted the each transistorized bias current of amplifier 900 (the especially electric current of the 6th transistor Q6); in the time that the electric current of the 26 transistor Q26 is excessive, will reduce the electric current of the 26 transistor Q26 by the electric current that reduces the 6th transistor Q6, thus effectively suppressed amplifier 900 move due to voltage spikes in start-up course especially and, the overcurrent of voltage overshoot and the 26 transistor Q26.。
The measure word " one ", " one " etc. that used in this disclosure are not got rid of plural number." first ", " second " etc. in literary composition are only illustrated in the sequencing occurring in the description of embodiment, so that distinguish like." first ", " second " appearance in claims are only for the ease of the fast understanding to claim rather than in order to be limited.Any Reference numeral in claims all should not be construed as the restriction to scope.
Claims (10)
1. an amplifier, comprises,
The first current source, has first end and the second end, and its second end is coupled to the first power end;
The first transistor, has first end, the second end and control end, and its second end is coupled to the first end of described the first current source, and its control end is configured to the first input end of described amplifier;
Transistor seconds, has first end, the second end and control end, and its second end is coupled to the first end of described the first current source, and its control end is configured to the second input of described amplifier;
The 3rd transistor, has first end, the second end and control end, and its first end is coupled to the first end of described the first transistor, and its second end is coupled to second source end, and its control end is coupled to its first end;
The 4th transistor, has first end, the second end and control end, and its first end is coupled to the first end of described transistor seconds, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end;
The 5th transistor, has first end, the second end and control end, and its second end is coupled to described second source end, and its control end is coupled to described the 4th transistorized first end;
The 6th transistor, has first end, the second end and control end, and its first end is coupled to described the 5th transistorized first end, and its second end is coupled to the 3rd power end, and its control end is coupled to its first end;
The 7th transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 6th transistorized control end;
The 8th transistor, has first end, the second end and control end, and its first end is coupled to described the 7th transistorized first end, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end;
The 9th transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 6th transistorized control end;
The tenth transistor, has first end, the second end and control end, and its first end is coupled to described the 9th transistorized first end, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end;
The 11 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 6th transistorized control end;
The tenth two-transistor, has first end, the second end and control end, and its second end is coupled to described second source end, and its control end is coupled to described the 3rd transistorized control end;
The 13 transistor, has first end, the second end and control end, and its first end is coupled to the first end of described the tenth two-transistor, and its second end is coupled to described the 3rd power end, and its control end couples its first end;
The 14 transistor, has first end, the second end and control end, and its first end is coupled to described the 11 transistorized first end, and its second end is coupled to described second source end, and its control end couples its first end;
The 15 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 13 transistorized control end;
The 16 transistor, has first end, the second end and control end, and its first end is coupled to described the 15 transistorized first end, and its second end is coupled to described second source end, and its control end couples described the 14 transistorized control end;
The 17 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 13 transistorized control end;
The 18 transistor, has first end, the second end and control end, and its first end is coupled to described the 17 transistorized first end, and its second end is coupled to described second source end, and its control end couples described the 14 transistorized control end;
The 19 transistor, has first end, the second end and control end, and its first end is coupled to described the 17 transistorized first end, and its second end is coupled to described the 3rd power end, and its control end couples its first end;
The 20 transistor, has first end, the second end and control end, and its first end is coupled to described the 16 transistorized first end, and its second end is coupled to the 4th power end, and its control end couples its first end;
The 21 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end is coupled to described the 7th transistorized first end;
The 20 two-transistor, there is first end, the second end and control end, its first end is coupled to described the 7th transistorized first end, and its second end is coupled to described the 21 transistorized first end, and its control end is coupled to described the 19 transistorized control end;
The 23 transistor, has first end, the second end and control end, and its second end is coupled to described the 4th power end, and its control end is coupled to described the tenth transistorized first end;
The 24 transistor, there is first end, the second end and control end, its first end is coupled to described the tenth transistorized first end, and its second end is coupled to described the 23 transistorized first end, and its control end is coupled to described the 20 transistorized control end;
The 25 transistor, has first end, the second end and control end, and its first end is configured to the output of described amplifier, and its second end is coupled to described the 3rd power end, and its control end couples described the 21 transistorized control end; And
The 26 transistor, has first end, the second end and control end, and its first end is coupled to described the 25 transistorized first end, and its second end is coupled to described the 4th power end, and its control end couples described the 23 transistorized control end.
2. amplifier according to claim 1, wherein, described the first transistor, described transistor seconds, described the 6th transistor, described the 7th transistor, described the 9th transistor, described the 11 transistor, described the 13 transistor, described the 15 transistor, described the 17 transistor, described the 19 transistor, described the 21 transistor, described the 20 two-transistor, described the 25 transistor are NPN transistor or N-channel MOS transistor; Described the 3rd transistor, described the 4th transistor, described the 5th transistor, described the 8th transistor, described the tenth transistor, described the tenth two-transistor, described the 14 transistor, described the 16 transistor, described the 18 transistor, described the 20 transistor, described the 23 transistor, described the 24 transistor and described the 26 transistor are PNP transistor or P channel MOS transistor.
3. amplifier according to claim 1, wherein, described the first transistor, described transistor seconds, described the 6th transistor, described the 7th transistor, described the 9th transistor, described the 11 transistor, described the 13 transistor, described the 15 transistor, described the 17 transistor, described the 19 transistor, described the 21 transistor, described the 20 two-transistor, described the 25 transistor are PNP transistor or P channel MOS transistor; Described the 3rd transistor, described the 4th transistor, described the 5th transistor, described the 8th transistor, described the tenth transistor, described the tenth two-transistor, described the 14 transistor, described the 16 transistor, described the 18 transistor, described the 20 transistor, described the 23 transistor, described the 24 transistor and described the 26 transistor are NPN transistor or N-channel MOS transistor.
4. amplifier according to claim 1, wherein, the first power end of described amplifier is coupled to earth potential, the second source end of described amplifier is coupled to stable state positive voltage, the 3rd power end of described amplifier is coupled to the first negative voltage, and the 4th power end of described amplifier is coupled to the first positive voltage.
5. amplifier according to claim 4, wherein, described amplifier also comprises,
The first feedback resistance, has first end and the second end, and its second end is coupled to the second input of described amplifier;
The second feedback resistance, has first end and the second end, and its first end is coupled to the second input of described amplifier, and its second end is coupled to earth potential;
The 3rd feedback resistance, has first end and the second end, and its second end is coupled to the first input end of described amplifier; And
The 4th feedback resistance, has first end and the second end, and its first end is coupled to the first input end of described amplifier, and its second end is coupled to the output of described amplifier.
6. amplifier according to claim 1, wherein, described the 3rd power end and/or described the 4th power end are coupled to dynamic power supplies, and described dynamic power supplies at least has two voltage magnitudes.
7. amplifier according to claim 1, wherein, described amplifier also comprises the first building-out capacitor, has first end and the second end, its first end is coupled to the first end of described transistor seconds, and its second end is coupled to described the 25 transistorized first end.
8. amplifier according to claim 1, wherein, described amplifier also comprises,
The first compensating resistance, has first end and the second end, and its first end is coupled to described the 25 transistorized control end;
The second building-out capacitor, has first end and the second end, and its first end is coupled to the second end of described the first compensating resistance, and its second end is coupled to described the 25 transistorized first end;
The second compensating resistance, has first end and the second end, and its first end is coupled to described the 26 transistorized control end; And
The 3rd building-out capacitor, has first end and the second end, and its first end is coupled to the second end of described the second compensating resistance, and its second end is coupled to described the 26 transistorized first end.
9. amplifier according to claim 1, wherein, described amplifier also comprises,
The 27 transistor, has first end, the second end and control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 21 transistorized control end;
First postpones resistance, has first end and the second end, and its first end is coupled to described the 27 transistorized first end, and its second end is coupled to described second source end;
First postpones electric capacity, has first end and the second end, and its first end is coupled to described the 27 transistorized first end, and its second end is coupled to described second source end; And
The 28 transistor, has first end, the second end and control end, and its first end is coupled to described the 3rd transistorized control end, and its second end is coupled to described second source end, and its control end couples described the 27 transistorized first end.
10. amplifier according to claim 1, wherein, described amplifier also comprises,
The 29 transistor, has first end, the second end and control end, and its second end is coupled to described the 4th power end, and its control end couples described the 23 transistorized control end;
Second postpones resistance, has first end and the second end, and its first end is coupled to described the 29 transistorized first end, and its second end is coupled to described the 3rd power end;
Second postpones electric capacity, has first end and the second end, and its first end is coupled to described the 29 transistorized first end, and its second end is coupled to described the 3rd power end; And
The 30 transistor, has first end, the second end and control end, and its first end is coupled to described the 6th transistorized control end, and its second end is coupled to described the 3rd power end, and its control end couples described the 29 transistorized first end.
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| CN201410127907.4A CN103905001B (en) | 2014-04-01 | 2014-04-01 | A kind of amplifier |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106899270A (en) * | 2017-04-13 | 2017-06-27 | 成都信息工程大学 | A kind of dynamic monitoring circuit |
| CN107026618A (en) * | 2017-04-13 | 2017-08-08 | 成都信息工程大学 | High-efficiency amplifier and the method for controlling its power supply |
| CN107040218A (en) * | 2017-04-13 | 2017-08-11 | 成都信息工程大学 | A kind of CAP FREE amplifiers |
| CN107070410A (en) * | 2017-04-13 | 2017-08-18 | 成都信息工程大学 | A kind of dynamic power supplies amplifier |
| CN113014246A (en) * | 2021-02-20 | 2021-06-22 | 广东省科学院半导体研究所 | Voltage level shifter and electronic device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101247110B (en) * | 2007-12-07 | 2010-04-21 | 南京大学 | Push-pull power amplifier without matching amplifier tube |
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2014
- 2014-04-01 CN CN201410127907.4A patent/CN103905001B/en not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106899270A (en) * | 2017-04-13 | 2017-06-27 | 成都信息工程大学 | A kind of dynamic monitoring circuit |
| CN107026618A (en) * | 2017-04-13 | 2017-08-08 | 成都信息工程大学 | High-efficiency amplifier and the method for controlling its power supply |
| CN107040218A (en) * | 2017-04-13 | 2017-08-11 | 成都信息工程大学 | A kind of CAP FREE amplifiers |
| CN107070410A (en) * | 2017-04-13 | 2017-08-18 | 成都信息工程大学 | A kind of dynamic power supplies amplifier |
| CN106899270B (en) * | 2017-04-13 | 2023-04-28 | 成都信息工程大学 | Dynamic monitoring circuit |
| CN107070410B (en) * | 2017-04-13 | 2023-04-28 | 成都信息工程大学 | Dynamic power amplifier |
| CN107026618B (en) * | 2017-04-13 | 2023-05-02 | 成都信息工程大学 | High efficiency amplifier and method for controlling power supply thereof |
| CN107040218B (en) * | 2017-04-13 | 2023-05-16 | 成都信息工程大学 | CAP-FREE amplifier |
| CN113014246A (en) * | 2021-02-20 | 2021-06-22 | 广东省科学院半导体研究所 | Voltage level shifter and electronic device |
| CN113014246B (en) * | 2021-02-20 | 2022-02-22 | 广东省科学院半导体研究所 | Voltage level shifter and electronic device |
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