CN103901337A - Test system and method for measuring I-V circuit through integrated switch matrix - Google Patents
Test system and method for measuring I-V circuit through integrated switch matrix Download PDFInfo
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Abstract
The invention provides a test system and method for measuring an I-V circuit through an integrated switch matrix. The test system comprises a driver chip, a measured component and a measuring device. A plurality of pins of the driver chip are connected with a plurality of pins of the measured component in a point-to-point mode. The measuring device is used for generating data and loading the data into the measured component. The data are received by the measured component, and an analog voltage level output by the measured component is measured. Each pin of the driver chip is provided with a driver/receiver chip and a first transistor switch matrix, wherein the driver/receiver chip is provided with an electrostatic discharge protective device, and through the first transistor switch matrix, one of multiple different voltages can be loaded into the measured component, or the level can be received and loaded to the measured component. The measuring device is connected with the corresponding pins of the driver chip through second transistor switch matrixes. The test system and method are used for integration circuits, and voltage with a wider range can be measured more effectively by switching grounding voltage and power voltage without causing discharge of an electrostatic discharge diode.
Description
[technical field]
The present invention relates to technical field of measurement and test, particularly a kind of test macro and method of measuring I-V circuit; The present invention is applied to the system that comprises a series of elements, and wherein having a kind of element at least is integrated circuit, and everything does is integrated component, can be also discrete component.
[background technology]
Integrated circuit and at least (can be that integrated component can be an also discrete component) two-way signaling bus of existence (one or more signal) between another one element.This that is to say: a) this integrated circuit can be by voltage or the signal driver with certain frequency to this element or switched to tri-state; Or b) this element can be sent to integrated circuit by level or switching signal.
A kind of most typical application (but not being unique application) is exactly to utilize integrated circuit to produce signal, then signal is sent to the test macro of measured device.Under other operator schemes, this test macro also can be measured the magnitude of voltage of measured device pin in the time that test macro does not have driving voltage.
Most of integrated circuit are all provided with Electrostatic Discharge holding circuit on all pins; avoid the damage of high ESD (static discharge) voltage in order to Protective IC, while processing the circuit board that integrated circuit or processing contain integrated circuit, may produce high ESD (static discharge) voltage.
This electrostatic discharge circuit aims at that voltage exceedes the supply voltage of integrated circuit or discharges the electric charge gathering on pin during lower than the ground voltage of integrated circuit and designs.Under any circumstance (without switchgear), electrostatic discharge protective equipment must directly be connected with pin with line, could effectively play a role.
But electrostatic discharge (ESD) protection has limited integrated circuit and can receive and the voltage range of gauge signal.For example: if the voltage receiving has exceeded the supply voltage of integrated circuit, electrostatic discharge protective equipment can discharge, and then the surveying work that carries out on pin of impact.
At present, existing test macro connects integrated circuit with high-performance relay to drive or receive data, or connects independently measurement mechanism (as multimeter).
Relay can disconnect being connected between integrated circuit and/or measurement mechanism and measured device.Therefore,, when integrated circuit disconnects, the voltage range that uses measurement mechanism to measure is wider.
The serviceable life that an existing methodical weak point is exactly relay is limited.Especially need between integrated circuit and measurement mechanism, frequently switch in the application of occasion, the serviceable life of the fixing system of determining the serviceable life of relay, or system breaks down or time interval that system is keeped in repair.
In addition, in integrated circuit, the conversion of signalling channel only needs several nanoseconds, and by comparison, signal conversion and the foundation of relay need for a long time (a few tens of milliseconds).Meanwhile, relay (especially high-performance relay) is expensive, has also increased the complexity (needing extra discrete component) of system.
[summary of the invention]
The object of the present invention is to provide a kind of test macro and method of utilizing integrated switch matrix to measure I-V circuit, to solve the problems of the technologies described above.The present invention proposes switch matrix (outside relay) to move into integrated circuit.The switch (simple transmission gate) that relay is integrated in circuit replaces.There is no outside relay, reduced costs with this, simplified system, can also reduce switching time and test required All Time, and improved the serviceable life of system simultaneously.
To achieve these goals, the present invention adopts following technical scheme:
Utilize integrated switch matrix to measure the test macro of I-V circuit, comprise driver chip, measured device and measurement mechanism; Multiple pins of driver chip are connected in point-to-point mode with multiple pins of measured device; Measurement mechanism for generation of and data are written in measured device, receive data measure the analog voltage level of its output from measured device; On each pin of driver chip, be provided with the driver/receiver chip containing electrostatic discharge protective equipment, and a voltage in multiple different voltage can be written into measured device or can incoming level and this level is loaded into the first transistor switch matrix of measured device; Measurement mechanism connects corresponding driver chip pin by transistor seconds switch matrix.
The present invention further improves and is: while measurement, disconnect the first transistor switch matrix, in the transistor seconds switch matrix that simultaneously closes one, a driver chip pin of correspondence is connected with measurement mechanism; Measurement mechanism produces and data is written in measured device, receive data and measure the analog voltage level of its output from measured device, if this measured value is stored or exported to the value that measurement mechanism detects, between ground voltage VSS and supply voltage VDD,, then measure next time; If the value that measurement mechanism detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism adjusting driver chip and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
The method that the test macro that utilizes integrated switch matrix to measure I-V circuit is tested, comprise the following steps: while measurement, disconnect the first transistor switch matrix, in the transistor seconds switch matrix that simultaneously closes one, a driver chip pin of correspondence is connected with measurement mechanism; Measurement mechanism produces and data is written in measured device, receive data and measure the analog voltage level of its output from measured device, if this measured value is stored or exported to the value that measurement mechanism detects, between ground voltage VSS and supply voltage VDD,, then measure next time; If the value that measurement mechanism detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism adjusting driver chip and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
Utilize integrated switch matrix to measure the test macro of I-V circuit, comprise driver chip, measured device and measurement mechanism; Driver chip comprises multiple the first pins, and driver chip is provided with many drive wires that connect corresponding the first pin; Each the first pin is all connected with ESD protection circuit; Driver chip is provided with the first transistor switch matrix and transistor seconds switch matrix; The first transistor switch matrix comprises three groups, is respectively used to drive high level line Vh, drives medium level/termination level line Vtt and drive low level line VI to be connected the first pin by corresponding drive wire; Transistor seconds switch matrix connects the first pin for measurement mechanism by corresponding drive wire; On measured device, there are multiple second pins that can be driven by driver chip, the first pin and the second pin corresponding connection one to one; Driver chip uses by the transistor switch (302) of the sequencer control of driver chip each the second pin is connected with available driving high level line Vh, driving medium level/termination level line Vtt or driving low level line VI.
The present invention further improves and is: while measurement, disconnect the first transistor switch matrix, in the transistor seconds switch matrix that simultaneously closes one, a driver chip pin of correspondence is connected with measurement mechanism; Measurement mechanism produces and data is written in measured device, receive data and measure the analog voltage level of its output from measured device, if this measured value is stored or exported to the value that measurement mechanism detects, between ground voltage VSS and supply voltage VDD,, then measure next time; If the value that measurement mechanism detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism adjusting driver chip and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
The method that the test macro that utilizes integrated switch matrix to measure I-V circuit is tested, comprise the following steps: while measurement, disconnect the first transistor switch matrix, in the transistor seconds switch matrix that simultaneously closes one, a driver chip pin of correspondence is connected with measurement mechanism; Measurement mechanism produces and data is written in measured device, receive data and measure the analog voltage level of its output from measured device, if this measured value is stored or exported to the value that measurement mechanism detects, between ground voltage VSS and supply voltage VDD,, then measure next time; If the value that measurement mechanism detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism adjusting driver chip and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
Utilize integrated switch matrix to measure the test macro of I-V circuit, comprise the driving voltage of n the different electro-static discharge structure that is connected to driver chip, a described n driving voltage connects driver/receiver chip by the first transistor matrix; A described n driving voltage only has the afterbody driving stage to power to driver/receiver chip, and the remainder of driver/receiver chip is powered by VDD/VSS; Can VDD/VSS be switched to VDDlast/VSSlast region by level shifter; N driving voltage and VDD, VSS are separate; While measuring the voltage on the pin being connected with measured device, disconnect the transistor switch being connected with n driving voltage, the transistor switch that closes simultaneously and be connected with the pin of measurement mechanism; If the value that measurement mechanism detects between n driving voltage, illustrates that this measurement data is correct, and is not subject to the impact of ESD diode, store or export this measured value, then measure next time; If the value that measurement mechanism detects exceeds the scope of n driving voltage, ESD diode is opened and has been affected measurement result, now, n driving voltage of linear change closed ESD diode, then store or export this measured value, n driving voltage is conditioned back its initial value afterwards.
The present invention further improves and is: a described n driving voltage comprises driving high level VDDlast and drives low level VSSlast.
A kind of method of testing of utilizing integrated switch matrix to measure I-V circuit, while measuring measured device voltage, switch ground voltage and the supply voltage of integrated circuit with dynamical fashion, by switching ground voltage and supply voltage and in the situation that not causing ESD diode electric discharge and affecting measurement result, measuring wider voltage.
Native system can produce and data are written in measured device, receive data and measure the analog voltage level of its output from measured device, and this measured device is connected in point-to-point mode with driver/receiver integrated circuit, do not have extra circuit/device (relay) between the two, and other measurement hardware (as: measurement mechanism) are also connected with other additional element.
On each pin, be provided with the driver/receiver chip containing electrostatic discharge protective equipment, and a voltage in multiple different voltage can be written into measured device or can incoming level and this level is loaded into and the switch matrix of the measuring sensor that drives chip to be connected.
Use measuring sensor to measure the voltage receiving from the switch matrix of driver/receiver chip, whether between [VSS, VDD], judge the method whether this numerical value is correct by confirmation measured value.If above-mentioned condition is not met, the power supply magnitude of voltage that measuring sensor promotes driver/receiver chip in the mode defining continues linear change, until condition is met, then measure, finally power values is regulated back to the method for its initial value.
Voltage linear change before, during and can keep afterwards operation driver/receiver chip.
Native system contains n different driving voltage; The electro-static discharge structure that is connected to VDD and VSS can utilize measurement mechanism to regulate VDD and VSS.
The scheme that Fig. 2 shows, contain n different driving voltage (being shown as two herein), be connected to the electro-static discharge structure of VDDlast and VSSlast and have VDDlast and the VSSlast of two driving voltages, but only have afterbody to drive the stage by VDDlast and VSSlast power supply, the remainder of driver/receiver chip is powered by VDD/VSS.Usable level switch is connected to VDD/VSS scope from VDDlast/VSSlast scope.If required, measurement mechanism can regulate the size of VDDlast and/or VSSlast.
Use any amount (to operate the system of all pins of measured device from 1 to driver/receiver chip m).
Each driver/receiver chip uses independent current source and independent measurement element, and measuring sensor can regulate the power supply of this chip, and only can with the interactional system of this chip.
The system of All Drives/receiver chip common source and same measuring sensor.
The system of the supply power supply of the same adjusting All Drives/receiver chip of measuring sensor.
The power supply of measuring sensor adjusting driver/receiver chip, the pin of driver/receiver chip is measured, keeps the system of the implied terms on other chip simultaneously.
Each driver/receiver chip is distributed to a function bus (such as address bus, command line, data bus etc.) of measured device, according to the different requirements of function group, and the system that measuring sensor regulates supply voltage by different way.
With respect to prior art, the present invention has following beneficial effect:
The present invention is directed to integrated circuit, in order to overcome the restriction of electrostatic discharge circuit to voltage range, when measuring voltage, switch the ground voltage (VSS) of integrated circuit and supply voltage (VDD) (voltage on pin exceedes the supply voltage of integrated circuit or drops to the ground voltage of integrated circuit when following, and electrostatic discharge circuit is that pin discharges) with dynamical fashion.By switching ground voltage and supply voltage, and in the situation that not causing ESD diode electric discharge and affecting measurement result, can more effectively measure wider voltage.
[brief description of the drawings]
Fig. 1 is the structural representation of measuring system of the present invention;
Fig. 2 is the schematic diagram of the another kind of structure of measuring system of the present invention.
[embodiment]
To introduce in detail this two schemes below:
The implementation method that Fig. 1 shows is that supply voltage and the ground voltage of whole driver chip can switch.
Fig. 1 has only shown the afterbody of pin driver, electro-static discharge structure, switch matrix, connection externally fed power supply and measurement mechanism (PMU), produces meaningful data and is written into the logical circuit of chip, receives the receiver of data and control logic circuit (as: sequencer etc.) does not show in the drawings from pin.The circuit not showing is identical with the circuit in existing available test macro, without explanation.
Refer to shown in Fig. 1, refer to shown in Fig. 1, the present invention utilizes integrated switch matrix to measure the test macro of I-V circuit, comprises driver chip 100, measured device 200 and measurement mechanism 300; Driver chip 100 comprises multiple pins 101, and driver chip 100 is provided with many drive wires that connect corresponding pin 101; Each pin 101 is all connected with ESD protection circuit; Driver chip 100 is provided with the first transistor switch matrix and transistor seconds switch matrix, the first transistor switch matrix comprises three groups, is respectively used to drive high level line Vh, drives medium level/termination level line Vtt and drive low level line VI to be connected pin 101 by corresponding drive wire; Transistor seconds switch matrix connects pin 101 for connecting measurement mechanism 300 by corresponding drive wire.
Measured device (DUT) is positioned at right side.On measured device 200, there are multiple pins 201 that can be driven by driver chip 100, pin 101 and pin 201 corresponding connection one to one.Here, driver chip 100 uses by the transistor switch 302(all crystals pipe switch 302 of the sequencer (not shown) control of driver chip and forms the first transistor switch matrix) each pin 201 can be connected with available voltage level line (Vh, Vtt, VI).Here three kinds of voltage level lines have been shown, drive high level line Vh, drive medium level/termination level line Vtt and drive low level line VI, these three kinds is the most typical level of test macro, in addition, can also have more smaller or greater voltage level available.Transistor switch 302 can be designed as certain size, and the switch of size has specific impedance like this, and the specified impedance of transistor switch 302 can match with the terminating resistor of measured device 200, thereby reduces or eliminates reflection.
Drive high level line Vh, drive medium level/termination level line Vtt and drive low level line VI by being connected to the external power source that drives chip 100.
The right side of driver chip 100 is electrostatic discharge protective equipment.In this example, also shown the protection diode (the most frequently used electrostatic prevention structure) that connects supply voltage VDD and ground voltage VSS.Ground voltage VSS and supply voltage VDD are provided by outside, and then are the control logic circuit power supply of driver chip 100.
A group transistor switch 301(all crystals pipe switch 301 of installing forms transistor seconds switch matrix) for connecting any one driver pin 101 of measurement mechanism (PMU) 300 and driver chip 100.While measurement: disconnect the switch of Vh/Vtt/Vl, driver chip 100 will disconnect being connected of pin and Vh/Vtt/Vl; Close in transistor switch 301 one simultaneously, of a correspondence pin 101 can be connected with measurement mechanism 300.
At this moment, measurement mechanism 300 can start surveying work.If the value that measurement mechanism 300 detects, between ground voltage VSS and supply voltage VDD, illustrates that this measurement data is correct, and is not subject to the impact of ESD diode.The value measuring can store or export, and then measures next time.
But, if the value that measurement mechanism 300 detects is greater than supply voltage VDD or is less than ground voltage VSS, measurement result is probably the impact that has been subject to ESD diode so, and measurement mechanism 300 will the ground voltage VSS of adjusting driver chip 100 and the value of supply voltage VDD.For example, if initial VDD=3.3V, VSS=0V, and the value that measurement mechanism measures is 3.8V, measurement mechanism 300 will regulate the power supply that produces supply voltage and ground voltage so, makes it to produce the voltage of for example VDD=4.3V and VSS=1.0V.Once voltage reaches these values, this measurement numerical value will be used, and then, VDD/VSS is conditioned back its initial value, afterwards, measures next time.
In measuring process, although VDD and VSS synchronously change, it is constant that VDD-VSS keeps, so driver chip 100 can maintain the running status defining, can continue fill order, and data are loaded into the not pin 101 for measuring.In order to make the method reliable, the linear value that changes VDD and VSS, this point is very important.
The implementation method that Fig. 2 shows and Fig. 1's is slightly different.
Major function is identical with method described in Fig. 1, but the sequencer steering logic voltage while comprising by operation for fear of the supply voltage VDD of whole driver chip 100 and ground voltage VSS() synchronously change, and for fear of having problems when the operating equipment, in the end one-level driven stage definitions independent VDDlast and the power supply electrical level of VSSlast.
In the method, VDDlast is consistent with driving high level line Vh and driving low level line Vl with VSSlast.Fig. 2 has only shown this two kinds of drive levels, if needed, can increase another kind of driving medium level/termination level line Vtt(as shown in Figure 1).VDDlast and VDD are separate, and its value can reduce or improve, and VSSlast is like this equally.Driver chip 100 operates (as: control device, sequencer etc.) (Fig. 2 does not show these power supplys) in VDD and VSS region.By the pre-driver 303 at VDD/VSS section switch, can, before switch is as shown in Figure 2 being written into output level, VDD/VSS be switched to VDDlast/VSSlast region.
Notice that this method need to couple together ESD diode and VDDlast and VSSlast, therefore switch matrix separates with VSS completely with VDD.
Now, if measure the voltage on the pin being connected with measured device, the switch that needs disconnection to be connected with VSSlast with VDDlast needs the switch that closes and be connected with the pin of measurement mechanism 300 simultaneously.
If the value that measurement mechanism detects between VDDlast and VSSlast, illustrates that this measurement data is correct, and be not subject to the impact of ESD diode.If but the value that measurement mechanism detects is greater than VDDlast or is less than VSSlast, ESD diode is opened and has been affected measurement result.Now, VDDlast and/or VSSlast just must linearity change to certain value, to guarantee that diode closes.Then this measurement numerical value is just used, and voltage is conditioned back its initial value afterwards.
Please note that Fig. 2 has only shown 2 drive levels, its value is identical with power supply electrical level Vddlast and Vsslast.If driver chip has driven the more than one pin of measured device, the Vddlast of linear change and/or Vsslast will have influence on the level of drive of the pin not disconnecting while measurement so.In some applications, this is acceptable (for example all pins connects and can disconnect, and for example, have adopted static Vsslast level while only changing Vddlast).In the application that level on other pin must remain unchanged, must definition the third even the 4th kind with Vddlast and the separate drive level of Vsslast, this drive level does not show at Fig. 2, but can in the situation that not changing this invention core content, increase this level.
Claims (9)
1. utilize integrated switch matrix to measure the test macro of I-V circuit, it is characterized in that, comprise driver chip (100), measured device (200) and measurement mechanism (300); Multiple pins of driver chip (100) are connected in point-to-point mode with multiple pins of measured device (200); Measurement mechanism (300) for generation of and data are written in measured device (200), receive data measure the analog voltage level of its output from measured device (200); On each pin of driver chip (100), be provided with the driver/receiver chip containing electrostatic discharge protective equipment, and a voltage in multiple different voltage can be written into measured device (200) or can incoming level and this level is loaded into the first transistor switch matrix of measured device (200); Measurement mechanism (300) connects corresponding driver chip pin by transistor seconds switch matrix.
2. the test macro that utilizes integrated switch matrix to measure I-V circuit according to claim 1, it is characterized in that, while measurement, disconnect the first transistor switch matrix, close in transistor seconds switch matrix one simultaneously, a driver chip pin of correspondence is connected with measurement mechanism (300); Measurement mechanism (300) produces and data is written in measured device (200), receive data and measure the analog voltage level of its output from measured device (200), if the value that measurement mechanism (300) detects is between ground voltage VSS and supply voltage VDD, store or export this measured value, then measuring next time; If the value that measurement mechanism (300) detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism (300) adjusting driver chip (100) and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device (200) output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
3. the method that the test macro that utilizes integrated switch matrix to measure I-V circuit described in 1 is tested as requested, it is characterized in that, comprise the following steps: while measurement, disconnect the first transistor switch matrix, close in transistor seconds switch matrix one simultaneously, a driver chip pin of correspondence is connected with measurement mechanism (300); Measurement mechanism (300) produces and data is written in measured device (200), receive data and measure the analog voltage level of its output from measured device (200), if the value that measurement mechanism (300) detects is between ground voltage VSS and supply voltage VDD, store or export this measured value, then measuring next time; If the value that measurement mechanism (300) detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism (300) adjusting driver chip (100) and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device (200) output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
4. utilize integrated switch matrix to measure the test macro of I-V circuit, it is characterized in that, comprise driver chip (100), measured device (200) and measurement mechanism (300); Driver chip (100) comprises multiple the first pins (101), and driver chip (100) is provided with many drive wires that connect corresponding the first pin (101); Each the first pin (101) is all connected with ESD protection circuit; Driver chip (100) is provided with the first transistor switch matrix and transistor seconds switch matrix; The first transistor switch matrix comprises three groups, is respectively used to drive high level line Vh, drives medium level/termination level line Vtt and drive low level line VI to be connected the first pin (101) by corresponding drive wire; Transistor seconds switch matrix connects the first pin (101) for measurement mechanism (300) by corresponding drive wire; On measured device (200), there are multiple second pins (201) that can be driven by driver chip (100), the first pin (101) and the second pin (201) corresponding connection one to one; Driver chip (100) uses by the transistor switch (302) of the sequencer control of driver chip each the second pin (201) is connected with available driving high level line Vh, driving medium level/termination level line Vtt or driving low level line VI.
5. the test macro that utilizes integrated switch matrix to measure I-V circuit according to claim 4, it is characterized in that, while measurement, disconnect the first transistor switch matrix, close in transistor seconds switch matrix one simultaneously, a driver chip pin of correspondence is connected with measurement mechanism (300); Measurement mechanism (300) produces and data is written in measured device (200), receive data and measure the analog voltage level of its output from measured device (200), if the value that measurement mechanism (300) detects is between ground voltage VSS and supply voltage VDD, store or export this measured value, then measuring next time; If the value that measurement mechanism (300) detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism (300) adjusting driver chip (100) and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device (200) output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
6. the method that the test macro that utilizes integrated switch matrix to measure I-V circuit according to claim 5 is tested, it is characterized in that, comprise the following steps: while measurement, disconnect the first transistor switch matrix, close in transistor seconds switch matrix one simultaneously, a driver chip pin of correspondence is connected with measurement mechanism (300); Measurement mechanism (300) produces and data is written in measured device (200), receive data and measure the analog voltage level of its output from measured device (200), if the value that measurement mechanism (300) detects is between ground voltage VSS and supply voltage VDD, store or export this measured value, then measuring next time; If the value that measurement mechanism (300) detects is greater than supply voltage VDD or is less than ground voltage VSS, the ground voltage VSS of measurement mechanism (300) adjusting driver chip (100) and the value of supply voltage VDD synchronously change, the analog voltage level value that measured device (200) output detected is fallen between the ground voltage VSS and supply voltage VDD after adjusting, this measurement numerical value is stored or exports, then, ground voltage VSS and supply voltage VDD are conditioned back its initial value, afterwards, measure next time; When regulated ground voltage VSS and supply voltage VDD, VDD-VSS keeps constant.
7. utilize integrated switch matrix to measure the test macro of I-V circuit, it is characterized in that, comprise the driving voltage of n the different electro-static discharge structure that is connected to driver chip (100), a described n driving voltage connects driver/receiver chip by the first transistor matrix; A described n driving voltage only has the afterbody driving stage to power to driver/receiver chip, and the remainder of driver/receiver chip is powered by VDD/VSS; Can VDD/VSS be switched to VDDlast/VSSlast region by level shifter; N driving voltage and VDD, VSS are separate; While measuring the voltage on the pin being connected with measured device, disconnect the transistor switch being connected with n driving voltage, the transistor switch that closes simultaneously and be connected with the pin of measurement mechanism (300); If the value that measurement mechanism detects between n driving voltage, illustrates that this measurement data is correct, and is not subject to the impact of ESD diode, store or export this measured value, then measure next time; If the value that measurement mechanism detects exceeds the scope of n driving voltage, ESD diode is opened and has been affected measurement result, now, n driving voltage of linear change closed ESD diode, then store or export this measured value, n driving voltage is conditioned back its initial value afterwards.
8. the test macro that utilizes integrated switch matrix to measure I-V circuit according to claim 7, is characterized in that, a described n driving voltage comprises driving high level VDDlast and drives low level VSSlast.
9. a method of testing of utilizing integrated switch matrix to measure I-V circuit, it is characterized in that, while measuring measured device voltage, switch ground voltage and the supply voltage of integrated circuit with dynamical fashion, by switching ground voltage and supply voltage and in the situation that not causing ESD diode electric discharge and affecting measurement result, measuring wider voltage.
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| CN110632969A (en) * | 2019-10-23 | 2019-12-31 | 广东晟合技术有限公司 | Integrated circuit measuring and power supply system with multi-voltage reference generator |
| CN113049908A (en) * | 2021-04-23 | 2021-06-29 | 中国科学院上海微系统与信息技术研究所 | Superconducting SFQ standard process parameter offline automatic detection system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110632969A (en) * | 2019-10-23 | 2019-12-31 | 广东晟合技术有限公司 | Integrated circuit measuring and power supply system with multi-voltage reference generator |
| CN113049908A (en) * | 2021-04-23 | 2021-06-29 | 中国科学院上海微系统与信息技术研究所 | Superconducting SFQ standard process parameter offline automatic detection system |
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| CN103901337B (en) | 2017-01-18 |
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