CN103901337B - Test system and method for measuring I-V circuit through integrated switch matrix - Google Patents
Test system and method for measuring I-V circuit through integrated switch matrix Download PDFInfo
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Abstract
The invention provides a test system and method for measuring an I-V circuit through an integrated switch matrix. The test system comprises a driver chip, a measured component and a measuring device. A plurality of pins of the driver chip are connected with a plurality of pins of the measured component in a point-to-point mode. The measuring device is used for generating data and loading the data into the measured component. The data are received by the measured component, and an analog voltage level output by the measured component is measured. Each pin of the driver chip is provided with a driver/receiver chip and a first transistor switch matrix, wherein the driver/receiver chip is provided with an electrostatic discharge protective device, and through the first transistor switch matrix, one of multiple different voltages can be loaded into the measured component, or the level can be received and loaded to the measured component. The measuring device is connected with the corresponding pins of the driver chip through second transistor switch matrixes. The test system and method are used for integration circuits, and voltage with a wider range can be measured more effectively by switching grounding voltage and power voltage without causing discharge of an electrostatic discharge diode.
Description
[technical field]
The present invention relates to technical field of measurement and test, particularly to a kind of test system of measurement i-v circuit and method；The present invention
It is applied to comprise a series of system of elements, wherein at least one element is integrated circuit, everything does is integrated component,
It can also be discrete component.
[background technology]
Between integrated circuit and at least another one element, (can be integrated component can also be discrete component) has one
Bar two-way signaling bus (one or more signal).This is that is: a) this integrated circuit by voltage or can have certain frequency
The signal of rate drives to this element or switches it to tri-state；Or b) this element can send level or conversion signal to integrated
Circuit.
A kind of most typical application (but not being unique application) is exactly to produce signal using integrated circuit, then sends out signal
Deliver to the test system of measured device.Under other operator schemes, this test system can not drive electricity in test system yet
The magnitude of voltage of measured device pin is measured during pressure.
Most of integrated circuits are designed with static discharge (esd) protection circuit on all of pin, integrated in order to protect
, from the damage of high esd (static discharge) voltage, processing can when integrated circuit or the circuit board containing integrated circuit for the process for circuit
High esd (static discharge) voltage can be produced.
This electrostatic discharge circuit is to aim at supply voltage or the ground connection electricity less than integrated circuit that voltage exceedes integrated circuit
During pressure, the electric charge gathering is discharged on pin and design.Under any circumstance (no switchgear), electrostatic discharge protective equipment must
Directly must be connected with pin with line, could effectively play a role.
But, electrostatic discharge (ESD) protection limits integrated circuit and can receive the voltage range with gauge signal.For example: if
The voltage receiving has exceeded the supply voltage of integrated circuit, and electrostatic discharge protective equipment then can discharge, and then affects on pin
The measurement work carrying out.
At present, existing test system connects integrated circuit using high-performance relay to drive or receiving data,
Or connect independent measurement apparatus (as universal meter).
Relay can disconnect the connection between integrated circuit and/or measurement apparatus and measured device.Therefore, integrated circuit
During disconnection, the voltage range that can be measured using measurement apparatus is wider.
One weak point of existing method is exactly that the service life of relay is limited.Especially need in integrated circuit and
In the application of frequent switching occasion between measurement apparatus, the service life of relay decides the service life of system, or is
The time interval that system breaks down or system is keeped in repair.
Additionally, the conversion of signalling channel only needs to several nanoseconds in integrated circuit, by comparison, relay signal conversion and
Set up and then take long enough (a few tens of milliseconds).Meanwhile, relay (especially high-performance relay) is expensive, also add
The complexity (needing extra discrete component) of system.
[content of the invention]
It is an object of the invention to provide a kind of utilization integrated switch matrix measures test system and the method for i-v circuit,
To solve above-mentioned technical problem.The present invention proposes for switch matrix (external relay) to move into integrated circuit.Relay is integrated
Switch (simple transmission gate) in circuit replaces.Without outside relay, reduces cost is come with this, simplification system sets
Meter, can also reduce switching time and All Time needed for test simultaneously, and the service life improving system.
To achieve these goals, the present invention adopts the following technical scheme that
Measure the test system of i-v circuit using integrated switch matrix, including driver chip, measured device and measurement dress
Put；Multiple pins of driver chip are connected in point-to-point mode with multiple pins of measured device；Measurement apparatus are used for producing
And load data in measured device, from measured device receiving data and measure its output analog voltage level；Driver core
Driver/receiver chip containing electrostatic discharge protective equipment is provided with each pin of piece, and can by multiple not
It is loaded into measured device with one of voltage voltage or level can be received and this level is loaded into the first of measured device
Transistor switch matrix；Measurement apparatus connect corresponding driver chip pin by transistor seconds switch matrix.
The present invention is further improved by: when measuring, disconnects the first transistor switch matrix, closes second simultaneously
One in transistor switch matrix, a corresponding driver chip pin is connected with measurement apparatus；Measurement apparatus produce simultaneously
Load data in measured device, from measured device receiving data and measure its output analog voltage level, if measurement dress
Put the value detecting to be between ground voltage vss and supply voltage vdd, store or export this measured value, then carry out next
Secondary measurement；If the value that measurement apparatus detect is more than supply voltage vdd or is less than ground voltage vss, measurement apparatus are adjusted
The value of the ground voltage vss of driver chip and supply voltage vdd synchronously changes, and makes to detect the simulation electricity of measured device output
Piezoelectricity level values fall between the ground voltage vss after regulation and supply voltage vdd, and this measured value is stored or exports, then,
Ground voltage vss and supply voltage vdd is conditioned back its initial value, afterwards, is measured next time；Regulated ground voltage vss
Keep constant with vdd-vss during supply voltage vdd.
The method tested using the test system that integrated switch matrix measures i-v circuit, is comprised the following steps: carry out
During measurement, disconnect the first transistor switch matrix, one in the transistor seconds switch matrix that simultaneously closes, corresponding one is driven
Dynamic device chip pin is connected with measurement apparatus；Measurement apparatus produce and load data in measured device, receive from measured device
Data and measure its output analog voltage level, if the value that measurement apparatus detect be in ground voltage vss and power supply electricity
Between pressure vdd, store or export this measured value, then measured next time；If the value that measurement apparatus detect is more than electricity
Source voltage vdd or be less than ground voltage vss, the ground voltage vss and supply voltage vdd of measurement apparatus adjustment driver chip
Value synchronously change, make analog voltage level value measured device output is detected fall into ground voltage vss and electricity after regulation
Between the voltage vdd of source, this measured value is stored or is exported, and then, ground voltage vss and supply voltage vdd are conditioned back it
Initial value, afterwards, is measured next time；During regulated ground voltage vss and supply voltage vdd, vdd-vss keeps constant.
Measure the test system of i-v circuit using integrated switch matrix, including driver chip, measured device and measurement dress
Put；Driver chip includes multiple first pins, and driver chip is provided with a plurality of drives line connecting corresponding first pin；Often
Individual first pin is respectively connected with ESD protection circuit；Driver chip is provided with the first transistor switch matrix and the second crystalline substance
Body pipe switch matrix；The first transistor switch matrix includes three groups, be respectively used to drive high level line vh, drive medium level/
Termination level line vtt and driving low level line vi connects the first pin by corresponding drives line；Transistor seconds switch matrix
For measurement apparatus, the first pin is connected by corresponding drives line；Have on measured device and multiple can be driven by driver chip
Second pin, the first pin and second pin correspond connection；Driver chip is using the sequencing by driver chip
The transistor switch (302) that device controls is by each second pin and available drivings high level line vh, driving medium level/termination
Level line vtt or driving low level line vi is connected.
The present invention is further improved by: when measuring, disconnects the first transistor switch matrix, closes second simultaneously
One in transistor switch matrix, a corresponding driver chip pin is connected with measurement apparatus；Measurement apparatus produce simultaneously
Load data in measured device, from measured device receiving data and measure its output analog voltage level, if measurement dress
Put the value detecting to be between ground voltage vss and supply voltage vdd, store or export this measured value, then carry out next
Secondary measurement；If the value that measurement apparatus detect is more than supply voltage vdd or is less than ground voltage vss, measurement apparatus are adjusted
The value of the ground voltage vss of driver chip and supply voltage vdd synchronously changes, and makes to detect the simulation electricity of measured device output
Piezoelectricity level values fall between the ground voltage vss after regulation and supply voltage vdd, and this measured value is stored or exports, then,
Ground voltage vss and supply voltage vdd is conditioned back its initial value, afterwards, is measured next time；Regulated ground voltage vss
Keep constant with vdd-vss during supply voltage vdd.
The method tested using the test system that integrated switch matrix measures i-v circuit, is comprised the following steps: carry out
During measurement, disconnect the first transistor switch matrix, one in the transistor seconds switch matrix that simultaneously closes, corresponding one is driven
Dynamic device chip pin is connected with measurement apparatus；Measurement apparatus produce and load data in measured device, receive from measured device
Data and measure its output analog voltage level, if the value that measurement apparatus detect be in ground voltage vss and power supply electricity
Between pressure vdd, store or export this measured value, then measured next time；If the value that measurement apparatus detect is more than electricity
Source voltage vdd or be less than ground voltage vss, the ground voltage vss and supply voltage vdd of measurement apparatus adjustment driver chip
Value synchronously change, make analog voltage level value measured device output is detected fall into ground voltage vss and electricity after regulation
Between the voltage vdd of source, this measured value is stored or is exported, and then, ground voltage vss and supply voltage vdd are conditioned back it
Initial value, afterwards, is measured next time；During regulated ground voltage vss and supply voltage vdd, vdd-vss keeps constant.
Measure the test system of i-v circuit using integrated switch matrix, include the individual different driver chips that are connected to of n
The driving voltage of electro-static discharge structure, described n driving voltage connects driver/receiver core by the first transistor matrix
Piece；Described n driving voltage only afterbody drives the stage to supply electricity to driver/receiver chip, driver/receiver core
The remainder of piece is powered by vdd/vss；Vdd/vss can be switched to by vddlast/vsslast area by level shifter
Domain；N driving voltage is separate with vdd, vss；When measuring the voltage on the pin being connected with measured device, disconnect and n
The transistor switch that driving voltage is connected, closed the transistor switch being connected with the pin of measurement apparatus simultaneously；If measurement dress
Put the value detecting to be between n driving voltage, illustrate that this measurement data is correct, and be not subject to ESD diode
Impact, store or export this measured value, then measured next time；If the value that measurement apparatus detect exceeds n drive
The scope of dynamic voltage, then ESD diode open and have impact on measurement result, now, linearly changing n driving voltage makes
ESD diode is closed, and then stores or export this measured value, n driving voltage is conditioned back its initial value afterwards.
The present invention is further improved by: described n driving voltage includes driving high level vddlast and drive low electricity
Flat vsslast.
A kind of utilization integrated switch matrix measures the method for testing of i-v circuit, during measurement measured device voltage, with dynamically side
Formula switches ground voltage and the supply voltage of integrated circuit, by switching ground voltage and supply voltage and not causing electrostatic to put
In the case of electric diode electric discharge and impact measurement result, measure larger range of voltage.
The system can produce and load data in measured device, from measured device receiving data and measure its output
Analog voltage level, and this measured device is connected in point-to-point mode with driver/receiver integrated circuit, does not deposit between the two
In extra circuit/device (relay), and other measurements hardware (such as: measurement apparatus) are not also connected with other additional element
Connect.
Driver/receiver chip containing electrostatic discharge protective equipment is provided with each pin, and can will be many
One of individual difference voltage voltage is loaded into measured device or can receive level and be loaded into and driving chip this level
The switch matrix of the measuring cell being connected.
The voltage being received from the switch matrix of driver/receiver chip using measuring cell measurement, by confirming to survey
Whether value is between [vss, vdd], to judge the whether correct method of this numerical value.If above-mentioned condition is not met for,
Then measuring cell promotes the power supply magnitude of voltage of driver/receiver chip to continue linear change, directly in a well-defined manner
It is satisfied to condition, then measure, the method finally power values being adjusted back its initial value.
Before voltage linear change, period and the driver/receiver chip that can remain on afterwards.
The system contains n different driving voltage；The electro-static discharge structure being connected to vdd and vss can be using measurement dress
Put regulation vdd and vss.
The scheme that Fig. 2 shows, containing the different driving voltage (being shown here as two) of n, be connected to vddlast and
The electro-static discharge structure of vsslast and vddlast and vsslast having two driving voltages, but only afterbody drives
Stage is powered by vddlast and vsslast, and the remainder of driver/receiver chip is powered by vdd/vss.Can electricity consumption
Truncation parallel operation is connected to vdd/vss scope from vddlast/vsslast scope.If required, measurement apparatus can be adjusted
The size of vddlast and/or vsslast.
Operate the system of all pins of measured device using the driver/receiver chip of any amount (from 1 to m).
Each driver/receiver chip is using independent current source and independent measuring cell, and measuring cell can
Adjust the power supply of this chip, and be only capable of the interactional system with this chip.
All Drives/receiver chip shares the system of power supply and same measuring cell.
The system of the supply power supply of the same regulation All Drives/receiver chip of measuring cell.
The power supply of measuring cell adjustment driver/receiver chip, the pin of driver/receiver chip is tested
Amount, keeps the system of the implied terms on other chips simultaneously.
Each driver/receiver chip is distributed on a function bus (the such as address bus, life of measured device
Make bus, data/address bus etc.), according to the difference requirement of function group, measuring cell is adjusted to supply voltage by different way
System.
With respect to prior art, the method have the advantages that
The present invention is directed to integrated circuit, in order to overcome the restriction to voltage range for the electrostatic discharge circuit, during measurement voltage, with
(voltage on pin exceedes integrated circuit for the ground voltage (vss) of dynamical fashion switching integrated circuit and supply voltage (vdd)
Supply voltage or when dropping to below the ground voltage of integrated circuit, electrostatic discharge circuit is pin electric discharge).It is grounded by switching
Voltage and supply voltage, and in the case of not causing ESD diode electric discharge and impact measurement result, can be more effective
Ground measures larger range of voltage.
[brief description]
Fig. 1 is the structural representation of measuring system of the present invention；
Fig. 2 is the schematic diagram of measuring system another kind structure of the present invention.
[specific embodiment]
Both scheme be described in detail below:
The implementation method that Fig. 1 shows is the supply voltage of whole driver chip and ground voltage can switch.
Fig. 1 illustrate only pin driver, electro-static discharge structure, switch matrix, connects externally fed power supply and measurement dress
Put the afterbody of (pmu), produce meaningful data and be loaded into chip logic circuit, from pin receiving data receiver
And control logic circuit (such as: sequencer etc.) is not explicitly shown in figure.In not shown circuit and existing available test system
Circuit identical, need not illustrate.
Refer to shown in Fig. 1, refer to shown in Fig. 1, the present invention utilizes integrated switch matrix to measure the test system of i-v circuit
System, including driver chip 100, measured device 200 and measurement apparatus 300；Driver chip 100 includes multiple pins 101, drives
Dynamic device chip 100 is provided with a plurality of drives line connecting corresponding pin 101；Each pin 101 is respectively connected with electrostatic discharge (ESD) protection
Circuit；Driver chip 100 is provided with the first transistor switch matrix and transistor seconds switch matrix, and the first transistor switchs
Matrix includes three groups, is respectively used to drive high level line vh, drives medium level/termination level line vtt and drive low level line
Vi connects pin 101 by corresponding drives line；Transistor seconds switch matrix is used for connecting measurement apparatus 300 by corresponding
Drives line connects pin 101.
Measured device (dut) is located at right side.Have on measured device 200 multiple can be by drawing that driver chip 100 drives
Pin 201, pin 101 and pin 201 correspond connection.Here, driver chip 100 is using the sequencing by driver chip
The all transistor switches of transistor switch 302(302 that device (not shown) controls constitute the first transistor switch matrix) can
Each pin 201 and available voltage level line (vh, vtt, are vi) connected.There is shown three kinds of voltage level lines, that is, drive
Dynamic high level line vh, driving medium level/termination level line vtt and driving low level line vi, these three are test system allusion quotations
The level of type, further, it is also possible to there be more smaller or greater voltage level available.Transistor switch 302 can set
It is calculated as certain size, the switch of such size has specific impedance, and the specified impedance of transistor switch 302 can be with measured device
200 terminating resistor matches, thus reducing or eliminating reflection.
Drive high level line vh, drive medium level/termination level line vtt and drive low level line vi by being connected to driving
The external power source of chip 100 is powered.
The right side of driver chip 100 is electrostatic discharge protective equipment.In this example, also show connection power supply electricity
The protection diode (the most frequently used electrostatic prevention structure) of pressure vdd and ground voltage vss.Ground voltage vss and supply voltage vdd by
Outside offer, and then power for the control logic circuit of driver chip 100.
The all transistor switches 301 of a group transistor switch 301(installed constitute transistor seconds switch matrix) it is used for
Connect measurement apparatus (pmu) 300 and any one driver pin 101 of driver chip 100.When measuring: disconnect vh/
The switch of vtt/vl, driver chip 100 will be switched off the connection of pin and vh/vtt/vl；Close in transistor switch 301 simultaneously
One, a corresponding pin 101 can be connected with measurement apparatus 300.
At this moment, measurement apparatus 300 can start to measure work.If the value that measurement apparatus 300 detect is in ground voltage
Between vss and supply voltage vdd, illustrate that this measurement data is correct, and do not affected by ESD diode.Measure
Value can store or export, then measured next time.
But, if the value that measurement apparatus 300 detect is more than supply voltage vdd or is less than ground voltage vss, then
Measurement result is likely to be to receive the impact of ESD diode, and measurement apparatus 300 will adjustment driver chip 100
Ground voltage vss and supply voltage vdd value.For example, if initial vdd=3.3v, vss=0v, and measurement apparatus measure
Value be 3.8v, then measurement apparatus 300 will adjust the power supply producing supply voltage and ground voltage, is allowed to produce for example
The voltage of vdd=4.3v and vss=1.0v.Once voltage reaches these values, this measured value will be used, then, vdd/
Vss is conditioned back its initial value, afterwards, is measured next time.
Although vdd and vss synchronously changes in measurement process, but vdd-vss keeps constant, so driver chip 100
It is able to maintain that in the running status defining, order can be continued executing with, and load data into the pin being not used for measuring
101.In order that the method is reliable, the linear value changing vdd and vss, this puts critically important.
The implementation method that Fig. 2 shows is slightly different with Fig. 1's.
Major function is identical with Fig. 1 methods described, but the supply voltage in order to avoid whole driver chip 100
Vdd and ground voltage vss(includes Sequencer control logic voltage when being operated) synchronous change, and in order to avoid in operation
Produce problem during equipment, drive the stage definitions power supply electrical level of single vddlast and vsslast in afterbody.
In the method, vddlast with vsslast is consistent with driving high level line vh and driving low level line vl.Fig. 2 is only
Show both drive levels, if it is desired, another kind of driving medium level/termination level line vtt(such as Fig. 1 can be increased
Shown).Vddlast is separate with vdd, and its value can reduce or improve, and vsslast is same.Driver chip 100 exists
Vdd and vss is operated (such as: control device, sequencer etc.) (Fig. 2 does not show these power supplys) in region.By in vdd/vss
Vdd/vss can be switched in switch as shown in Figure 2 before being loaded into output level by the pre-driver 303 of section switch
Vddlast/vsslast region.
Notice that this method needs to couple together ESD diode with vddlast and vsslast, therefore switch matrix
It is completely separate with vdd and vss.
Now, if the voltage on the pin being connected with measured device will be measured, need disconnect with vddlast and
The switch that vsslast is connected, simultaneously need to the switch being connected with the pin of measurement apparatus 300 that closes.
If the value that measurement apparatus detect is between vddlast and vsslast, illustrate that this measurement data is correct, and
And do not affected by ESD diode.But if the value that measurement apparatus detect is more than vddlast or is less than
Vsslast, then ESD diode open and have impact on measurement result.Now, vddlast and/or vsslast is necessary for line
Sexually revise to certain value, to guarantee diode closing.Then this measured value is just used, and to be conditioned back it initial for voltage afterwards
Value.
Please note that Fig. 2 illustrate only 2 drive levels, its value is identical with power supply electrical level vddlast and vsslast.If
Driver chip drives the more than one pin of measured device, then vddlast and/or vsslast of linear change will
Have influence on the level of drive of the pin not disconnected during measurement.In some applications, this is that acceptable (for example all draws
Pin connects and can disconnect, such as employ static vsslast level when only changing vddlast).Level on other pins
Must keep in constant application it is necessary to define the third even the 4th kind of driving separate with vddlast and vsslast
Level, this drive level does not show in Fig. 2, but can increase this electricity in the case of not changing this invention core content
Flat.
Claims (8)
1. utilize integrated switch matrix to measure the test system of i-v circuit it is characterised in that including driver chip (100), quilt
Survey device (200) and measurement apparatus (300)；Multiple pins of driver chip (100) and multiple pins of measured device (200)
Connected in point-to-point mode；Measurement apparatus (300) are used for producing and load data in measured device (200), from measured device
(200) receiving data and measure its output analog voltage level；It is provided with each pin of driver chip (100) and contain
The driver/receiver chip of electrostatic discharge protective equipment, and one of multiple difference voltages voltage can be loaded into quilt
Survey device (200) or level can be received and this level is loaded into the first transistor switch matrix of measured device (200)；
Measurement apparatus (300) connect corresponding driver chip pin by transistor seconds switch matrix；
When measuring, disconnect the first transistor switch matrix, one in the transistor seconds switch matrix that simultaneously closes, will correspond to
A driver chip pin be connected with measurement apparatus (300)；Measurement apparatus (300) produce and load data into measured device
(200) in, from measured device (200) receiving data and measure its output analog voltage level, if measurement apparatus (300) inspection
The value measuring is between ground voltage vss and supply voltage vdd, stores or exports this measured value, then surveyed next time
Amount；If the value that measurement apparatus (300) detect is more than supply voltage vdd or is less than ground voltage vss, measurement apparatus
(300) value of the ground voltage vss and supply voltage vdd of adjustment driver chip (100) synchronously changes, and makes tested device is detected
The analog voltage level value that part (200) exports falls between the ground voltage vss after regulation and supply voltage vdd, this measurement number
Value is stored or is exported, and then, ground voltage vss and supply voltage vdd are conditioned back its initial value, afterwards, carry out next time
Measurement；During regulated ground voltage vss and supply voltage vdd, vdd-vss keeps constant.
2. the method that the test system using integrated switch matrix measurement i-v circuit described in 1 is tested as requested, it is special
Levy and be, comprise the following steps: when measuring, disconnect the first transistor switch matrix, the transistor seconds that simultaneously closes switchs
One in matrix, a corresponding driver chip pin is connected with measurement apparatus (300)；Measurement apparatus (300) produce simultaneously
Load data in measured device (200), from measured device (200) receiving data and measure its output analog voltage level,
If the value that measurement apparatus (300) detect is between ground voltage vss and supply voltage vdd, store or export this measurement
Value, is then measured next time；If the value that measurement apparatus (300) detect is more than supply voltage vdd or less than ground connection
Voltage vss, the value of the ground voltage vss and supply voltage vdd of measurement apparatus (300) adjustment driver chip (100) synchronously becomes
Change, make to detect the analog voltage level value that measured device (200) exports and fall into ground voltage vss and supply voltage after regulation
Between vdd, this measured value is stored or is exported, and then, ground voltage vss and supply voltage vdd are conditioned back its initial value,
Afterwards, measured next time；During regulated ground voltage vss and supply voltage vdd, vdd-vss keeps constant.
3. utilize integrated switch matrix to measure the test system of i-v circuit it is characterised in that including driver chip (100), quilt
Survey device (200) and measurement apparatus (300)；Driver chip (100) includes multiple first pins (101), driver chip
(100) it is provided with a plurality of drives line connecting corresponding first pin (101)；Each first pin (101) is respectively connected with electrostatic and puts
Electric protection circuit；Driver chip (100) is provided with the first transistor switch matrix and transistor seconds switch matrix；First is brilliant
Body pipe switch matrix includes three groups, is respectively used to drive high level line vh, drives medium level/termination level line vtt and driving
Low level line vi connects the first pin (101) by corresponding drives line；Transistor seconds switch matrix is used for measurement apparatus
(300) the first pin (101) is connected by corresponding drives line；Have on measured device (200) multiple can be by driver chip
(100) second pin (201) driving, the first pin (101) and second pin (201) correspond connection；Driver core
Piece (100) and be can use each second pin (201) using the transistor switch (302) being controlled by the sequencer of driver chip
Driving high level line vh, drive medium level/termination level line vtt or drive low level line vi be connected.
4. the test system using integrated switch matrix measurement i-v circuit according to claim 3 is it is characterised in that enter
During row measurement, disconnect the first transistor switch matrix, one in the transistor seconds switch matrix that closes, by corresponding one simultaneously
Driver chip pin is connected with measurement apparatus (300)；Measurement apparatus (300) produce and load data into measured device (200)
In, from measured device (200) receiving data and measure its output analog voltage level, if measurement apparatus (300) detect
Value be between ground voltage vss and supply voltage vdd, store or export this measured value, then measured next time；As
The value that fruit measurement apparatus (300) detect is more than supply voltage vdd or is less than ground voltage vss, and measurement apparatus (300) are adjusted
The value of the ground voltage vss of driver chip (100) and supply voltage vdd synchronously changes, and makes measured device (200) is detected defeated
The analog voltage level value going out falls between the ground voltage vss after regulation and supply voltage vdd, this measured value stored or
Output, then, ground voltage vss and supply voltage vdd are conditioned back its initial value, afterwards, are measured next time；Regulation connects
During ground voltage vss and supply voltage vdd, vdd-vss keeps constant.
5. the method tested using the test system that integrated switch matrix measures i-v circuit according to claim 4,
It is characterized in that, comprise the following steps: when measuring, disconnect the first transistor switch matrix, close transistor seconds simultaneously
One in switch matrix, a corresponding driver chip pin is connected with measurement apparatus (300)；Measurement apparatus (300) are produced
Give birth to and load data in measured device (200), from measured device (200) receiving data and measure its output analog voltage electricity
Flat, if the value that measurement apparatus (300) detect is between ground voltage vss and supply voltage vdd, store or export this survey
Value, is then measured next time；If the value that measurement apparatus (300) detect is more than supply voltage vdd or less than connecing
Ground voltage vss, the value of the ground voltage vss and supply voltage vdd of measurement apparatus (300) adjustment driver chip (100) is synchronous
Change, makes to detect the analog voltage level value that measured device (200) exports and falls into the ground voltage vss after regulation and power supply electricity
Between pressure vdd, measured value is stored or is exported, and then, ground voltage vss and supply voltage vdd are conditioned back its initial value,
Afterwards, measured next time；During regulated ground voltage vss and supply voltage vdd, vdd-vss keeps constant.
6. using integrated switch matrix measure i-v circuit test system it is characterised in that include n different be connected to drive
The driving voltage of the electro-static discharge structure of dynamic device chip (100), described n driving voltage passes through the first transistor matrix and connects drive
Dynamic device/receiver chip；Described n driving voltage only afterbody drives the stage to supply electricity to driver/receiver chip, drives
The remainder of dynamic device/receiver chip is powered by vdd/vss；Vdd/vss can be switched to by level shifter
Vddlast/vsslast region；N driving voltage is separate with vdd, vss；Measure on the pin being connected with measured device
During voltage, disconnect the transistor switch that is connected with n driving voltage, close is connected with the pin of measurement apparatus (300) simultaneously
Transistor switch；If the value that measurement apparatus detect is between n driving voltage, illustrate that this measurement data is correct, and
Do not affected by ESD diode, store or export this measured value, then measured next time；If measurement dress
Put the scope that the value detecting exceeds n driving voltage, then measurement result is opened and be have impact on to ESD diode, now,
Linear n driving voltage of change makes ESD diode close, and then stores or export this measured value, and n drives electricity afterwards
Pressure is conditioned back its initial value.
7. utilization integrated switch matrix according to claim 6 measures the test system of i-v circuit it is characterised in that institute
State n driving voltage to include driving high level vddlast and drive low level vsslast.
8. a kind of utilization integrated switch matrix measures the method for testing of i-v circuit it is characterised in that measuring measured device voltage
When, the switching ground voltage of integrated circuit and supply voltage in a dynamic fashion, by switch ground voltage and supply voltage and
In the case of not causing ESD diode electric discharge and impact measurement result, measure larger range of voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410126953.2A CN103901337B (en) | 2014-03-31 | 2014-03-31 | Test system and method for measuring I-V circuit through integrated switch matrix |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410126953.2A CN103901337B (en) | 2014-03-31 | 2014-03-31 | Test system and method for measuring I-V circuit through integrated switch matrix |
Publications (2)
| Publication Number | Publication Date |
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| CN103901337A CN103901337A (en) | 2014-07-02 |
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| CN113049908B (en) * | 2021-04-23 | 2022-11-11 | 中国科学院上海微系统与信息技术研究所 | Superconducting SFQ standard process parameter offline automatic detection system |
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| CN101029918B (en) * | 2007-01-23 | 2011-03-16 | 北京芯技佳易微电子科技有限公司 | System and method for testing controllable integrated circuit based on programmable device |
| US9287062B2 (en) * | 2012-05-02 | 2016-03-15 | National Instruments Corporation | Magnetic switching system |
| CN203069710U (en) * | 2013-02-22 | 2013-07-17 | 北京东方晨景科技有限公司 | System for electrical transport property measurement on material |
| CN203798977U (en) * | 2014-03-31 | 2014-08-27 | 西安华芯半导体有限公司 | Testing system utilizing integrated switch matrix to measure I-V circuit |
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