CN103885799A - Microprocessor delay start system and method based on power management - Google Patents
Microprocessor delay start system and method based on power management Download PDFInfo
- Publication number
- CN103885799A CN103885799A CN201410078264.9A CN201410078264A CN103885799A CN 103885799 A CN103885799 A CN 103885799A CN 201410078264 A CN201410078264 A CN 201410078264A CN 103885799 A CN103885799 A CN 103885799A
- Authority
- CN
- China
- Prior art keywords
- microprocessor
- power management
- management module
- power supply
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Power Sources (AREA)
Abstract
The invention provides a microprocessor delay start system and method based on power management, and relates to the field of communication transmission devices. The microprocessor delay start system comprises a microprocessor, a power management module and at least one power supply module for an integrated circuit chip power supply, wherein the microprocessor is provided with a reset pin and the power management module receives power monitoring signals transmitted by the power supply module. The microprocessor delay start system is characterized in that the power management module is provided with a control signal output pin connected with the reset pin, and the power management module is used for controlling reset of the microprocessor. The microprocessor is managed directly through the power management module, the problem of faults caused when the microprocessor runs in advance is avoided, and stability of the microprocessor is improved.
Description
Technical field
The present invention relates to telecommunication transmission equipment field, is specifically a kind of microprocessor delayed startup system and method based on power management.
Background technology
Modern communications transmission equipment is all made up of the various boards with difference in functionality, and each board is made up of devices such as power management module, microprocessor, integrated circuit (IC) chip (hereinafter to be referred as chip) conventionally.Wherein microprocessor is mainly responsible for initiating the communication between integrated circuit (IC) chip, and configures, manages, monitors other chips, and therefore whether microprocessor work is normally most important.
In real work, if other chips also do not enter stable duty, microprocessor just starts to set up communication with these chips and is connected, and may cause microprocessor work abnormal.For fear of the generation of this problem, need to guarantee that microprocessor just starts to set up communication and connects after other chip steady operations.
Conventional solution was to control the opening sequence of power supply in the past, according to the electric sequence requirement of each chip, control each power supply order unlatching for each chip power supply, other chips are first powered on, and then open the power supply for microprocessor power supply, so that just entry into service of microprocessor after other chip steady operations.
The method of above-mentioned control electric power starting order, in most of the cases can guarantee microprocessor just entry into service related chip steady operation after, but still exists the power supply order of microprocessor, chip to fail complete controlled situation.For example, because every kind of chip all can use one or more power supplys, therefore on board, conventionally have multiple power sources, the power supply wherein having is that several chips share, and some power supplys only have a certain chip to use.For guaranteeing chip self electric sequence, need to successively open each power supply, therefore the chip on board often can not power on simultaneously.And between microprocessor and chip, conventionally there is IO interconnect signal line, after segment chip powers on, on the IO of chip interface, may export high level, be transmitted to microprocessor through interconnect signal line, and by the catching diode in microprocessor to microprocessor power supply, cause not waiting until that all related chips have powered on, just start to microprocessor power supply.Likely running in advance of microprocessor in this case, starts and does not enter the communication between the chip of steady state (SS), initiating failure.
Therefore, prior art just reaches the delayed start-up object of microprocessor by delayed start-up power supply, do not consider the actual effect of electric power starting order, still exist the power supply order of microprocessor, chip to fail controlled situation completely, cause the microprocessor initiating failure that turns round in advance.
Summary of the invention
For the defect existing in prior art, the object of the present invention is to provide a kind of microprocessor delayed startup system and method based on power management, directly manage microprocessor by power management module, avoid turn round the in advance problem of initiating failure of microprocessor, improved the stability of microprocessor.
For reaching above object, the technical scheme that the present invention takes is: a kind of microprocessor delayed startup system based on power management, comprise the supply module of microprocessor, power management module and at least one integrated circuit (IC) chip power supply, described microprocessor is provided with reseting pin, described power management module receives the Power Supply Monitoring signal that described supply module sends, described power management module is provided with control signal output pin, described output pin is connected with reseting pin, and described power management module is for controlling the reset of described microprocessor.
The present invention also provides another microprocessor delayed startup method based on power management, and described power management module is monitored the output voltage values of described supply module, and according to this output voltage values output control signal; Described reseting pin, according to described control signal, is controlled the homing action of microprocessor, and in the time that microprocessor resets, microprocessor enters waits for operation mode of operation; In the time that microprocessor is cancelled reset, microprocessor enters normal mode of operation.
On the basis of technique scheme, in the power supply loading procedure of whole system, if the output voltage values of described supply module does not meet the voltage range of the normal work of integrated circuit (IC) chip power supply, described power management module output control signal drives reseting pin, and microprocessor is resetted.
On the basis of technique scheme, in the power supply loading procedure of whole system, if the output voltage values of described supply module meets the voltage range of the normal work of integrated circuit (IC) chip power supply, described power management module output control signal drives reseting pin, microprocessor is cancelled and resetted.
On the basis of technique scheme, when described microprocessor resets, microprocessor is removed all configuration informations of user, and now microprocessor is in initialization state.
On the basis of technique scheme, the control signal of described power management module output is high level or low level, in the time that described reseting pin is low level, drives microprocessor to reset; In the time that described reseting pin is high level, drives microprocessor to cancel and reset.
Beneficial effect of the present invention is:
1, because the present invention exports a control signal (Rst) by power management module, microprocessor is resetted, after all supply modules are all normal, by the power management module signal of removing controls, allow microprocessor enter normal mode of operation.Therefore, there is not the power supply order of microprocessor, chip problem out of control in the present invention, improved the stability of microprocessor.
2, because power management module is the general module of Communication Electronic Circuits in designing, therefore compatibility of the present invention is higher, is beneficial to popularization.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the microprocessor delayed startup system based on power management.
Reference numeral:
1-microprocessor; 11-reseting pin; 2-power management module; 21-output pin; 3-supply module.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.
As shown in Figure 1, a kind of microprocessor delayed startup system based on power management, comprise supply module 3(n >=1 of microprocessor 1, power management module 2 and n integrated circuit (IC) chip power supply), described microprocessor 1 is for initiating the communication between integrated circuit (IC) chip, and configuration, management, monitoring ic chip; Described power management module 2 is for controlling the reset of described microprocessor 1; Described supply module 3 is for the electric power supply of integrated circuit (IC) chip power supply.Described microprocessor 1 is provided with reseting pin 11, and described power management module 2 receives the Power Supply Monitoring signal that described supply module 3 sends, and described power management module 2 is provided with control signal output pin 21, and described output pin 21 is connected with reseting pin 11.
Described power management module 2 is for monitoring the output voltage values of described supply module 3, and according to this output voltage values output control signal; Described reseting pin 11, according to described control signal, is controlled the homing action of microprocessor 1, and in the time that microprocessor 1 resets, microprocessor 1 enters waits for operation mode of operation; In the time that microprocessor 1 is cancelled reset, microprocessor 1 enters normal mode of operation.Described power management module 2 is the general module of Communication Electronic Circuits in designing, and primary function is the supply module voltage of the each integrated circuit (IC) chip power supply of monitoring, and according to equipment requirement, opens successively feed circuit.Reseting pin 11(Reset), for controlling the homing action of micro-1 processor.In the time of circuit design, the output pin of power management module 2 21 is connected with reseting pin 11, described reseting pin 11 receives the control signal that power management module 2 sends.
In the power supply loading procedure of whole system, the control signal that described power management module 2 is exported is high level or low level, if the output voltage values of described supply module 3 does not meet the voltage range of the normal work of integrated circuit (IC) chip power supply, described power management module 2 is exported control signal and is driven reseting pin 11, described reseting pin 11 is low level, drives microprocessor 1 to reset; When described microprocessor 1 resets, microprocessor 1 is removed all configuration informations of user, and now microprocessor 1 is in initialization state, and enters and wait for operation mode of operation.If the output voltage values of described supply module 3 meets the voltage range of the normal work of integrated circuit (IC) chip power supply, described power management module 2 is exported control signal and is driven reseting pin 11, described reseting pin 11 is high level, drive microprocessor 1 to cancel and reset, microprocessor 1 enters normal mode of operation from waiting for operation mode of operation.By output control signal, avoid microprocessor 1 to turn round in advance.
The present invention is not limited to above-mentioned embodiment, for those skilled in the art, under the premise without departing from the principles of the invention, can also make some improvements and modifications, within these improvements and modifications are also considered as protection scope of the present invention.The content not being described in detail in this instructions belongs to the known prior art of professional and technical personnel in the field.
Claims (6)
1. the microprocessor delayed startup system based on power management, comprise the supply module of microprocessor, power management module and at least one integrated circuit (IC) chip power supply, described microprocessor is provided with reseting pin, described power management module receives the Power Supply Monitoring signal that described supply module sends, it is characterized in that: described power management module is provided with control signal output pin, described output pin is connected with reseting pin, and described power management module is for controlling the reset of described microprocessor.
2. the microprocessor delayed startup method based on power management based on system described in claim 1, is characterized in that: described power management module is monitored the output voltage values of described supply module, and according to this output voltage values output control signal; Described reseting pin, according to described control signal, is controlled the homing action of microprocessor, and in the time that microprocessor resets, microprocessor enters waits for operation mode of operation; In the time that microprocessor is cancelled reset, microprocessor enters normal mode of operation.
3. the microprocessor delayed startup method based on power management as claimed in claim 2, it is characterized in that: in the power supply loading procedure of whole system, if the output voltage values of described supply module does not meet the voltage range of the normal work of integrated circuit (IC) chip power supply, described power management module output control signal drives reseting pin, and microprocessor is resetted.
4. the microprocessor delayed startup method based on power management as claimed in claim 2, it is characterized in that: in the power supply loading procedure of whole system, if the output voltage values of described supply module meets the voltage range of the normal work of integrated circuit (IC) chip power supply, described power management module output control signal drives reseting pin, microprocessor is cancelled and resetted.
5. the microprocessor delayed startup method based on power management as claimed in claim 2, is characterized in that: when described microprocessor resets, microprocessor is removed all configuration informations of user, and now microprocessor is in initialization state.
6. the microprocessor delayed startup method based on power management as claimed in claim 2, is characterized in that: the control signal of described power management module output is high level or low level, in the time that described reseting pin is low level, drives microprocessor to reset; In the time that described reseting pin is high level, drives microprocessor to cancel and reset.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410078264.9A CN103885799A (en) | 2014-03-05 | 2014-03-05 | Microprocessor delay start system and method based on power management |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410078264.9A CN103885799A (en) | 2014-03-05 | 2014-03-05 | Microprocessor delay start system and method based on power management |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103885799A true CN103885799A (en) | 2014-06-25 |
Family
ID=50954709
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410078264.9A Pending CN103885799A (en) | 2014-03-05 | 2014-03-05 | Microprocessor delay start system and method based on power management |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103885799A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107301284A (en) * | 2017-06-14 | 2017-10-27 | 南京中感微电子有限公司 | A kind of numerical model analysis system and electric power management circuit |
| CN107422824A (en) * | 2017-04-14 | 2017-12-01 | 广东浪潮大数据研究有限公司 | Power-on reset system and method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201084099Y (en) * | 2007-09-25 | 2008-07-09 | 上海海尔集成电路有限公司 | Low-voltage monitoring circuit and microcontroller |
| CN201163390Y (en) * | 2008-03-19 | 2008-12-10 | 长沙威胜信息技术有限公司 | Reset device used for electric load management and electrical energy data acquisition terminal |
| GB2472051A (en) * | 2009-07-22 | 2011-01-26 | Wolfson Microelectronics Plc | Booting power management circuits by loading configuration data from an external memory into dedicated non-volatile memory. |
| CN203181140U (en) * | 2013-01-08 | 2013-09-04 | 上海大学 | Set top box structure with reset-delay control |
-
2014
- 2014-03-05 CN CN201410078264.9A patent/CN103885799A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201084099Y (en) * | 2007-09-25 | 2008-07-09 | 上海海尔集成电路有限公司 | Low-voltage monitoring circuit and microcontroller |
| CN201163390Y (en) * | 2008-03-19 | 2008-12-10 | 长沙威胜信息技术有限公司 | Reset device used for electric load management and electrical energy data acquisition terminal |
| GB2472051A (en) * | 2009-07-22 | 2011-01-26 | Wolfson Microelectronics Plc | Booting power management circuits by loading configuration data from an external memory into dedicated non-volatile memory. |
| CN203181140U (en) * | 2013-01-08 | 2013-09-04 | 上海大学 | Set top box structure with reset-delay control |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107422824A (en) * | 2017-04-14 | 2017-12-01 | 广东浪潮大数据研究有限公司 | Power-on reset system and method |
| CN107301284A (en) * | 2017-06-14 | 2017-10-27 | 南京中感微电子有限公司 | A kind of numerical model analysis system and electric power management circuit |
| CN107301284B (en) * | 2017-06-14 | 2020-09-22 | 南京中感微电子有限公司 | Digital-analog hybrid system and power management circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| RU2614982C2 (en) | Device for heat-radiating fan control and electronic equipment | |
| CN105302263A (en) | Circuit with automatic power-off restarting function in equipment failure | |
| CN103605596B (en) | System and method for collaborative power management of FPGA (field programmable gata array) chip and BMC (baseboard management controller) chip used on ATCA (advanced telecom computing architecture) blade | |
| CN102723988B (en) | Control method and communication device of optical module | |
| US10424938B2 (en) | Power supply system | |
| EP3530572A1 (en) | Light control system and method | |
| WO2016197856A2 (en) | Method and device for managing active ethernet terminal power source | |
| CN103885799A (en) | Microprocessor delay start system and method based on power management | |
| CN102436413B (en) | Debugging system and debugging method of board power supply | |
| WO2024093604A1 (en) | Feedback (fb)-signal-based two-stage interaction method used in two-stage switch power source | |
| CN100438258C (en) | Circuit and method for control of multi-module power supply synchronization | |
| CN102236400A (en) | Power supply control system and power supply control method of main board management controller | |
| CN107731260B (en) | SSD power supply method and system and SSD | |
| CN105591438A (en) | Micro-power battery pack and micro photovoltaic inverter device with safety control | |
| CN107479611B (en) | A kind of communication equipment and electrification control method | |
| CN101697094A (en) | Double-power power supply unit and method | |
| CN101964540A (en) | Redundant power supply system | |
| CN203894580U (en) | Agricultural general digital quantity input module | |
| CN205405841U (en) | A inputoutput unit for fire alarm system | |
| CN105099716A (en) | Digital information transfer system including fault protection technical field | |
| CN103941621A (en) | Power supply circuit and electronic device | |
| US20140042826A1 (en) | Power adaptor system | |
| JP6436034B2 (en) | Power supply control device, power supply control program, and communication device | |
| CN111798790B (en) | Display control card and display system | |
| CN116191349B (en) | Overvoltage protection circuit, overvoltage protection method of server and server |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20140625 |
|
| RJ01 | Rejection of invention patent application after publication |