CN103869139B - Electric voltage exception detection means - Google Patents
Electric voltage exception detection means Download PDFInfo
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- CN103869139B CN103869139B CN201310479766.8A CN201310479766A CN103869139B CN 103869139 B CN103869139 B CN 103869139B CN 201310479766 A CN201310479766 A CN 201310479766A CN 103869139 B CN103869139 B CN 103869139B
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Abstract
A kind of energy precision detects the abnormal electric voltage exception detection means of supply voltage well.Numerical control device includes voltage abnormal detection circuit.Voltage abnormal detection circuit includes reference circuit and FPGA.R phases reference circuit is by three-phase alternating voltage partial pressure, on the basis of R phases, when the potential difference between one relatively low in other S-phase and T-phase reaches more than assigned voltage, exports pulse.S-phase reference circuit is by three-phase alternating voltage partial pressure, on the basis of S-phase, when the potential difference between with one relatively low in other R phases and T-phase reaches more than assigned voltage, exports pulse.T-phase reference circuit is by three-phase alternating voltage partial pressure, on the basis of T-phase, when the potential difference between with one relatively low in other R phases and S-phase reaches more than assigned voltage, exports pulse.The pulse that FPGA is exported to reference circuit is parsed, and is detected whether to have electric voltage exception and is detected magnitude of voltage.Therefore, numerical control device energy precision detects three-phase alternating voltage with the presence or absence of abnormal well.
Description
Technical field
The present invention relates to a kind of electric voltage exception detection means.
Background technology
Power inverter is directly monitored by the friendship of optional frequency according to the AC power of certain frequency not via direct current
Stream output, to carry out the control of ac motor.Due to when input supply voltage produces abnormal, the meeting in output voltage waveforms
There is exception, therefore, ac motor is difficult to operate well.The supply voltage of three-phase alternating-current supply has phase shortage shape extremely
The various states such as the anti-phase state of state, the phase sequence of power supply.Non-full-phase state is the state of the distribution broken string of an only phase in three-phase.Cause
This, power inverter needs to set the supply voltage for someways detecting supply voltage exception and stopping operating abnormal
Detect circuit.
Supply voltage abnormal detection circuit described in No. 258151 publication of Japanese Patent Laid-Open 2001 year can be examined
Any supply voltage measured in non-full-phase state and phase sequence rp state is abnormal.Supply voltage abnormal detection circuit includes power supply electricity
Press information generation circuit, abnormality detection signal generating circuit, decision circuitry.Supply voltage information generation circuit is to based on three-phase
The information of the magnitude of voltage magnitude relationship of each phases of RST of AC power detected, and defeated as supply voltage information signal
Go out.Abnormality detection signal generating circuit is to the magnitude of voltage magnitude relationships of each phases of RST based on three-phase alternating-current supply when normal
Information is pre-saved, and as abnormality detection signal output.Decision circuitry is believed supply voltage at certain intervals
Information signal and abnormality detection are compared with signal, the output supply voltage abnormal signal when signal is different.
Above-mentioned supply voltage abnormal detection circuit is only believed supply voltage information signal and abnormality detection at certain intervals
Number it is compared.Therefore, supply voltage abnormal detection circuit can not precision detect that supply voltage is abnormal well.Supply voltage
Information signal and abnormality detection are all based on the information of magnitude of voltage magnitude relationship, rather than magnitude of voltage with signal.Therefore, power supply electricity
Pressure abnormal detection circuit can not hold current magnitude of voltage exactly.
The content of the invention
The abnormal electric voltage exception detection of supply voltage is detected well it is an object of the invention to provide a kind of energy precision
Device.
The electric voltage exception detection means of technical scheme 1 is to detect dress to the electric voltage exception that the exception of alternating voltage is detected
Put, including：Above-mentioned alternating voltage partial pressure is multiple phases by partial pressure portion, the partial pressure portion；Pulse output section, with above-mentioned divided fraction
During the above-mentioned multiple phases respectively as benchmark extruded, when the potential difference between the phase different from said reference phase reaches regulation
When more than voltage, pulse output section output pulse；Determination part, the determination part is directed in above-mentioned multiple phases and often mutually determines above-mentioned
The width of the above-mentioned pulse of pulse output section output and cycle；And abnormality determiner, the abnormality determiner is based on said determination
Every above-mentioned width mutually determined and above-mentioned cycle, the benchmark letter for being pre-stored within storage device that portion is directed in above-mentioned multiple phases
Breath, judges above-mentioned alternating voltage with the presence or absence of abnormal.The alternating voltage partial pressure of the supplies such as power supply is by electric voltage exception detection means
Multiple phases, and the pulse produced in the plurality of phases is obtained respectively, the width of pulse and cycle are compared with reference information.
That is, electric voltage exception detection means not only judges abnormal per mutually whether there is in multiple phases, also to based on the basis of a phase
When with being judged in the potential differences of other phases and the pulse that exports with the presence or absence of abnormal.Pulse can reflect the entirety of multiple phases
State.Therefore, electric voltage exception detection means energy precision is good and simply detects alternating voltage with the presence or absence of abnormal.
In the electric voltage exception detection means of technical scheme 2, above-mentioned multiple phases are more than three-phase, with above-mentioned divided fraction
During the above-mentioned multiple phases respectively as said reference extruded, when between phase relatively low in the phase different from said reference phase
When potential difference is reached more than assigned voltage, above-mentioned pulse output section exports pulse.Electric voltage exception detection means not only judges multiple
It is abnormal per mutually whether there is in phase, also to the current potential between phase relatively low in other phases when based on the basis of a phase
Difference and judged in the pulse that exports with the presence or absence of abnormal.Pulse can reflect the integrality of multiple phases.Therefore, electric voltage exception
Detection means energy precision is good and simply detects alternating voltage with the presence or absence of abnormal.
The electric voltage exception detection means of technical scheme 3 also includes calculating part, and the calculating part is according to said determination portion for upper
State in multiple phases and go out dutycycle per the above-mentioned width and above-mentioned computation of Period that mutually determine, above-mentioned partial pressure portion includes photo detector
Equipment, above-mentioned abnormality determiner by above-mentioned calculating part be directed in above-mentioned multiple phases per the above-mentioned dutycycle that mutually calculates with it is above-mentioned
Threshold value is compared respectively, to judge above-mentioned alternating voltage with the presence or absence of abnormal.Because partial pressure portion includes photo detector equipment, because
This can insulate.Thus it is possible to only not judged by other voltage influences by pulse.Electric voltage exception detection means, which is calculated, to be accounted for
Itself and threshold value are simultaneously compared by sky ratio, accordingly, it is capable to not judged with being influenceed to hand over by the individual difference of photo detector equipment
Voltage is flowed with the presence or absence of abnormal.
The electric voltage exception detection means of technical scheme 4 also includes frequency determination part, and the frequency determination part is according to said determination
The above-mentioned cycle that portion is determined determines the frequency of above-mentioned pulse, and said reference information has above-mentioned threshold respectively for each said frequencies
Value, the above-mentioned frequency that the above-mentioned dutycycle that above-mentioned abnormality determiner calculates above-mentioned calculating part is determined with said frequencies determining section
Above-mentioned threshold value corresponding to rate is compared respectively, to judge above-mentioned alternating voltage with the presence or absence of abnormal.Therefore, electric voltage exception is examined
Surveying device can be according to the frequency of alternating voltage, and precision detects alternating voltage with the presence or absence of abnormal well.
In the electric voltage exception detection means of technical scheme 5, in identical phase continuous arrangement, said determination portion is by more than
State the above-mentioned pulse that identical mutually continuously generates and be judged as invalid, it is invalid that above-mentioned abnormality determiner is judged as based on said determination portion
Above-mentioned pulse beyond above-mentioned pulse above-mentioned width and the above-mentioned cycle, judge above-mentioned alternating voltage with the presence or absence of abnormal.
When alternating voltage is normal, the pulse produced in each phase respectively is phase sequence.Alternating voltage is unstable, voltage instantaneous reduces this
In the case of sample, the pulse of a certain phase can disconnect.Now, occurs the continuous phenomenon of pulse in same phase.This phenomenon is to make an uproar
Sound.It is invalid that noise is judged as by determination part.Abnormality determiner is judged as the width of the pulse beyond invalid pulse based on determination part
Degree and cycle, judge alternating voltage with the presence or absence of abnormal.Therefore, even if alternating voltage temporarily it is unstable in the case of, voltage
Abnormal detector also can precision detect alternating voltage with the presence or absence of abnormal well.
In the electric voltage exception detection means of technical scheme 6, above-mentioned alternating voltage is three-phase alternating voltage, above-mentioned partial pressure portion
It is R phases, S-phase, T-phase by above-mentioned three-phase alternating voltage difference partial pressure.Therefore, electric voltage exception detection means is depressed in three-phase alternating current
The effect of the record of technical scheme 5 can be obtained.
The electric voltage exception detection means of technical scheme 7 also includes：Magnitude of voltage calculating part, the magnitude of voltage calculating part is based on above-mentioned
The above-mentioned width that determination part is determined, calculates the magnitude of voltage of above-mentioned alternating voltage；And display part, shown on the display part
In the information for the above-mentioned magnitude of voltage that above-mentioned magnitude of voltage calculating part is calculated and the judged result information of above-mentioned abnormality determiner extremely
Lack any one.Electric voltage exception detection means can be by magnitude of voltage and with the presence or absence of abnormal show in display part.Therefore, user can hold
Change places and confirm current magnitude of voltage and voltage with the presence or absence of abnormal.
Brief description of the drawings
Fig. 1 is the block diagram for the electrical structure for representing numerical control device 1 and lathe 2.
Fig. 2 is the circuit diagram of voltage abnormal detection circuit 15.
Fig. 3 is to regard RST phases as the pulse concept map and the voltage oscillogram of three-phase input during each benchmark phase.
Fig. 4 is the flow chart of voltage dissection process.
Fig. 5 is the explanation figure of pulse period and pulse width.
Fig. 6 is the concept map of normal burst.
Fig. 7 is to produce the concept map of noisy pulse in midway.
Fig. 8 be represent magnitude of voltage and pulse width under 50Hz it is relation, calculated value and three-phase measured value are compared
Chart.
Fig. 9 be represent magnitude of voltage and pulse width under 60Hz it is relation, calculated value and three-phase measured value are compared
Chart.
Figure 10 is the drafting figure (50Hz) for the relation for representing pulse width and ratio.
Figure 11 is the drafting figure (60Hz) for the relation for representing pulse width and ratio.
Figure 12 is the concept map of calculating parameter chart 91.
Embodiment
Embodiments of the present invention are illustrated below.Fig. 1 numerical control device 1 is the electric voltage exception detection dress of the present invention
One put.Numerical control device 1 is controlled to lathe 2, and the workpiece for being held in workbench (not shown) upper surface is cut
Processing.
Reference picture 1, is illustrated to lathe 2.Left and right directions, fore-and-aft direction, the above-below direction of lathe 2 are respectively X-axis side
To, Y direction, Z-direction.Lathe 2 includes mainshaft mechanism (not shown), main axle moving mechanism, tool replacing apparatus etc..Main shaft
Mechanism includes spindle motor 32, and it makes the main shaft rotation for being provided with instrument.Main axle moving mechanism includes Z axis motor 31, X-axis motor
33rd, Y-axis motor 34, make workpiece that main shaft supported relative to worktable upper surface relatively respectively X-direction, Y direction,
Moved in Z-direction.
Tool replacing apparatus includes storehouse motor 35, and it drives the tool storage room (not shown) kept to multiple instruments, and
The instrument for being installed on main shaft is set to be changed with other instruments.Lathe 2 includes guidance panel (not shown), and the guidance panel has
Input unit 17 and display device 18.Input unit 17 is the equipment for carrying out various inputs, setting etc..Display device 18 is
The equipment for showing various display pictures, setting screen, information of voltage, abnormal information etc..Information of voltage is three-phase alternating-current supply 19
The information of the current voltage value supplied.Abnormal information is to represent that the voltage that three-phase alternating-current supply 19 is supplied has abnormal (electricity
Reduce off-flavor is normal) information.State of the electric voltage exception comprising overvoltage or voltage reduction.
Z axis motor 31, spindle motor 32, X-axis motor 33, Y-axis motor 34, storehouse motor 35 respectively include encoder 41~
45。
The electrical structure of numerical control device 1 is illustrated below.Numerical control device 1 includes CPU11, ROM12, RAM13, non-
Volatile storage 14, voltage abnormal detection circuit 15, input and output portion 16, drive circuit 21~25 etc., it is intersecting with three
Stream power supply 19 is used as driving source.CPU11 is controlled to numerical control device 1 in the lump.Be stored with various programs in ROM12.RAM13 pairs
The various data performed in various processing procedures carry out interim storage.Nonvolatile memory devices 14 are filled to operator by inputting
Multiple NC programs put 17 inputs and registered etc. are stored.NC programs by multiple module compositions comprising various control instructions,
It is the program being controlled in units of module to the various actions including the movement of the axle of lathe 2, tool changing etc..
The three-phase alternating voltage that the detection three-phase alternating-current supply 19 of voltage abnormal detection circuit 15 is supplied is with the presence or absence of abnormal.
Drive circuit 21 is connected with Z axis motor 31 and encoder 41.Drive circuit 22 is connected with spindle motor 32 and encoder 42.Driving
Circuit 23 is connected with X-axis motor 33 and encoder 43.Drive circuit 24 is connected with Y-axis motor 34 and encoder 44.Drive circuit
25 are connected with storehouse motor 35 and encoder 45.Drive circuit 21~25 receives command signal from CPU11, and driving current is divided
Corresponding each motor 31~35 is not output to.Drive circuit 21~25 receives feedback signal from encoder 41~45, to enter line position
Put the feedback control with speed.Input and output portion 16 is connected with input unit 17 and display device 18 respectively.
User can select a NC program using input unit 17 from multiple NC programs.CPU11 is by the NC chosen
Program display is in display device 18.CPU11 is controlled according to action of the NC programs of display device 18 to lathe 2 is shown in.
Reference picture 2, is illustrated to three-phase alternating-current supply 19.Three-phase alternating-current supply 19 be make curtage phase that
The AC power obtained after the one-way communication combination of this three system staggered, for example, supply 200V alternating voltage.First is mutually
R phases, second is mutually S-phase, and third phase is T-phase.Three-phase alternating-current supply 19 shown in Fig. 2 is using △ connections (triangle connection).△
Connection is to connect each direction towards phase voltage application of three-phase to form the connection of closed-loop path.In addition to △ connections,
Three-phase alternating-current supply 19 can also be using Y shape connection or V-arrangement connection.
Reference picture 2, is illustrated to voltage abnormal detection circuit 15.Voltage abnormal detection circuit 15 detects three-phase alternating current
The alternating voltage that source 19 is supplied is with the presence or absence of abnormal.Voltage abnormal detection circuit 15 includes R phases reference circuit 51, S-phase benchmark
Circuit 52, T-phase reference circuit 53, FPGA55.R phases reference circuit 51, S-phase reference circuit 52, T-phase reference circuit 53 are referred to as
Reference circuit 51~53.Simple in construction due to voltage abnormal detection circuit 15, therefore, compared with the past, circuit area is smaller.
Therefore, designer or operator easily operate to voltage abnormal detection circuit 15.
The three-phase alternating voltage partial pressure that R phases reference circuit 51 exports three-phase alternating-current supply 19, on the basis of R phases, when with
When potential difference in other S-phase and T-phase between relatively low one is reached more than assigned voltage, pulse is exported.S-phase reference circuit
The 52 three-phase alternating voltage partial pressures for exporting three-phase alternating-current supply 19, on the basis of S-phase, when with other R phases and T-phase compared with
When potential difference between low one is reached more than assigned voltage, pulse is exported.T-phase reference circuit 53 is by three-phase alternating-current supply 19
The three-phase alternating voltage partial pressure of output, on the basis of T-phase, the potential difference between with one relatively low in other R phases and S-phase
When reaching more than assigned voltage, pulse is exported.FPGA55 performs voltage dissection process (reference picture 4) described later.At voltage parsing
Reason is that the pulse that reference circuit 51~53 is exported is parsed, and parsing whether there is electric voltage exception and parse the place of magnitude of voltage
Reason.
R phases reference circuit 51 includes resistance 61,62, shunt regulator (Shunt regulator) 63, photoelectrical coupler 64
Deng.The three-phase alternating voltage that resistance 61,62 exports three-phase alternating-current supply 19 is divided to R phases, S-phase, T-phase respectively.Parallel voltage-stabilizing
Device 63 is when the potential difference between one relatively low on the basis of R phases and in other S-phase and T-phase reaches more than assigned voltage
Connect.When shunt regulator 63 is connected, pulse is output to FPGA55 by the bright light of photoelectrical coupler 64.Shunt regulator 63 is with R
Potential difference on the basis of phase and in other S-phase and T-phase between relatively low one disconnects when being less than assigned voltage.Parallel voltage-stabilizing
When device 63 disconnects, photoelectrical coupler 64 is turned off the light.
S-phase reference circuit 52 includes resistance 71,72, shunt regulator 73, photoelectrical coupler 74 etc..Resistance 71,72 is by three
The three-phase alternating voltage that cross streams power supply 19 is exported is divided to R phases, S-phase, T phases respectively.Shunt regulator 73 is using S-phase as base
It is accurate, with one relatively low in others R phases and T-phase between potential difference reach more than assigned voltage when connect.Shunt regulator
During 73 connection, pulse is output to FPGA55 by the bright light of photoelectrical coupler 74.Shunt regulator 73 on the basis of S-phase, with it is other
R phases and T-phase in potential difference between relatively low one disconnect when being less than assigned voltage.When shunt regulator 73 disconnects, photoelectricity
Coupler 74 is turned off the light.
T-phase reference circuit 53 includes resistance 81,82, shunt regulator 83, photoelectrical coupler 84 etc..Resistance 81,82 is by three
The three-phase alternating voltage that cross streams power supply 19 is exported is divided to R phases, S-phase, T phases respectively.Shunt regulator 83 is using T-phase as base
It is accurate, with one relatively low in others R phases and S-phase between potential difference reach more than assigned voltage when connect.Shunt regulator
During 83 connection, pulse is output to FPGA55 by the bright light of photoelectrical coupler 84.Shunt regulator 83 on the basis of T-phase, with it is other
R phases and S-phase in potential difference between relatively low one disconnect when being less than assigned voltage.When shunt regulator 83 disconnects, photoelectricity
Coupler 84 is turned off the light.
Reference picture 2, Fig. 3, the effect to R phases reference circuit 51 are illustrated.The waveform of Fig. 3 bottoms is by the three of RST
Voltage curve after mutually inputting.Each voltage curve is sine curve, and stagger 120 degree of phases respectively.Three ripples on the upside of Fig. 3
Shape is followed successively by the basis of R phases from top, on the basis of S-phase, on the basis of T-phase when each impulse waveform concept map.It is each general
Read figure and represent that potential difference is in the impulse waveform of more than assigned voltage (such as more than 152.5V).Potential difference is less than assigned voltage
When, pulse voltage is zero.
As described above, R phases reference circuit 51 one on the basis of R phases, relatively low in other S-phase and T-phase and R phases it
Between potential difference when reaching more than assigned voltage, export pulse.It please for example observe the inframe impaled shown in Fig. 3 by double dot dash line.
In t1, the voltage of the voltage ratio T-phase of S-phase is low, and the current potential of R phases is identical with the current potential of S-phase.When the voltage of the voltage ratio T-phase of S-phase
When low, in R phases reference circuit 51, voltage applies towards the arrow A directions (reference picture 2) of dotted line.After t1 is crossed, in R phases
Potential difference is gradually produced between S phases, more than assigned voltage is reached in t2.Shunt regulator 63 is connected.In shunt regulator 63
K terminals (cathode terminal) and A terminals (anode terminal) between there is electric current to flow through.The bright light of photoelectrical coupler 64, it is defeated towards FPGA55
Go out pulse.Pulse is begun to ramp up from t2, and reaches certain value.Potential difference between R phases and S-phase is gradually reduced.
In t3, S-phase and T-phase upset.Pulse is somewhat reduced in t3.After t3 is crossed, due to the voltage ratio S of T-phase
The voltage of phase is low, therefore, in R phases reference circuit 51, and voltage applies towards the arrow B directions (reference picture 2) of double dot dash line.More
Cross after t3, potential difference more than assigned voltage is produced between R phases and T-phase, therefore, pulse rises and reached certain again
Value.Potential difference between R phases and T-phase is gradually reduced, and assigned voltage is less than in t4.Shunt regulator 63 disconnects.Photoelectric coupling
Device 64 is turned off the light.Pulse is zero in t4.The pulse that R phases reference circuit 51 is exported repeats t2~t4 ripple every some cycles
Shape.
S-phase reference circuit 52 and T-phase reference circuit 53 are acted in the same manner as R phases reference circuit 51.As shown in figure 3, S-phase and
Each impulse waveform of T-phase staggers relative to R phase impulse waveforms, their phase.The pulse of R phases, S-phase pulse, T-phase pulse are pressed
Phase sequence according to RST is respectively outputted to FPGA55.FPGA55 is performed at the voltage parsing for each pulse that reference circuit 51~53 is exported
Reason.
Reference picture 4, is illustrated to voltage dissection process.Voltage dissection process is performed by FPGA55.First, FPGA55 connects
Receive the pulse information (S10) of RST phases.Pulse information is R phases reference circuit 51, S-phase reference circuit 52,53 points of T-phase reference circuit
The information for the pulse not exported.
FPGA55 determines pulse width and pulse period (S11) according to pulse information to each phase.As shown in figure 5, pulse is every
Repeat every some cycles.T7 is the time that pulse is begun to ramp up from reference voltage.Reference voltage be, for example, 152.5V so
Certain voltage.T8 is the time that pulse reaches ceiling voltage.T9 is the time that pulse starts to decline from ceiling voltage.T10 is
Pulse drops to the time of reference voltage.T11 is the time that next pulse is begun to ramp up from reference voltage.Pulse width be t7~
Time between t10.Pulse period is the time between t7~t11.Pulse width can also be the time between t8~t9.t7
~t11 is the stabilization time of pulse.Therefore, FPGA55 can determine pulse width and pulse period exactly.
Photoelectrical coupler generally comprises light-emitting component and photo detector the two elements.The luminescent condition of each element, light
The differences such as sensitivity.Luminescent condition, the relation of light reception sensitivity are referred to as CTR (conversion efficiency), are represented with %.CTR has individual difference
It is different, and be deteriorated sometimes because of rheological parameters' change with time.CTR inequality mainly can produce large effect to the FALL times.FPGA55
It is contemplated that the inequality of each element, is modified using the RISE times and FALL time pulse-widths of pulse.The RISE times
It is the time between t7~t8.The FALL times are the time between t9~t10.FPGA55 can also be to RISE times and FALL
Time is measured, and the half width of each time is individually subtracted in the pulse width between t7~t11.By pulse width
During the time being set between t8~t9, FPGA55 need to only add the one of RISE times and FALL times respectively in pulse width
Half width.
FPGA55 calculates frequency (S12).The pulse period that FPGA55 is determined based on each phase, judge three-phase alternating-current supply 19
Frequency be 50Hz, 60Hz or other frequency.FPGA55 will determine that result is stored in storage device 56.
FPGA55 performs pulse inspection processing (S13).Pulse inspection processing is detection R phases reference circuit 51, S-phase benchmark
Each pulse that circuit 52, T-phase reference circuit 53 are exported makes in the presence of the invalid processing of abnormal pulse with the presence or absence of exception.Fig. 6
It is pulse when representing normal.The a cycle of pulse is the time between t15~t16.T15, t16 are when producing pulse
Between.If each pulse of RST phases is normal, as shown in Fig. 3, occur according to RST phase sequence.
Fig. 7 represents to produce noisy pulse in midway.If normal, then a cycle of pulse is t17~t19
Between time.Voltage sometimes such as can because of the power condition in region and moment reduce.Moment electricity in pulse output procedure
Pressure drop is low to turn into noise.In pulse output procedure produce noise when, pulse-break and form two crests.Therefore, pulse meeting
Produced at t17, t18, t19.Pulse period is the two weeks in cycle between cycle and t18~t19 between t17~t18
Phase.When the exception shown in Fig. 7 is produced in the pulse of R phases, the pulse of R phases is mutually continuously generated with identical.FPGA55 according to
RRST each pulse of sequence detection.When pulse is continuously updated with identical phase, pulse is abnormal.FPGA55 judges continuous arteries and veins
Punching is invalid.Therefore, FPGA55 can only pull out normal pulse, to judge exception.
FPGA55 performs sequence examing processing (S14).Each arteries and veins that sequence examing processing is exported according to reference circuit 51~53
Punching, checks whether alternating voltage is phase sequence.Alternating voltage is not that the state of phase sequence is abnormality.Abnormality is, for example, defect
State or rp state.Damage condition is the state of the distribution broken string of an only phase in three-phase.Rp state is the phase sequence of RST phases
Opposite state.FPGA55 is stored in storage device when detecting damage condition or rp state as abnormal information
56。
FPGA55 performs abnormality detection processing (S15).Abnormality detection processing is the mistake for detecting three-phase alternating-current supply 19 respectively
The processing of voltage and voltage reduction.In abnormality detection processing, FPGA55 calculates pulse width and the pulse period of each phases of RST
Dutycycle.FPGA55 is judged as invalid pulse without using in pulse inspection processing.Dutycycle is pulse width and pulse
The ratio in cycle.Storage device 56 be previously stored with multiple frequencies (such as 50Hz and 60Hz) respectively corresponding first threshold and
Second Threshold.First threshold is the threshold value for judging overvoltage.Second Threshold is the threshold value for judging voltage reduction.First
Threshold value and Second Threshold can also be the values obtained according to the measured value of result of the test.For example, under 50Hz frequency, can be by
One threshold value is set as 57.19%, and Second Threshold is set as into 46.62%.If dutycycle is in more than first threshold, FPGA55
It is judged as overvoltage, if dutycycle is in below Second Threshold, FPGA55 is judged as voltage reduction.FPGA55 will determine that result
Storage device 56 is stored in as abnormal information.FPGA55 can also stop according to the 3rd threshold value lower than Second Threshold to detect
Electricity.First threshold and Second Threshold are one of the reference information of the present invention.
FPGA55 uses BIT shift divisions and adder, and the upper of pulse width is gone out with approximation calculation according to the pulse period
The determining reference value with lower limit is limited, and pairing approximation value and pulse width are compared.For example, the pulse period under 50Hz is
During 20ms, FPGA55 internal counter is that 1=2 μ s units of counting, BIT length are 14bit, and count value is about
10000.BIT shift divisions are in each displacement divided by 2.Therefore, FPGA55 carries out 13 BIT displacement, only to the 1st, 4,7,
10th, 11, carry out addition 13 times, the higher limit of first threshold i.e. 57.19% pulse width is calculated according to the pulse period.Specifically
For, first time BIT displacements are 50%, the 4th BIT displacement is 6.25%, the 7th BIT displacement is 0.78%, the tenth time
BIT displacements are 0.1%, a tenth BIT displacement is 0.05%, the 13rd BIT displacement is 0.01%, are added up to
57.19%.FPGA55 can be compared to higher limit and pulse width, and electricity was judged as when pulse width exceedes higher limit
Pressure.
FPGA55 performs magnitude of voltage calculating processing (S16).Magnitude of voltage calculating processing be using pulse width, the pulse period and
Frequency calculates the processing of RST three-phase voltage value.The general arithmetic expression for calculating single-phase voltage value is as follows.VIN is input
Voltage.VE is voltage detection threshold, and it is the voltage of photoelectrical coupler conducting.F is frequency.
VIN=VE/ (cos (2 π × f × (pulse width/2)) (1)
Fig. 8 graph representation uses the relation of the magnitude of voltage that (1) formula calculates and pulse width under 50Hz frequency.Under
The curve P1 of side is calculated value, and the curve P2 of top is three-phase measured value.Calculated value is that the pulse for using (1) formula to calculate is wide
Degree.Three-phase measured value is the pulse width using the FPGA55 magnitudes of voltage being measured to.Curve P1 pulse width is curve P2
About 0.6 times of pulse width.Therefore, it is not used to single-phase for (1) formula of object to three-phase alternating-current supply under 50Hz frequencies
19 magnitude of voltage is calculated.
The magnitude of voltage and the relation of pulse width that use (1) formula is calculated at 60 hz are as the diagram of Fig. 9.
The curve Q1 of lower section is calculated value, and the curve Q2 of top is three-phase measured value.The pulse width for understanding curve Q1 is curve Q2
About 0.6 times of pulse width.Therefore, it is not used to single-phase for (1) formula of object to three-phase alternating-current supply under 60Hz frequencies
19 magnitude of voltage is calculated.
It is right in order to calculate the magnitude of voltage of three-phase alternating-current supply 19 according to the pulse width being measured to according to the studies above
(1) formula is improved.The pulse width for substituting into (1) formula need to be only modified, directly export three-phase measured value.Figure 10 is
The ratio of calculated value and three-phase measured value is calculated for each pulse width under 50Hz frequencies, obtained chart is drawn.It is horizontal
Axle represents the pulse width that FPGA55 is measured to.The longitudinal axis represents ratio.Ratio is that the pulse width being measured to FPGA55 is carried out
The correction value of amendment.The approximate expression of these drawing datas is as follows.
y=-0.0005510245x4+0.0203099438x3-0.2793184179x2+1.7165523815x-3
.3316034929 (2)
Figure 11 is the ratio of calculated value and three-phase measured value to be calculated, drawn for each pulse width under 60Hz frequencies
Obtained chart.Transverse axis represents the pulse width that FPGA55 is measured to, and the longitudinal axis represents ratio.Ratio is measured to FPGA55
The correction value that pulse width is modified.The approximate expression of these drawing datas is as follows.
y=0.0137540330x4-0.4256553089x3+4.9038648653x2-24.8943800941x+4
7.6117061713 (3)
Calculating formula that the pulse width being measured to according to FPGA55 is calculated the magnitude of voltage of three-phase alternating-current supply 19 and
Calculating parameter is as follows.For each frequency setting calculating parameter.
·VE：Voltage detection threshold (being 152.5V in present embodiment)
·ActPW：Survey pulse width (ms)
·F：Frequency
ApP1~ApP5：The approximate expression parameter obtained by (2) formula and (3) formula
Storage device 56 is stored with Figure 12 calculating parameter chart 91.Calculating parameter chart 91 sets above-mentioned calculating respectively
Parameter.ApP1~ApP5 approximate expression parameter need to only be changed according to above-mentioned evaluation result.Therefore, FPGA55 will be calculated
The approximate expression parameter of frequency in parameter chart 91, being obtained according to the pulse period of measure is applied to (4) formula, and will survey arteries and veins
Rush width and substitute into ActPW, so as to calculate the magnitude of voltage of three-phase alternating-current supply 19.FPGA55 using the magnitude of voltage calculated as
Information of voltage is stored in storage device 56.
The abnormal information and information of voltage that FPGA55 will be stored in storage device 56 are output to CPU11 (S17).CPU11 will
The abnormal information and information of voltage of output are stored in RAM13 and are shown in display device 18.Operator is shown by confirming
In the abnormal information and information of voltage of display device 18, it is normal or abnormal for can recognize that three-phase alternating voltage.Therefore, operate
Person can quickly account for repairing replacing of abnormal position etc..Because operator not only can confirm that abnormal information also can confirm that voltage is believed
Breath, therefore, can confirm that whether three-phase alternating voltage is normal all the time.
Reference circuit 51~53 be the present invention partial pressure portion and one of pulse output section.At S11, the S13 for performing Fig. 4
The FPGA55 of reason is one of the determination part of the present invention.The FPGA55 for performing S12 processing is the one of the frequency determination part of the present invention
Example.The FPGA55 for performing S15 processing is one of the abnormality determiner of the present invention.Shown in display device 18 information of voltage and
The CPU11 of abnormal information is one of the display part of the present invention.
As described above, the numerical control device 1 of present embodiment includes voltage abnormal detection circuit 15.Electric voltage exception is examined
The detection three-phase alternating-current supply 19 of slowdown monitoring circuit 15 is with the presence or absence of abnormal.Voltage abnormal detection circuit 15 includes R phases reference circuit 51, S
Phase reference circuit 52, T-phase reference circuit 53, FPGA55.The three-phase alternating current that R phases reference circuit 51 exports three-phase alternating-current supply 19
Voltage, on the basis of R phases, the potential difference between one relatively low in other S-phase and T-phase reach assigned voltage with
When upper, pulse was exported.The three-phase alternating voltage partial pressure that S-phase reference circuit 52 exports three-phase alternating-current supply 19, using S-phase as base
Standard, when the potential difference between with one relatively low in other R phases and T-phase reaches more than assigned voltage, exports pulse.T-phase
The three-phase alternating voltage partial pressure that reference circuit 53 exports three-phase alternating-current supply 19, on the basis of T-phase, when with other R phases and S
When potential difference in phase between relatively low one is reached more than assigned voltage, pulse is exported.FPGA55 is to reference circuit 51~53
The pulse of output is parsed, and is detected whether to have electric voltage exception in real time and is detected magnitude of voltage.FPGA55 not only judges three-phase
The each of alternating voltage mutually whether there is exception, and also the potential difference of other two-phases when based on the basis of a phase is exported
Judged in pulse with the presence or absence of abnormal.Therefore, the energy of numerical control device 1 precision detects whether three-phase alternating voltage is deposited well
In exception.
FPGA55 per the pulse width and pulse period that mutually determine in multiphase according to calculating dutycycle.FPGA55
The dutycycle calculated is set to be compared with first threshold, Second Threshold, so as to detect three-phase alternating-current supply 19 respectively
Overvoltage and voltage reduction.Because FPGA55 is compared with dutycycle, accordingly, it is capable to which the individual difference for reducing photoelectrical coupler is other
Influence.Because there is each reference circuit 51~53 photo detector equipment to be photoelectrical coupler, accordingly, it is capable to make circuit interior insulation.Institute
So that FPGA55 will not be influenceed by other voltages, only can calculate magnitude of voltage by pulse information.
FPGA55 determines frequency according to the pulse period.FPGA55 enters corresponding with the frequency determined threshold value and dutycycle
Row compares.Therefore, numerical control device 1 can be according to the frequency of alternating voltage, and precision detects alternating voltage with the presence or absence of different well
Often.
FPGA55, will be with identical mutually continuous production when resulting from the pulse of multiple phases respectively with identical phase continuous arrangement
It is invalid that raw pulse is judged as.Therefore, numerical control device 1 can lowly wait caused noise to result from pulse in the moment of voltage
During way, make pulse invalid, so normal pulse can be only pulled out to judge electric voltage exception.
Information of voltage and abnormal information are shown in display device 18 by CPU11.Therefore, user can be easily monitored currently
Magnitude of voltage and with the presence or absence of exception.CPU11 can also by information of voltage and abnormal information at least any one be shown in it is aobvious
Showing device 18.
The present invention in addition to the implementation described above, can also carry out various modifications.In the above-described embodiment, to three-phase alternating current
The exception for the three-phase alternating voltage that power supply 19 is supplied is detected, but it is also possible to detect two-phase or the phase more than three-phase.For example exist
In the case that AC power is two-phase, reference circuit is using two-phase as benchmark phase, between the phase different from benchmark phase
Potential difference when reaching more than assigned voltage, produce pulse.
Each reference circuit 51~53 includes photoelectrical coupler 64,74,84, but as long as being photo detector equipment, such as
Can also be light MOSFET.
The FPGA55 abnormal informations exported are shown in display device 18 by CPU11.CPU11 can also be entered based on abnormal information
Exercise the control that the action of lathe 2 stops.For example, when detecting overvoltage or voltage reduction, CPU11 can also stop lathe
2 action.FPGA55 detects overvoltage and voltage reduction by being compared to first threshold and Second Threshold, but also may be used
To use multiple threshold values, the multistage overvoltage and voltage reduction are detected.Now, FPGA55 can detect that overvoltage and voltage are low
Under degree.CPU11 can also carry out abnormal notice according to overvoltage or the degree of voltage reduction using display device 18, and
The action of lathe 2 is set to force to stop.
The electric voltage exception detection means of the present invention can also be independently of the electric voltage exception detection means of numerical control device 1.
FPGA55 calculates dutycycle according to pulse width and pulse period, and makes dutycycle and first threshold and the second threshold
Value is compared to judge abnormal, but it is also possible to only judge exception by pulse width.
Claims (3)
1. a kind of electric voltage exception detection means, is the electric voltage exception detection means detected to the exception of alternating voltage, it is special
Levy and be, including：
The alternating voltage partial pressure is multiple phases by partial pressure portion, the partial pressure portion；
Pulse output section, in the multiple phase as benchmark extruded using the divided fraction, when with different from institute
When stating the potential difference between the phase of benchmark phase and reaching more than assigned voltage, pulse output section output pulse；
Determination part, the determination part is directed to the width per the pulse for mutually determining the pulse output section output in the multiple phase
Degree and cycle；And
Abnormality determiner, the abnormality determiner is directed to every width mutually determined in the multiple phase based on the determination part
Degree and the cycle, the reference information for being pre-stored within storage device, judge the alternating voltage with the presence or absence of exception,
The multiple phase be three-phase more than,
Using the divided fraction extrude it is the multiple as the benchmark phase when, when with different from the benchmark phase
Phase in potential difference between relatively low phase when reaching more than assigned voltage, the pulse output section exports pulse,
The electric voltage exception detection means also includes calculating part, and the calculating part is directed in the multiple phase according to the determination part
Go out dutycycle per the width and the computation of Period that mutually determine,
The partial pressure portion includes photo detector equipment,
The abnormality determiner by the calculating part be directed in the multiple phase per the dutycycle that mutually calculates with it is described
Reference information is compared respectively, to judge the alternating voltage with the presence or absence of exception,
The electric voltage exception detection means also includes frequency determination part, the institute that the frequency determination part is determined according to the determination part
The cycle of stating determines the frequency of the pulse,
The reference information has threshold value respectively for each frequency,
Described in the dutycycle and the frequency determination part that the abnormality determiner calculates the calculating part are determined
The threshold value corresponding to frequency is compared respectively, to judge the alternating voltage with the presence or absence of exception,
In identical phase continuous arrangement, the pulse mutually continuously generated with the identical is judged as nothing by the determination part
Effect,
The abnormality determiner is judged as the width of the pulse beyond the invalid pulse based on the determination part
With the cycle, judge the alternating voltage with the presence or absence of abnormal.
2. electric voltage exception detection means as claimed in claim 1, it is characterised in that
The alternating voltage is three-phase alternating voltage,
Three-phase alternating voltage difference partial pressure is R phases, S-phase, T-phase by the partial pressure portion.
3. electric voltage exception detection means as claimed in claim 1 or 2, it is characterised in that also include：
Magnitude of voltage calculating part, the width that the magnitude of voltage calculating part is determined based on the determination part, calculates the exchange
The magnitude of voltage of voltage；And
Display part, shows the information and the exception for the magnitude of voltage that the magnitude of voltage calculating part is calculated on the display part
At least one in the judged result information of judging part.
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| Application Number | Priority Date | Filing Date | Title |
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| JP2012269955A JP6070139B2 (en) | 2012-12-11 | 2012-12-11 | Voltage abnormality detector |
| JP2012-269955 | 2012-12-11 |
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| CN103869139A CN103869139A (en) | 2014-06-18 |
| CN103869139B true CN103869139B (en) | 2017-08-29 |
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| CN104391201A (en) * | 2014-11-27 | 2015-03-04 | 国家电网公司 | Abnormal electricity consumption judging method based on abnormal voltage analysis |
| CN106330975A (en) * | 2016-11-03 | 2017-01-11 | 上海三零卫士信息安全有限公司 | Method for periodic exception detection based on SCADA system |
| JP6866800B2 (en) * | 2017-08-04 | 2021-04-28 | ブラザー工業株式会社 | Voltage abnormality detector |
| JP7056058B2 (en) * | 2017-09-29 | 2022-04-19 | ブラザー工業株式会社 | AC voltage detector, image forming equipment and industrial machinery |
| CN108062616B (en) * | 2017-11-20 | 2024-01-23 | 国网福建省电力有限公司 | Electricity consumption anomaly detection system with constraint conditions |
| CN108120872A (en) * | 2017-12-27 | 2018-06-05 | 奥克斯空调股份有限公司 | A kind of protection system and method for three-phase electricity air-conditioner controller |
| CN110535094A (en) * | 2019-10-15 | 2019-12-03 | 深圳市伟邦自动化科技有限公司 | Three-phase four-wire system voltage protector and its control method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1459922A (en) * | 2002-05-21 | 2003-12-03 | 三菱电机株式会社 | Abnormal detector for motor driving system |
| CN1894836A (en) * | 2003-05-15 | 2007-01-10 | Abb有限公司 | Phase failure detector and a device comprising the same |
| CN101682292A (en) * | 2007-07-02 | 2010-03-24 | 株式会社安川电机 | Inverter and method for detecting output voltage of the same |
| CN101833049A (en) * | 2009-02-09 | 2010-09-15 | 富士电机系统株式会社 | Abnormality monitoring apparatus |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3015575B2 (en) * | 1992-02-19 | 2000-03-06 | 四国電力株式会社 | Voltage drop detector |
| JP2001258151A (en) * | 2000-03-08 | 2001-09-21 | Yaskawa Electric Corp | Power supply voltage failure detection circuit and method thereof |
| CN101673933A (en) * | 2009-08-25 | 2010-03-17 | 山东中瑞电气有限公司 | Protection device of power supply line disconnection fault |
| JP2011053108A (en) * | 2009-09-02 | 2011-03-17 | Kyoritsu Keiki Co Ltd | Reverse phase/phase interruption detecting device |
-
2012
- 2012-12-11 JP JP2012269955A patent/JP6070139B2/en active Active
-
2013
- 2013-10-14 CN CN201310479766.8A patent/CN103869139B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1459922A (en) * | 2002-05-21 | 2003-12-03 | 三菱电机株式会社 | Abnormal detector for motor driving system |
| CN1894836A (en) * | 2003-05-15 | 2007-01-10 | Abb有限公司 | Phase failure detector and a device comprising the same |
| CN101682292A (en) * | 2007-07-02 | 2010-03-24 | 株式会社安川电机 | Inverter and method for detecting output voltage of the same |
| CN101833049A (en) * | 2009-02-09 | 2010-09-15 | 富士电机系统株式会社 | Abnormality monitoring apparatus |
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| JP6070139B2 (en) | 2017-02-01 |
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