CN103855254B - Method for manufacturing light emitting diode - Google Patents
Method for manufacturing light emitting diode Download PDFInfo
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- CN103855254B CN103855254B CN201210499489.2A CN201210499489A CN103855254B CN 103855254 B CN103855254 B CN 103855254B CN 201210499489 A CN201210499489 A CN 201210499489A CN 103855254 B CN103855254 B CN 103855254B
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- layer
- light emitting
- emitting diode
- perforate
- manufacture method
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- 238000000034 method Methods 0.000 title claims abstract description 52
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000004065 semiconductor Substances 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 7
- 230000008569 process Effects 0.000 claims abstract description 6
- 230000000737 periodic effect Effects 0.000 claims description 10
- 238000003491 array Methods 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 239000011148 porous material Substances 0.000 claims description 2
- 239000010437 gem Substances 0.000 claims 1
- 229910001751 gemstone Inorganic materials 0.000 claims 1
- 238000002360 preparation method Methods 0.000 abstract description 6
- 238000000605 extraction Methods 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract 1
- 238000001459 lithography Methods 0.000 abstract 1
- 230000008901 benefit Effects 0.000 description 6
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910005540 GaP Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
Abstract
The invention provides a method for manufacturing a light emitting diode. The method comprises the following steps: first, making an N-type layer, a quantum well layer and a P-type layer on the surface of a semiconductor substrate in sequence; then, etching the P-type layer and the quantum well layer to form an N electrode preparation area; next, forming a transparent conductive layer on the surface of the P-type layer, and etching the transparent conductive layer, the P-type layer and the quantum well layer by the use of a lithography process to form a plurality of holes which penetrate into the N-type layer, are arranged periodically and have a preset diameter; and finally, making a P electrode on the surface of the transparent conductive layer and making an N electrode in the N electrode preparation area. The method of the invention has the beneficial effect that the plurality of periodically-arranged nano-scale holes are etched in the light emitting diode so that the light extraction efficiency can be effectively improved, thereby improving the luminous efficiency.
Description
Technical field
The invention belongs to field of semiconductor illumination, more particularly to a kind of manufacture method of light emitting diode.
Background technology
Semiconductor lighting, with remarkable advantages such as long lifespan, energy-saving and environmental protection, safety, is incited somebody to action as new and effective solid light source
As leaping again after incandescent lamp, fluorescent lamp in mankind's illumination history, its application field expands rapidly, positive to drive
The upgrading of the industries such as traditional lighting, display, its economic benefit and social benefit are huge.Just because of this, semiconductor lighting quilt
Generally regard one of 21 century new industry most with prospects as, be also the most important system of coming years optoelectronic areas high
One of point.Light emitting diode is by three four compoundses, such as GaAs（GaAs）、GaP（Gallium phosphide）、GaAsP（Gallium arsenide phosphide）
It is made Deng semiconductor, its core is PN junction.Therefore it has the I-N characteristics of general P-N junction, i.e. forward conduction, reversely end,
Breakdown characteristics.Additionally, under certain condition, it also has the characteristics of luminescence.Under forward voltage, electronics is empty by injection P areas of N areas
Cave is by injection N areas of P areas.Into the minority carrier in other side region（Few son）A part and majority carrier（It is more sub）It is combined and sends out
Light.
Due to air refraction（1.0）With GaN refractive indexes（2.3）Between have larger difference, light is from facing that GaN is escaped out
Boundary angle is 23 degree so that most light is totally reflected in GaN layer, so that the extraction efficiency of light is relatively low.In order to improve
Light extraction efficiency, conventional LED processing procedures are to carry out patterned substrate, to reduce influence of the total reflection to light light extraction efficiency；And for falling
Dress LED chip（flip-chip）, in order to improve LED luminous efficiencies, usually to flip-chip（flip-chip）Exiting surface N-
GaN faces are roughened.Now market mainstream LED chip is essentially all traditional forward LED chip structure, and p-
GaN layer is relatively thin and article on plasma is sensitive, is easier to receive damage, therefore be roughened p-GaN layer surface relatively difficult.
Therefore it provides a kind of method of the light extraction efficiency that can effectively improve formal dress structure LED chip is necessary.
The content of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of manufacturer of light emitting diode
Method, for solving the problems, such as that light emitting diode is because the total reflection effect to light causes light emission rate relatively low in the prior art.
In order to achieve the above objects and other related objects, the present invention provides a kind of manufacture method of light emitting diode, described
Manufacture method is at least comprised the following steps：
1）Semi-conductive substrate is provided, being sequentially depositing in the semiconductor substrate surface at least includes N-type layer, SQW
Layer, the epitaxial light emission structure of P-type layer；
2）Etch the P-type layer and quantum well layer and prepare region to form N electrode；
3）Transparency conducting layer is formed in the P-type layer surface, and the transparency conducting layer, p-type are etched using photoetching process
Layer and quantum well layer, with formed it is multiple be through to the N-type layer in periodic arrangement and with the perforate in default aperture；
4）P electrode is made in the layer at transparent layer, preparing region in the N electrode prepares N electrode.
As a kind of preferred scheme of the manufacture method of light emitting diode of the invention, each periodic arrangement mode of the perforate
It is the arrangement of cubic array or the arrangement of six square arrays.
Used as a kind of preferred scheme of the manufacture method of light emitting diode of the invention, the centre distance of adjacent two perforate is
2 ~ 10 times of the open pore size.
Used as a kind of preferred scheme of the manufacture method of light emitting diode of the invention, the aperture of the perforate is n λ/4,
Wherein, n values are 1,2,3 or the dominant wavelength that is emitted beam for light emitting diode of 4, λ.
Used as a kind of preferred scheme of the manufacture method of light emitting diode of the invention, the perforate is circular port, described
The aperture of circular port is diameter of a circle.
Used as a kind of preferred scheme of the manufacture method of light emitting diode of the invention, the perforate is regular hexagon hole,
The aperture of the perforate is the external diameter of a circle of the regular hexagon.
Used as a kind of preferred scheme of the manufacture method of light emitting diode of the invention, the perforate is square hole, institute
The aperture for stating perforate is the square external diameter of a circle.
As a kind of preferred scheme of the manufacture method of light emitting diode of the invention, step 3）In etching technics be
ICP or RIE.
Further, step 4）It is also thinning including being carried out to the Semiconductor substrate from the back side afterwards, and carry out back of the body plating reflection
The step of layer.
Further, the Semiconductor substrate is Sapphire Substrate, and the N-type layer is N-GaN layers, and the quantum well layer is
InGaN layer, the P-type layer is P-GaN layers.
Further, the transparency conducting layer is ITO, ATO, FTO or AZO.
As described above, the present invention provides a kind of manufacture method of light emitting diode, made successively prior to semiconductor substrate surface
Make N-type layer, quantum well layer, P-type layer；Then the P-type layer and quantum well layer are etched and prepares region to form N electrode；Then in
The P-type layer surface forms transparency conducting layer, and etches the transparency conducting layer, P-type layer and quantum well layer using photoetching process,
With formed multiple be through to the N-type layer in periodic arrangement and with the perforate in default aperture；Most after the electrically conducting transparent
Layer surface makes P electrode, and preparing region in the N electrode prepares N electrode.The invention has the advantages that：The present invention exists
The nanometer-scale openings of multiple periodic arrangements are etched in light emitting diode, the light emission rate of light can be effectively improved, so as to carry
High-luminous-efficiency.
Brief description of the drawings
Fig. 1 ~ Fig. 2 is shown as the manufacture method step 1 of light emitting diode of the invention）The structural representation for being presented.
Fig. 3 is shown as the manufacture method step 2 of light emitting diode of the invention）The structural representation for being presented.
Fig. 4 ~ 5a is shown as the step 3 in the manufacture method of light emitting diode of the invention）The structural representation for being presented.
Fig. 5 b are shown as the step 3 in the manufacture method embodiment 1 of light emitting diode of the invention）The planar junction for being presented
Structure schematic diagram.
Fig. 5 c are shown as the step 3 in the manufacture method embodiment 2 of light emitting diode of the invention）The planar junction for being presented
Structure schematic diagram.
Fig. 6 ~ Fig. 8 is shown as the manufacture method step 4 of light emitting diode of the invention）The structural representation for being presented.
Component label instructions
101 Semiconductor substrates
102 N-type layers
103 quantum well layers
104 P-type layers
105 N electrodes prepare region
106 transparency conducting layers
107 perforates
108 P electrodes
109 N electrodes
110 reflecting layer
Specific embodiment
Embodiments of the present invention are illustrated below by way of specific instantiation, those skilled in the art can be by this specification
Disclosed content understands other advantages of the invention and effect easily.The present invention can also be by specific realities different in addition
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Refer to Fig. 1 ~ Fig. 8.It should be noted that the diagram provided in the present embodiment only illustrates this hair in a schematic way
Bright basic conception, component count when only display is with relevant component in the present invention rather than according to actual implementation in schema then,
Shape and size are drawn, and it is actual when the implementing kenel of each component, quantity and ratio can be a kind of random change, and its component
Layout kenel is likely to increasingly complex.
It should be noted that the aperture described in the present embodiment is diameter of a circle or the external diameter of a circle of regular polygon.
Embodiment 1
Fig. 1 ~ Fig. 5 b and Fig. 6 ~ Fig. 8 are referred to, the present embodiment provides a kind of manufacture method of light emitting diode, the manufacture
Method is at least comprised the following steps：
As shown in Fig. 1 ~ Fig. 2, step 1 is carried out first）, there is provided semi-conductive substrate 101, in the Semiconductor substrate 101
Surface is sequentially depositing at least includes N-type layer 102, quantum well layer 103, the epitaxial light emission structure of P-type layer 104；
In the present embodiment, described Semiconductor substrate 101 is Sapphire Substrate.The N-type layer 102 is N-GaN layers, institute
Quantum well layer 103 is stated for InGaN layer, the P-type layer 104 is P-GaN layers, specifically, there is provided a Sapphire Substrate, is then used
The methods such as chemical vapour deposition technique are sequentially depositing N-GaN layers in the sapphire substrate surface, quantum well layer 103 and P-GaN layers,
Complete the preparation of epitaxial light emission structure.Certainly, in other embodiments, other light emitting epitaxial layers can be selected, its preparation
Method can also select all expected extension means.
As shown in figure 3, then carrying out step 2）, the P-type layer 104 and quantum well layer 103 is etched to form N electrode preparation
Region 105.
In the present embodiment, photoresist is coated prior to the surface of the P-type layer 104, then according to the position of N electrode to be prepared
The litho pattern with window is fabricated to, the light emitting epitaxial layer is performed etching using ICP etching methods then, until exposing one
N-GaN layers of platform, region 105 is prepared to form N electrode.
As shown in Fig. 4 ~ Fig. 5 b, step 3 is then carried out）, transparency conducting layer 106 is formed in the surface of the P-type layer 104, and
The transparency conducting layer 106, P-type layer 104 and quantum well layer 103 are etched using photoetching process, the N is through to form multiple
Type layer 102 in periodic arrangement and the perforate 107 with default aperture.
Specifically, litho pattern is formed prior to the surface of the transparency conducting layer 106, is then carved using ICP or RIE etching methods
Lose the transparency conducting layer 106, P-type layer 104 and quantum well layer 103, with formed it is multiple be through to the N-type layer 102 in week
Phase arranges and the perforate 107 with default aperture.
The transparency conducting layer 106 is ITO, ATO, FTO or AZO.In the present embodiment, the transparency conducting layer 106 is
Transparent conductive layer.
Respectively the periodic arrangement mode of the perforate 107 is cubic array arrangement or the arrangement of six square arrays.Adjacent two perforate 107
Centre distance is 2 ~ 10 times of the aperture of the perforate 107.The aperture of the perforate 107 be n λ/4, wherein, n values be 1,2,3 or
4, the λ dominant wavelengths emitted beam for light emitting diode.
In the present embodiment, the perforate 107 is in cubic array arrangement, and the centre distance of adjacent two perforate 107 is described
2 times of the aperture of perforate 107, the perforate 107 is circular port, and the aperture of the circular port is diameter of a circle, as shown in Figure 5 b.Institute
Diameter of a circle is stated for λ/4, in the present embodiment, the λ is 460nm.Certainly, in other embodiments, the perforate 107 can be with
It is other shapes, such as regular hexagon hole or square hole, its arrangement mode can also be six square arrays arrangements etc..The each hole one
Aspect can improve the light emission rate of the P-type layer 104 and the side wall of the quantum well layer 103, on the other hand to described P-GaN layers and
The surface of the transparency conducting layer 106 is roughened, therefore can greatly improve P-GaN layers and the table of the transparency conducting layer 106
The light emission rate in face.
As shown in Fig. 6 ~ Fig. 8, step 4 is finally carried out）, P electrode 108 is made in the surface of the transparency conducting layer 106, in institute
State N electrode and prepare the preparation of region 105 N electrode 109.
In the present embodiment, the P electrode 108 and N electrode 109 are made by the method such as plating or sputtering, is being made
After the P, N electrode, the Semiconductor substrate 101 is carried out from the back side using grinding or the method such as wet etching it is thinning, then
Back silver-plated reflecting layer 110 is carried out, reduction process and back silver-plated reflecting layer 110 can effectively improve the light emission rate of light emitting diode.
Embodiment 2
As shown in Fig. 1 ~ Fig. 5 a and Fig. 5 c ~ Fig. 8, the present embodiment provides a kind of manufacture method of light emitting diode, and its is basic
Step such as embodiment 1, wherein, the respectively perforate 107 is arranged in six square arrays, and the centre distance of adjacent two perforate 107 is opened for described
4 times of the aperture of hole 107, the perforate 107 is regular hexagon hole, and the aperture of the perforate 107 is the regular hexagon circumscribed circle
Diameter, a diameter of 3 λ/4 of the regular hexagon circumscribed circle, as shown in Figure 5 c.
Embodiment 3
As shown in Fig. 1 ~ Fig. 5 a and Fig. 6 ~ Fig. 8, the present embodiment provides a kind of manufacture method of light emitting diode, and it is walked substantially
Rapid such as embodiment 1, wherein, the respectively perforate 107 is arranged in six square arrays, and the centre distance of adjacent two perforate 107 is the perforate
6 times of 107 apertures, the perforate 107 is square hole, and the aperture of the perforate 107 is the square external diameter of a circle,
A diameter of λ/2 of the square circumscribed circle（Its planar structure is unillustrated）.
In sum, the present invention provides a kind of manufacture method of light emitting diode, is made successively prior to semiconductor substrate surface
Make N-type layer, quantum well layer, P-type layer；Then the P-type layer and quantum well layer are etched and prepares region to form N electrode；Then in
The P-type layer surface forms transparency conducting layer, and etches the transparency conducting layer, P-type layer and quantum well layer using photoetching process,
With formed multiple be through to the N-type layer in periodic arrangement and with the perforate in default aperture；Most after the electrically conducting transparent
Layer surface makes P electrode, and preparing region in the N electrode prepares N electrode.The invention has the advantages that：The present invention exists
The nanometer-scale openings of multiple periodic arrangements are etched in light emitting diode, the light emission rate of light can be effectively improved, so as to carry
High-luminous-efficiency.So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe
The personage for knowing this technology all can carry out modifications and changes under without prejudice to spirit and scope of the invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete with institute under technological thought without departing from disclosed spirit such as
Into all equivalent modifications or change, should be covered by claim of the invention.
Claims (9)
1. a kind of manufacture method of light emitting diode, it is characterised in that the manufacture method is at least comprised the following steps：
1) semi-conductive substrate is provided, being sequentially depositing in the semiconductor substrate surface at least includes N-type layer, quantum well layer, p-type
The epitaxial light emission structure of layer；
2) P-type layer and quantum well layer are etched and prepares region to form N electrode；
3) form transparency conducting layer in the P-type layer surface, and using photoetching process etch the transparency conducting layer, P-type layer and
Quantum well layer, with formed it is multiple be through to the N-type layer in periodic arrangement and with the perforate in default aperture；The perforate
Aperture is n λ/4, wherein, n values are 1,2,3 or the dominant wavelength that is emitted beam for light emitting diode of 4, λ；In adjacent two perforate
Heart distance is 2~10 times of the open pore size；
4) P electrode is made in the layer at transparent layer, preparing region in the N electrode prepares N electrode.
2. the manufacture method of light emitting diode according to claim 1, it is characterised in that：The each periodic arrangement side of the perforate
Formula is cubic array arrangement or the arrangement of six square arrays.
3. the manufacture method of light emitting diode according to claim 1, it is characterised in that：The perforate is circular port, institute
The aperture for stating circular port is diameter of a circle.
4. the manufacture method of light emitting diode according to claim 1, it is characterised in that：The perforate is regular hexagon
Hole, the aperture of the perforate is the external diameter of a circle of the regular hexagon.
5. the manufacture method of light emitting diode according to claim 1, it is characterised in that：The perforate is square hole,
The aperture of the perforate is the square external diameter of a circle.
6. the manufacture method of light emitting diode according to claim 1, in step 3) in, it is characterised in that：Etching technics
It is ICP or RIE.
7. the manufacture method of light emitting diode according to claim 1, it is characterised in that：Step 4) after also include from the back side
The Semiconductor substrate is carried out it is thinning, and the step of carry out back silver-plated reflecting layer.
8. the manufacture method of light emitting diode according to claim 1, it is characterised in that：The Semiconductor substrate is blue precious
Stone lining bottom, the N-type layer is N-GaN layers, and the quantum well layer is InGaN layer, and the P-type layer is P-GaN layers.
9. the manufacture method of light emitting diode according to claim 1, it is characterised in that：The transparency conducting layer be ITO,
ATO, FTO or AZO.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210499489.2A CN103855254B (en) | 2012-11-29 | 2012-11-29 | Method for manufacturing light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210499489.2A CN103855254B (en) | 2012-11-29 | 2012-11-29 | Method for manufacturing light emitting diode |
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| Publication Number | Publication Date |
|---|---|
| CN103855254A CN103855254A (en) | 2014-06-11 |
| CN103855254B true CN103855254B (en) | 2017-05-24 |
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| CN201210499489.2A Expired - Fee Related CN103855254B (en) | 2012-11-29 | 2012-11-29 | Method for manufacturing light emitting diode |
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| CN109388992A (en) * | 2018-09-28 | 2019-02-26 | 苏宁易购集团股份有限公司 | A kind of scanning device and scanning system |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101488547A (en) * | 2008-12-30 | 2009-07-22 | 上海蓝光科技有限公司 | LED chip construction and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101488547A (en) * | 2008-12-30 | 2009-07-22 | 上海蓝光科技有限公司 | LED chip construction and manufacturing method thereof |
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| CN103855254A (en) | 2014-06-11 |
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Granted publication date: 20170524 |