CN103840828B - A kind of automatic zero set circuit - Google Patents
A kind of automatic zero set circuit Download PDFInfo
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- CN103840828B CN103840828B CN201310576090.4A CN201310576090A CN103840828B CN 103840828 B CN103840828 B CN 103840828B CN 201310576090 A CN201310576090 A CN 201310576090A CN 103840828 B CN103840828 B CN 103840828B
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- resistance
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- operational amplifier
- digital regulation
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Abstract
A kind of automatic zero set circuit, the U/D end of digital regulation resistance (1) received by the outfan of comparator (4), the Vout end of input termination operational amplifier (5) of comparator (4), other end ground connection, the CS end of digital regulation resistance (1) is connected with switch (3), CLK end is connected with agitator (2), V4 end connects with the resistance R3 of add circuit, and VH end connects the positive level of power supply, and VL end connects power supply and bears level, resistance R2 and resistance R3 is in parallel, and the outfan of operational amplifier (5) is connected with comparator (4).The method have the advantages that: can monitor in real time and drift about with zeroing, increase substantially verity and the effectiveness of test data, avoid loaded down with trivial details manual zero adjustment simultaneously.In terms of monitoring in real time and adjustment, it is simple to operator understand ruuning situation really.
Description
Technical field
The present invention relates to electronic information field, be specifically related to a kind of automatic zero set circuit.
Background technology
At present, scientific research and testing need use various kinds of sensors, during test data, the phenomenon of zero drift often occurs, cause the data of test that deviation occurs, have influence on the verity of test.It is mainly manifested in:
One, zero drift is not pointed out, and affects data validity.
There is no the prompting of zero drift, easily cause man-made failure operation, it is impossible to correct in time and correct.
Two, complex operation, it has not been convenient to operation.
During hand reset, generally require the data value first remembeing null offset, open zeroing interface the most again, data value before is inserted, returns to data acquisition interface, reexamine zero point, data acquisition can be started.But after sometimes having detected zero point, also have trickle Zero change, then need to carry out zeroing operation again, so zeroing process is somewhat loaded down with trivial details.
Three, monitoring in real time and the effective means adjusted are lacked.
Summary of the invention
The purpose of the present invention is aiming in current scientific research and testing needing to use various kinds of sensors; during test data, often there is the phenomenon of zero drift, cause the data of test that deviation occurs; have influence on the deficiency that the verity of test is above-mentioned, and a kind of automatic zero set circuit is provided.
The present invention is by performing circuit, add circuit and comparator composition, perform circuit by digital regulation resistance, agitator and switch composition, add circuit is by resistance R1, resistance R2, resistance R3 and operational amplifier composition, the U/D end of digital regulation resistance received by the outfan of comparator, the Vout end of the input termination operational amplifier of comparator, other end ground connection, the CS end of digital regulation resistance is connected with switch, CLK end is connected with agitator, V4 end connects with the resistance R3 of add circuit, VH end connects the positive level of power supply, VL end connects power supply and bears level, resistance R2 and resistance R3 is in parallel, the outfan of operational amplifier is connected with comparator.
The method have the advantages that: can monitor in real time and drift about with zeroing, increase substantially verity and the effectiveness of test data, avoid loaded down with trivial details manual zero adjustment simultaneously.In terms of monitoring in real time and adjustment, it is simple to operator understand ruuning situation really.
Accompanying drawing explanation
Fig. 1 is present configuration schematic diagram.
Detailed description of the invention
As shown in Figure 1, the present invention is by performing circuit, add circuit and comparator 4 form, perform circuit by digital regulation resistance 1, agitator 2 and switch 3 composition, add circuit is by resistance R1, resistance R2, resistance R3 and operational amplifier 5 form, the U/D end of digital regulation resistance 1 received by the outfan of comparator 4, the Vout end of the input termination operational amplifier 5 of comparator 4, other end ground connection, the CS end of digital regulation resistance 1 is connected with switch 3, CLK end is connected with agitator 2, V4 end connects with the resistance R3 of add circuit, VH end connects the positive level of power supply, VL end connects power supply and bears level, resistance R2 and resistance R3 is in parallel, the outfan of operational amplifier 5 is connected with comparator 4.
Operation principle is as follows:
When the output of amplifier is not no-voltage, the output of comparator is just high or low level, the U/D end of digital regulation resistance is equivalent to the cursor slide end of common potentiometer, upward sliding during high level, slide downward during low level, cause the output Vo of digital regulation resistance to change, press the button S, CS end is low level, and circuit is selected starts working, amplifier output Vout end automatic balancing.Digital regulation resistance has holding function, unless again pressed S button, otherwise Vo voltage is constant, it is achieved that automatic zero set.
Claims (1)
- null1. an automatic zero set circuit，It is characterized in that it is by performing circuit、Add circuit and comparator (4) composition，Perform circuit by digital regulation resistance (1)、Agitator (2) and switch (3) composition，Add circuit is by resistance R1、Resistance R2、Resistance R3 and operational amplifier (5) composition，The U/D end of digital regulation resistance (1) received by the outfan of comparator (4)，The Vout end of input termination operational amplifier (5) of comparator (4)，Other end ground connection，The CS end of digital regulation resistance (1) is connected with switch (3)，CLK end is connected with agitator (2)，V4 end connects with the resistance R3 of add circuit，VH end connects the positive level of power supply，VL end connects power supply and bears level，Resistance R2 and resistance R3 is in parallel，The outfan of operational amplifier (5) is connected with comparator (4).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310576090.4A CN103840828B (en) | 2013-11-18 | 2013-11-18 | A kind of automatic zero set circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310576090.4A CN103840828B (en) | 2013-11-18 | 2013-11-18 | A kind of automatic zero set circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103840828A CN103840828A (en) | 2014-06-04 |
| CN103840828B true CN103840828B (en) | 2016-08-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310576090.4A Active CN103840828B (en) | 2013-11-18 | 2013-11-18 | A kind of automatic zero set circuit |
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| Country | Link |
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| CN (1) | CN103840828B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112445260B (en) * | 2020-11-25 | 2022-09-30 | 上海城建职业学院 | Automatic zero drift adjusting system and method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1472538A (en) * | 2003-06-30 | 2004-02-04 | 江苏工业学院 | Automatic analog signal initial zero setting circuit |
| CN201935761U (en) * | 2010-11-29 | 2011-08-17 | 重庆大学 | Press tonnage monitor |
| CN202978902U (en) * | 2012-11-26 | 2013-06-05 | 浙江泛泰仪器有限公司 | Automatic zeroing circuit for analog signal |
| CN203069561U (en) * | 2013-02-22 | 2013-07-17 | 张小虎 | Data acquisition device with automatic zeroing function |
| CN203563055U (en) * | 2013-11-18 | 2014-04-23 | 中国特种飞行器研究所 | Novel automatic zero-setting circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100194447A1 (en) * | 2009-02-05 | 2010-08-05 | James Garrett | Zero input bias current, auto-zeroed buffer for a sample and hold circuit |
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2013
- 2013-11-18 CN CN201310576090.4A patent/CN103840828B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1472538A (en) * | 2003-06-30 | 2004-02-04 | 江苏工业学院 | Automatic analog signal initial zero setting circuit |
| CN201935761U (en) * | 2010-11-29 | 2011-08-17 | 重庆大学 | Press tonnage monitor |
| CN202978902U (en) * | 2012-11-26 | 2013-06-05 | 浙江泛泰仪器有限公司 | Automatic zeroing circuit for analog signal |
| CN203069561U (en) * | 2013-02-22 | 2013-07-17 | 张小虎 | Data acquisition device with automatic zeroing function |
| CN203563055U (en) * | 2013-11-18 | 2014-04-23 | 中国特种飞行器研究所 | Novel automatic zero-setting circuit |
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| Publication number | Publication date |
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| CN103840828A (en) | 2014-06-04 |
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